Re: [PATCH 1/3] iio: adc: ina3221: Add DT binding details

On Friday 03 June 2016 05:41 PM, Jonathan Cameron wrote: On 03/06/16 12:48, Laxman Dewangan wrote: On Friday 03 June 2016 03:49 PM, Jonathan Cameron wrote: + +enable-power-monitor:Boolean, Enable power monitoring of the device. Is this the power good stuff? description should

Re: [PATCH 2/3] iio: adc: ina3221: Add support for IIO ADC driver for TI INA3221

On Friday 03 June 2016 05:39 PM, Jonathan Cameron wrote: On 03/06/16 12:26, Laxman Dewangan wrote: On Friday 03 June 2016 03:36 PM, Jonathan Cameron wrote: I thought that all ADC or monitors are going to be part of IIO device framework. I saw the ina2xx which is same (single channel) which

Re: [PATCH 2/3] iio: adc: ina3221: Add support for IIO ADC driver for TI INA3221

On Friday 03 June 2016 05:39 PM, Jonathan Cameron wrote: On 03/06/16 12:26, Laxman Dewangan wrote: On Friday 03 June 2016 03:36 PM, Jonathan Cameron wrote: I thought that all ADC or monitors are going to be part of IIO device framework. I saw the ina2xx which is same (single channel) which

Re: [PATCH 2/3] iio: adc: ina3221: Add support for IIO ADC driver for TI INA3221

On Friday 03 June 2016 05:34 PM, Jonathan Cameron wrote: On 03/06/16 12:31, Laxman Dewangan wrote: On Friday 03 June 2016 03:46 PM, Jonathan Cameron wrote: On 03/06/16 11:06, Jonathan Cameron wrote: Code looks good, bu these more fundamental bits need sorting. Another minor point - why do

Re: [PATCH 2/3] iio: adc: ina3221: Add support for IIO ADC driver for TI INA3221

On Friday 03 June 2016 05:34 PM, Jonathan Cameron wrote: On 03/06/16 12:31, Laxman Dewangan wrote: On Friday 03 June 2016 03:46 PM, Jonathan Cameron wrote: On 03/06/16 11:06, Jonathan Cameron wrote: Code looks good, bu these more fundamental bits need sorting. Another minor point - why do

Re: [PATCH 1/3] iio: adc: ina3221: Add DT binding details

On Friday 03 June 2016 03:49 PM, Jonathan Cameron wrote: On 03/06/16 03:07, Rob Herring wrote: On Wed, Jun 01, 2016 at 06:04:12PM +0530, Laxman Dewangan wrote: + +Optional properties: +-- +one-shot-average-sample: Integer, Number of sample to average before

Re: [PATCH 1/3] iio: adc: ina3221: Add DT binding details

On Friday 03 June 2016 03:49 PM, Jonathan Cameron wrote: On 03/06/16 03:07, Rob Herring wrote: On Wed, Jun 01, 2016 at 06:04:12PM +0530, Laxman Dewangan wrote: + +Optional properties: +-- +one-shot-average-sample: Integer, Number of sample to average before

Re: [PATCH 2/3] iio: adc: ina3221: Add support for IIO ADC driver for TI INA3221

On Friday 03 June 2016 03:46 PM, Jonathan Cameron wrote: On 03/06/16 11:06, Jonathan Cameron wrote: Code looks good, bu these more fundamental bits need sorting. Another minor point - why do the power calculations in driver? no hardware support for it, so why not just leave it to userspace?

Re: [PATCH 2/3] iio: adc: ina3221: Add support for IIO ADC driver for TI INA3221

On Friday 03 June 2016 03:46 PM, Jonathan Cameron wrote: On 03/06/16 11:06, Jonathan Cameron wrote: Code looks good, bu these more fundamental bits need sorting. Another minor point - why do the power calculations in driver? no hardware support for it, so why not just leave it to userspace?

Re: [PATCH 2/3] iio: adc: ina3221: Add support for IIO ADC driver for TI INA3221

On Friday 03 June 2016 03:36 PM, Jonathan Cameron wrote: On 01/06/16 13:34, Laxman Dewangan wrote: Add support for INA3221 SW driver via IIO ADC interface. The device is register as iio-device and provides interface for voltage/current and power monitor. Also provide interface for setting

Re: [PATCH 2/3] iio: adc: ina3221: Add support for IIO ADC driver for TI INA3221

On Friday 03 June 2016 03:36 PM, Jonathan Cameron wrote: On 01/06/16 13:34, Laxman Dewangan wrote: Add support for INA3221 SW driver via IIO ADC interface. The device is register as iio-device and provides interface for voltage/current and power monitor. Also provide interface for setting

Re: [PATCH 1/3] iio: adc: ina3221: Add DT binding details

On Friday 03 June 2016 07:37 AM, Rob Herring wrote: On Wed, Jun 01, 2016 at 06:04:12PM +0530, Laxman Dewangan wrote: + +enable-power-monitor: Boolean, Enable power monitoring of the device. + +enable-continuous-mode:Boolean. Device support oneshot and continuous

Re: [PATCH 1/3] iio: adc: ina3221: Add DT binding details

On Friday 03 June 2016 07:37 AM, Rob Herring wrote: On Wed, Jun 01, 2016 at 06:04:12PM +0530, Laxman Dewangan wrote: + +enable-power-monitor: Boolean, Enable power monitoring of the device. + +enable-continuous-mode:Boolean. Device support oneshot and continuous

Re: [PATCH v4] extcon: gpio: Add the support for Device tree bindings

On Tuesday 31 May 2016 09:18 PM, Rob Herring wrote: On Tue, May 31, 2016 at 8:44 AM, Laxman Dewangan <ldewan...@nvidia.com> wrote: Hi Rob, On Tuesday 31 May 2016 07:05 PM, Rob Herring wrote: On Tue, May 31, 2016 at 2:35 AM, Chanwoo Choi <cw00.c...@samsung.com> wrote: The e

Re: [PATCH v4] extcon: gpio: Add the support for Device tree bindings

On Tuesday 31 May 2016 09:18 PM, Rob Herring wrote: On Tue, May 31, 2016 at 8:44 AM, Laxman Dewangan wrote: Hi Rob, On Tuesday 31 May 2016 07:05 PM, Rob Herring wrote: On Tue, May 31, 2016 at 2:35 AM, Chanwoo Choi wrote: The extcon-gpio.c driver can separate the kind of external connector

[PATCH 1/3] iio: adc: ina3221: Add DT binding details

offers both critical and warning alerts to detect multiple programmable out-of-range conditions for each channel. Add DT binding details for INA3221 device for configuring device in different modes and enable multiple functionalities from device. Signed-off-by: Laxman Dewangan <ldewan...@nvidia.

[PATCH 1/3] iio: adc: ina3221: Add DT binding details

offers both critical and warning alerts to detect multiple programmable out-of-range conditions for each channel. Add DT binding details for INA3221 device for configuring device in different modes and enable multiple functionalities from device. Signed-off-by: Laxman Dewangan --- .../devicetree

[PATCH 3/3] iio: adc: ina3221: Add sysfs details for TI INA3221

offers both critical and warning alerts to detect multiple programmable out-of-range conditions for each channel. The device export the SW interface with IIO framework. Detail out the all sysfs exposed by device for reference. Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com> --- Documen

[PATCH 2/3] iio: adc: ina3221: Add support for IIO ADC driver for TI INA3221

oneshot/continuous mode and critical/warning threshold for the shunt voltage drop. Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com> --- drivers/iio/adc/Kconfig | 12 + drivers/iio/adc/Makefile |1 + drivers/iio/adc/ina3221.c | 1175 ++

[PATCH 3/3] iio: adc: ina3221: Add sysfs details for TI INA3221

offers both critical and warning alerts to detect multiple programmable out-of-range conditions for each channel. The device export the SW interface with IIO framework. Detail out the all sysfs exposed by device for reference. Signed-off-by: Laxman Dewangan --- Documentation/iio/adc/ina3221.txt | 81

[PATCH 2/3] iio: adc: ina3221: Add support for IIO ADC driver for TI INA3221

oneshot/continuous mode and critical/warning threshold for the shunt voltage drop. Signed-off-by: Laxman Dewangan --- drivers/iio/adc/Kconfig | 12 + drivers/iio/adc/Makefile |1 + drivers/iio/adc/ina3221.c | 1175 + 3 files changed, 1188

Re: [PATCH v4] extcon: gpio: Add the support for Device tree bindings

Hi Rob, On Tuesday 31 May 2016 07:05 PM, Rob Herring wrote: On Tue, May 31, 2016 at 2:35 AM, Chanwoo Choi wrote: The extcon-gpio.c driver can separate the kind of external connector by using the 'extcon-id' property. This use of DT is just broken. Come up with another

Re: [PATCH v4] extcon: gpio: Add the support for Device tree bindings

Hi Rob, On Tuesday 31 May 2016 07:05 PM, Rob Herring wrote: On Tue, May 31, 2016 at 2:35 AM, Chanwoo Choi wrote: The extcon-gpio.c driver can separate the kind of external connector by using the 'extcon-id' property. This use of DT is just broken. Come up with another way. Can we have

[PATCH V2] gpio: max77620: Implement gpio_get_direction callback

Implement gpio_get_direction() callback for MAX77620 GPIO. This is useful for debugfs and the userspace ABI. Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com> --- Changes from V1: Earlier it was part of series to implement get_directiona dn set_single_mode. Other patches are alreadya

[PATCH V2] gpio: max77620: Implement gpio_get_direction callback

Implement gpio_get_direction() callback for MAX77620 GPIO. This is useful for debugfs and the userspace ABI. Signed-off-by: Laxman Dewangan --- Changes from V1: Earlier it was part of series to implement get_directiona dn set_single_mode. Other patches are alreadya pplied and hence making

Re: [PATCH RFT] regulator: tps51632: Fix setting ramp delay

. Assume ramp_delay is 1, current code sets slew register to 6mV/us. Fix the logic to set slew register. Setting register to nearest faster ramp side, the change looks fine. Acked-by: Laxman Dewangan <ldewan...@nvidia.com>

Re: [PATCH RFT] regulator: tps51632: Fix setting ramp delay

. Assume ramp_delay is 1, current code sets slew register to 6mV/us. Fix the logic to set slew register. Setting register to nearest faster ramp side, the change looks fine. Acked-by: Laxman Dewangan

Re: [PATCH 2/3] gpio: max77620: Implement gpio_get_direction callback

On Monday 30 May 2016 08:33 PM, Linus Walleij wrote: On Tue, May 24, 2016 at 3:13 PM, Laxman Dewangan <ldewan...@nvidia.com> wrote: Implement gpio_get_direction() callback for MAX77620 GPIO. This is useful for debugfs and the userspace ABI. Signed-off-by: Laxman Dewangan &

Re: [PATCH 2/3] gpio: max77620: Implement gpio_get_direction callback

On Monday 30 May 2016 08:33 PM, Linus Walleij wrote: On Tue, May 24, 2016 at 3:13 PM, Laxman Dewangan wrote: Implement gpio_get_direction() callback for MAX77620 GPIO. This is useful for debugfs and the userspace ABI. Signed-off-by: Laxman Dewangan #include +#include

Re: [RFT][PATCH v2] regulator: max8973: Fix setting ramp delay

variable. Signed-off-by: Axel Lin <axel@ingics.com> Reviewed-by: Laxman Dewangan <ldewan...@nvidia.com>

Re: [RFT][PATCH v2] regulator: max8973: Fix setting ramp delay

variable. Signed-off-by: Axel Lin Reviewed-by: Laxman Dewangan

[PATCH] gpio: core: Do not call get_direction in atomic context for sleeping gpio

() if GPIO HW driver is having sleepable callback i.e. chip->can_sleep = 1. Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com> --- This is found when implementing the get_direction() of max77620 on 20160520 linux-next. drivers/gpio/gpiolib.c | 10 +- 1 file changed, 9 inserti

[PATCH] gpio: core: Do not call get_direction in atomic context for sleeping gpio

() if GPIO HW driver is having sleepable callback i.e. chip->can_sleep = 1. Signed-off-by: Laxman Dewangan --- This is found when implementing the get_direction() of max77620 on 20160520 linux-next. drivers/gpio/gpiolib.c | 10 +- 1 file changed, 9 insertions(+), 1 deletion(-) diff --

[PATCH 3/3] gpio: max77620: use the new open drain callback

The MAX77620 have a GPIO pins which can act as open drain or push pull mode. Implement support for controlling this from GPIO descriptor tables or other hardware descriptions such as device tree by implementing the .set_single_ended() callback. Signed-off-by: Laxman Dewangan <ldewan...@nvidia.

[PATCH 3/3] gpio: max77620: use the new open drain callback

The MAX77620 have a GPIO pins which can act as open drain or push pull mode. Implement support for controlling this from GPIO descriptor tables or other hardware descriptions such as device tree by implementing the .set_single_ended() callback. Signed-off-by: Laxman Dewangan --- drivers/gpio

[PATCH 1/3] gpio: max77620: Configure interrupt trigger level

The GPIO sub modules of MAX77620 offers to configure the GPIO interrupt trigger level as RISING and FALLING edge. Pass this information to regmap-irg when registering for GPIO interrupts. Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com> --- drivers/gpio/gpio-max77620.

[PATCH 1/3] gpio: max77620: Configure interrupt trigger level

The GPIO sub modules of MAX77620 offers to configure the GPIO interrupt trigger level as RISING and FALLING edge. Pass this information to regmap-irg when registering for GPIO interrupts. Signed-off-by: Laxman Dewangan --- drivers/gpio/gpio-max77620.c | 67

[PATCH 2/3] gpio: max77620: Implement gpio_get_direction callback

Implement gpio_get_direction() callback for MAX77620 GPIO. This is useful for debugfs and the userspace ABI. Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com> --- drivers/gpio/gpio-max77620.c | 19 +++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpio/gpio-ma

[PATCH 2/3] gpio: max77620: Implement gpio_get_direction callback

Implement gpio_get_direction() callback for MAX77620 GPIO. This is useful for debugfs and the userspace ABI. Signed-off-by: Laxman Dewangan --- drivers/gpio/gpio-max77620.c | 19 +++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpio/gpio-max77620.c b/drivers/gpio/gpio

Re: [PATCH V12 2/2] pinctrl: max77620: add pincontrol driver for MAX77620/MAX20024

On Tuesday 24 May 2016 04:51 PM, Linus Walleij wrote: On Fri, May 13, 2016 at 7:19 AM, Laxman Dewangan <ldewan...@nvidia.com> wrote: MAXIM Semiconductor's PMIC, MAX77620/MAX20024 has 8 GPIO pins which also act as the special function in alternate mode. Also there is configuration lik

Re: [PATCH V12 2/2] pinctrl: max77620: add pincontrol driver for MAX77620/MAX20024

On Tuesday 24 May 2016 04:51 PM, Linus Walleij wrote: On Fri, May 13, 2016 at 7:19 AM, Laxman Dewangan wrote: MAXIM Semiconductor's PMIC, MAX77620/MAX20024 has 8 GPIO pins which also act as the special function in alternate mode. Also there is configuration like push-pull, open drain, FPS

Re: [PATCH V12 2/2] gpio: max77620: add gpio driver for MAX77620/MAX20024

On Tuesday 24 May 2016 04:45 PM, Linus Walleij wrote: On Fri, May 13, 2016 at 7:19 AM, Laxman Dewangan <ldewan...@nvidia.com> wrote: MAXIM Semiconductor's PMIC, MAX77620/MAX20024 has 8 GPIO pins. It also supports interrupts from these pins. Add GPIO driver for these pins to control vi

Re: [PATCH V12 2/2] gpio: max77620: add gpio driver for MAX77620/MAX20024

On Tuesday 24 May 2016 04:45 PM, Linus Walleij wrote: On Fri, May 13, 2016 at 7:19 AM, Laxman Dewangan wrote: MAXIM Semiconductor's PMIC, MAX77620/MAX20024 has 8 GPIO pins. It also supports interrupts from these pins. Add GPIO driver for these pins to control via GPIO APIs. Signed-off

[PATCH V7 1/3] soc/tegra: pmc: Use BIT macro for register field definition

Use BIT macro for register field definition and make constant as U when using in shift operator like (3 << 30) to (3U << 30) Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com> Acked-by: Jon Hunter <jonath...@nvidia.com> Changes from V1: - Remove the indenting of l

[PATCH V7 1/3] soc/tegra: pmc: Use BIT macro for register field definition

Use BIT macro for register field definition and make constant as U when using in shift operator like (3 << 30) to (3U << 30) Signed-off-by: Laxman Dewangan Acked-by: Jon Hunter Changes from V1: - Remove the indenting of line which is not for BIT macro usage. Changes from V2: - N

[PATCH V7 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

is applicable for all generation os Tegra SoC. IO pads ID and information of bit field for power state and voltage level controls are added for Tegra124, Tegra132 and Tegra210. The SOR driver is modified to use the new APIs. Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com> --- Changes f

[PATCH V7 2/3] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl()

The function tegra_pmc_readl() returns the u32 type data and hence change the data type of variable where this data is stored to u32 type. Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com> Reviewed-by: Jon Hunter <jonath...@nvidia.com> --- Changes from V1: -This is new in s

[PATCH V7 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

is applicable for all generation os Tegra SoC. IO pads ID and information of bit field for power state and voltage level controls are added for Tegra124, Tegra132 and Tegra210. The SOR driver is modified to use the new APIs. Signed-off-by: Laxman Dewangan --- Changes from V1: This is reworked

[PATCH V7 2/3] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl()

The function tegra_pmc_readl() returns the u32 type data and hence change the data type of variable where this data is stored to u32 type. Signed-off-by: Laxman Dewangan Reviewed-by: Jon Hunter --- Changes from V1: -This is new in series as per discussion on V1 series to use u32

[PATCH 1/2] regmap: irq: Add support to call client specific pre/post interrupt service

) is implemented in regmap irq as generic routine. For step (1) and (3), add callbacks from regmap irq to client driver to handle chip specific configurations. Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com> --- drivers/base/regmap/regmap-irq.c | 15 +++ include/linux/re

[PATCH 2/2] mfd: max77620: Add pre/post irq handler before/after servicing interrupt

the hardware interrupt line by clearing GLBLM. Add the pre and post interrupt service handler for step (1) and (3) as callback from regmap-irq. Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com> --- drivers/mfd/max77620.c | 55 +- 1 file chang

[PATCH 1/2] regmap: irq: Add support to call client specific pre/post interrupt service

) is implemented in regmap irq as generic routine. For step (1) and (3), add callbacks from regmap irq to client driver to handle chip specific configurations. Signed-off-by: Laxman Dewangan --- drivers/base/regmap/regmap-irq.c | 15 +++ include/linux/regmap.h | 10 ++ 2 files

[PATCH 2/2] mfd: max77620: Add pre/post irq handler before/after servicing interrupt

the hardware interrupt line by clearing GLBLM. Add the pre and post interrupt service handler for step (1) and (3) as callback from regmap-irq. Signed-off-by: Laxman Dewangan --- drivers/mfd/max77620.c | 55 +- 1 file changed, 46 insertions(+), 9

[PATCH V7 0/3] soc/tegra: Add support for IO pads power and voltage control

d case and refactor APIs to convert io-pads to bit. Changes from V7: - Fix document format. - Document public APIs. - Fix teh bit check. - Add check of pad ID validatity. Laxman Dewangan (3): soc/tegra: pmc: Use BIT macro for register field definition soc/tegra: pmc: Correct type of va

[PATCH V7 0/3] soc/tegra: Add support for IO pads power and voltage control

d case and refactor APIs to convert io-pads to bit. Changes from V7: - Fix document format. - Document public APIs. - Fix teh bit check. - Add check of pad ID validatity. Laxman Dewangan (3): soc/tegra: pmc: Use BIT macro for register field definition soc/tegra: pmc: Correct type of va

Re: [PATCH V6 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

On Friday 20 May 2016 07:02 PM, Jon Hunter wrote: On 20/05/16 12:59, Laxman Dewangan wrote: +/* tegra_io_pads_config_info: Tegra IO pads bit config info. + * @dpd_config_bit: DPD configuration bit position. -1 if not supported. + * @voltage_config_bit: Voltage configuration bit position. -1

Re: [PATCH V6 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

On Friday 20 May 2016 07:02 PM, Jon Hunter wrote: On 20/05/16 12:59, Laxman Dewangan wrote: +/* tegra_io_pads_config_info: Tegra IO pads bit config info. + * @dpd_config_bit: DPD configuration bit position. -1 if not supported. + * @voltage_config_bit: Voltage configuration bit position. -1

[PATCH V6 2/3] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl()

The function tegra_pmc_readl() returns the u32 type data and hence change the data type of variable where this data is stored to u32 type. Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com> Reviewed-by: Jon Hunter <jonath...@nvidia.com> --- Changes from V1: -This is new in s

[PATCH V6 2/3] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl()

The function tegra_pmc_readl() returns the u32 type data and hence change the data type of variable where this data is stored to u32 type. Signed-off-by: Laxman Dewangan Reviewed-by: Jon Hunter --- Changes from V1: -This is new in series as per discussion on V1 series to use u32

[PATCH V6 0/3] soc/tegra: Add support for IO pads power and voltage control

d case and refactor APIs to convert io-pads to bit. Laxman Dewangan (3): soc/tegra: pmc: Use BIT macro for register field definition soc/tegra: pmc: Correct type of variable for tegra_pmc_readl() soc/tegra: pmc: Add support for IO pads power state and voltage drivers/gpu/drm/tegra/sor.c

[PATCH V6 0/3] soc/tegra: Add support for IO pads power and voltage control

d case and refactor APIs to convert io-pads to bit. Laxman Dewangan (3): soc/tegra: pmc: Use BIT macro for register field definition soc/tegra: pmc: Correct type of variable for tegra_pmc_readl() soc/tegra: pmc: Add support for IO pads power state and voltage drivers/gpu/drm/tegra/sor.c

[PATCH V6 1/3] soc/tegra: pmc: Use BIT macro for register field definition

Use BIT macro for register field definition and make constant as U when using in shift operator like (3 << 30) to (3U << 30) Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com> Acked-by: Jon Hunter <jonath...@nvidia.com> --- Changes from V1: - Remove the indenting of l

[PATCH V6 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

is applicable for all generation os Tegra SoC. IO pads ID and information of bit field for power state and voltage level controls are added for Tegra124, Tegra132 and Tegra210. The SOR driver is modified to use the new APIs. Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com> --- Changes f

[PATCH V6 1/3] soc/tegra: pmc: Use BIT macro for register field definition

Use BIT macro for register field definition and make constant as U when using in shift operator like (3 << 30) to (3U << 30) Signed-off-by: Laxman Dewangan Acked-by: Jon Hunter --- Changes from V1: - Remove the indenting of line which is not for BIT macro usage. Changes fro

[PATCH V6 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

is applicable for all generation os Tegra SoC. IO pads ID and information of bit field for power state and voltage level controls are added for Tegra124, Tegra132 and Tegra210. The SOR driver is modified to use the new APIs. Signed-off-by: Laxman Dewangan --- Changes from V1: This is reworked

Re: [PATCH V5 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

On Friday 20 May 2016 03:32 PM, Jon Hunter wrote: On 12/05/16 13:21, Laxman Dewangan wrote: +#define TEGRA_IO_PADS_T124_T210(TEGRA_IO_PADS_T124 | \ + TEGRA_IO_PADS_T210) + What about T30 and T114? The TRM includes the DPD REQ/STATUS

Re: [PATCH V5 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

On Friday 20 May 2016 03:32 PM, Jon Hunter wrote: On 12/05/16 13:21, Laxman Dewangan wrote: +#define TEGRA_IO_PADS_T124_T210(TEGRA_IO_PADS_T124 | \ + TEGRA_IO_PADS_T210) + What about T30 and T114? The TRM includes the DPD REQ/STATUS

Re: [PATCH 0/4] regulator: tps65917/palmas: Cleanups and bugfixes

On Friday 20 May 2016 10:01 AM, Keerthy wrote: + Lee Jones On Saturday 07 May 2016 12:31 AM, Nishanth Menon wrote: On 05/06/2016 12:14 PM, Mark Brown wrote: On Fri, May 06, 2016 at 12:44:23PM +0530, Laxman Dewangan wrote: When you are here, can you implement the dt parsing with the new

Re: [PATCH 0/4] regulator: tps65917/palmas: Cleanups and bugfixes

On Friday 20 May 2016 10:01 AM, Keerthy wrote: + Lee Jones On Saturday 07 May 2016 12:31 AM, Nishanth Menon wrote: On 05/06/2016 12:14 PM, Mark Brown wrote: On Fri, May 06, 2016 at 12:44:23PM +0530, Laxman Dewangan wrote: When you are here, can you implement the dt parsing with the new

Re: [PATCH V5 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

On Thursday 19 May 2016 09:24 PM, Jon Hunter wrote: On 12/05/16 13:21, Laxman Dewangan wrote: The IO pins of Tegra SoCs are grouped for common control of IO interface like setting voltage signal levels and power state of the interface. The group is generally referred as IO pads. The power

Re: [PATCH V5 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

On Thursday 19 May 2016 09:24 PM, Jon Hunter wrote: On 12/05/16 13:21, Laxman Dewangan wrote: The IO pins of Tegra SoCs are grouped for common control of IO interface like setting voltage signal levels and power state of the interface. The group is generally referred as IO pads. The power

Re: [PATCH V5 0/3] soc/tegra: Add support for IO pads power and voltage control

Hi Jon/Thierry, On Thursday 12 May 2016 05:51 PM, Laxman Dewangan wrote: The IO pins of Tegra SoCs are grouped for common control of IO interface like setting voltage signal levels and power state of the interface. The group is generally referred as IO pads. The power state and voltage control

Re: [PATCH V5 0/3] soc/tegra: Add support for IO pads power and voltage control

Hi Jon/Thierry, On Thursday 12 May 2016 05:51 PM, Laxman Dewangan wrote: The IO pins of Tegra SoCs are grouped for common control of IO interface like setting voltage signal levels and power state of the interface. The group is generally referred as IO pads. The power state and voltage control

[PATCH V12 1/2] pinctrl: add DT binding doc for pincontrol of PMIC max77620/max20024

Maxim Semiconductor's PMIC MAX77620/MAX20024 has 8 GPIO pins which act as GPIO as well as special function mode. Add DT binding document to configure pins in function mode as well as pin configuration parameters. Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com> Acked-by: Rob Herr

[PATCH V12 1/2] pinctrl: add DT binding doc for pincontrol of PMIC max77620/max20024

Maxim Semiconductor's PMIC MAX77620/MAX20024 has 8 GPIO pins which act as GPIO as well as special function mode. Add DT binding document to configure pins in function mode as well as pin configuration parameters. Signed-off-by: Laxman Dewangan Acked-by: Rob Herring Acked-by: Linus Walleij

[PATCH V12 2/2] gpio: max77620: add gpio driver for MAX77620/MAX20024

MAXIM Semiconductor's PMIC, MAX77620/MAX20024 has 8 GPIO pins. It also supports interrupts from these pins. Add GPIO driver for these pins to control via GPIO APIs. Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com> Reviewed-by: Linus Walleij <linus.wall...@linaro.org> ---

[PATCH V12 2/2] gpio: max77620: add gpio driver for MAX77620/MAX20024

MAXIM Semiconductor's PMIC, MAX77620/MAX20024 has 8 GPIO pins. It also supports interrupts from these pins. Add GPIO driver for these pins to control via GPIO APIs. Signed-off-by: Laxman Dewangan Reviewed-by: Linus Walleij --- This as part of the max77620 series and mfd patch are already

[PATCH V12 2/2] pinctrl: max77620: add pincontrol driver for MAX77620/MAX20024

-by: Laxman Dewangan <ldewan...@nvidia.com> Reviewed-by: Linus Walleij <linus.wall...@linaro.org> --- This was part of the max77620 series and mfd is merged. So it can go in subsystem wise. Changes from V1: - Cleanup code based on comment received on mfd/rtc. - Avoid duplication on e

[PATCH V12 1/2] gpio: add DT binding doc for gpio of PMIC max77620/max20024

Maxim Semiconductor's PMIC MAX77620/MAX20024 has 8 GPIO pins which act as GPIO as well as special function mode. Add DT binding document to support these pins in GPIO mode via GPIO framework. Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com> Acked-by: Rob Herring <r...@kernel.o

[PATCH V12 2/2] pinctrl: max77620: add pincontrol driver for MAX77620/MAX20024

-by: Laxman Dewangan Reviewed-by: Linus Walleij --- This was part of the max77620 series and mfd is merged. So it can go in subsystem wise. Changes from V1: - Cleanup code based on comment received on mfd/rtc. - Avoid duplication on error message. Changes form V2: - Run coccicheck

[PATCH V12 1/2] gpio: add DT binding doc for gpio of PMIC max77620/max20024

Maxim Semiconductor's PMIC MAX77620/MAX20024 has 8 GPIO pins which act as GPIO as well as special function mode. Add DT binding document to support these pins in GPIO mode via GPIO framework. Signed-off-by: Laxman Dewangan Acked-by: Rob Herring Acked-by: Linus Walleij --- This as part

Re: [PATCH] mfd: max77620: Fix FPS switch statements

_id == MAX77620, it will set fps_[mix|max]_period but then fall through to the default switch case and return -EINVAL. Returning this from max77620_config_fps() will cause probe to fail. Thanks for fixes. Missed when converting if-else to switch. Reviewed-by: Laxman Dewangan <ldewan...@nvidia.com>

Re: [PATCH] mfd: max77620: Fix FPS switch statements

_id == MAX77620, it will set fps_[mix|max]_period but then fall through to the default switch case and return -EINVAL. Returning this from max77620_config_fps() will cause probe to fail. Thanks for fixes. Missed when converting if-else to switch. Reviewed-by: Laxman Dewangan

[PATCH ] pinctrl: tegra: Get rid of parked_reg

Remove the use of parked_reg and use parked_bit for to know whether field is supported or not. This is fix for the patch commit 1d18a3f0f0809f6c71f1f6e9e268ee904ce0b588 "pinctrl: tegra: avoid parked_reg and parked_bank Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com> --- driv

[PATCH ] pinctrl: tegra: Get rid of parked_reg

Remove the use of parked_reg and use parked_bit for to know whether field is supported or not. This is fix for the patch commit 1d18a3f0f0809f6c71f1f6e9e268ee904ce0b588 "pinctrl: tegra: avoid parked_reg and parked_bank Signed-off-by: Laxman Dewangan --- drivers/pinctrl/tegra/pinctrl-tegr

[PATCH V5 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

is applicable for all generation os Tegra SoC. IO pads ID and information of bit field for power state and voltage level controls are added for Tegra124, Tegra132 and Tegra210. The SOR driver is modified to use the new APIs. Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com> --- Changes f

[PATCH V5 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

is applicable for all generation os Tegra SoC. IO pads ID and information of bit field for power state and voltage level controls are added for Tegra124, Tegra132 and Tegra210. The SOR driver is modified to use the new APIs. Signed-off-by: Laxman Dewangan --- Changes from V1: This is reworked

[PATCH V5 2/3] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl()

The function tegra_pmc_readl() returns the u32 type data and hence change the data type of variable where this data is stored to u32 type. Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com> Reviewed-by: Jon Hunter <jonath...@nvidia.com> --- Changes from V1: -This is new in s

[PATCH V5 2/3] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl()

The function tegra_pmc_readl() returns the u32 type data and hence change the data type of variable where this data is stored to u32 type. Signed-off-by: Laxman Dewangan Reviewed-by: Jon Hunter --- Changes from V1: -This is new in series as per discussion on V1 series to use u32

[PATCH V5 0/3] soc/tegra: Add support for IO pads power and voltage control

config - Make the io pad tables common for all SoC. - Make io_pads enums. - Add enums for voltage. - Drop patch of adding sub devs Changes from V4: - Change IO_PAD to IO_PADS. - Change enum for voltage config Laxman Dewangan (3): soc/tegra: pmc: Use BIT macro for register field definition soc

[PATCH V5 0/3] soc/tegra: Add support for IO pads power and voltage control

config - Make the io pad tables common for all SoC. - Make io_pads enums. - Add enums for voltage. - Drop patch of adding sub devs Changes from V4: - Change IO_PAD to IO_PADS. - Change enum for voltage config Laxman Dewangan (3): soc/tegra: pmc: Use BIT macro for register field definition soc

[PATCH V5 1/3] soc/tegra: pmc: Use BIT macro for register field definition

Use BIT macro for register field definition and make constant as U when using in shift operator like (3 << 30) to (3U << 30) Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com> Acked-by: Jon Hunter <jonath...@nvidia.com> --- Changes from V1: - Remove the indenting of l

[PATCH V5 1/3] soc/tegra: pmc: Use BIT macro for register field definition

Use BIT macro for register field definition and make constant as U when using in shift operator like (3 << 30) to (3U << 30) Signed-off-by: Laxman Dewangan Acked-by: Jon Hunter --- Changes from V1: - Remove the indenting of line which is not for BIT macro usage. Changes fro

Re: [PATCH V4 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

On Wednesday 11 May 2016 09:05 PM, Jon Hunter wrote: On 11/05/16 14:28, Laxman Dewangan wrote: On Sunday 08 May 2016 05:43 PM, Jon Hunter wrote: On 06/05/16 16:32, Laxman Dewangan wrote: On Friday 06 May 2016 08:07 PM, Jon Hunter wrote: On 06/05/16 11:45, Laxman Dewangan wrote

Re: [PATCH V4 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

On Wednesday 11 May 2016 09:05 PM, Jon Hunter wrote: On 11/05/16 14:28, Laxman Dewangan wrote: On Sunday 08 May 2016 05:43 PM, Jon Hunter wrote: On 06/05/16 16:32, Laxman Dewangan wrote: On Friday 06 May 2016 08:07 PM, Jon Hunter wrote: On 06/05/16 11:45, Laxman Dewangan wrote

Re: [PATCH V4 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

On Sunday 08 May 2016 05:43 PM, Jon Hunter wrote: On 06/05/16 16:32, Laxman Dewangan wrote: On Friday 06 May 2016 08:07 PM, Jon Hunter wrote: On 06/05/16 11:45, Laxman Dewangan wrote: + +/* Last entry */ +TEGRA_IO_PAD_MAX, Nit should these be TEGRA_IO_PADS_xxx? Because this was name

Re: [PATCH V4 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

On Sunday 08 May 2016 05:43 PM, Jon Hunter wrote: On 06/05/16 16:32, Laxman Dewangan wrote: On Friday 06 May 2016 08:07 PM, Jon Hunter wrote: On 06/05/16 11:45, Laxman Dewangan wrote: + +/* Last entry */ +TEGRA_IO_PAD_MAX, Nit should these be TEGRA_IO_PADS_xxx? Because this was name

Re: [PATCH V4 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

On Friday 06 May 2016 08:07 PM, Jon Hunter wrote: On 06/05/16 11:45, Laxman Dewangan wrote: + + /* Last entry */ + TEGRA_IO_PAD_MAX, Nit should these be TEGRA_IO_PADS_xxx? Because this was name of single pad and hence I said TEGRA_IO_PAD_XXX

Re: [PATCH V4 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

On Friday 06 May 2016 08:07 PM, Jon Hunter wrote: On 06/05/16 11:45, Laxman Dewangan wrote: + + /* Last entry */ + TEGRA_IO_PAD_MAX, Nit should these be TEGRA_IO_PADS_xxx? Because this was name of single pad and hence I said TEGRA_IO_PAD_XXX

[PATCH V4 3/3] soc/tegra: pmc: Add support for IO pads power state and voltage

is applicable for all generation os Tegra SoC. IO pads ID and information of bit field for power state and voltage level controls are added for Tegra124, Tegra132 and Tegra210. The SOR driver is modified to use the new APIs. Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com> --- Changes f

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