for USB port mux controlled through memory mapped
registers and the logic to create the mux device. This type
of dual role port mux could be found in Cherry Trail and
Broxton devices.
Lu Baolu (6):
extcon: usb-gpio: add device binding for platform device
extcon: usb-gpio: add support
for USB port mux controlled through memory mapped
registers and the logic to create the mux device. This type
of dual role port mux could be found in Cherry Trail and
Broxton devices.
Lu Baolu (6):
extcon: usb-gpio: add device binding for platform device
extcon: usb-gpio: add support
Hi Chanwoo,
On 03/18/2016 03:52 PM, Chanwoo Choi wrote:
> Hi Baolu,
>
> On 2016년 03월 18일 15:32, Lu Baolu wrote:
>> Several Intel PCHs and SOCs have an internal mux that is used to
>> share one USB port between device controller and host controller.
>>
>> A
Hi Chanwoo,
On 03/18/2016 03:52 PM, Chanwoo Choi wrote:
> Hi Baolu,
>
> On 2016년 03월 18일 15:32, Lu Baolu wrote:
>> Several Intel PCHs and SOCs have an internal mux that is used to
>> share one USB port between device controller and host controller.
>>
>> A
Some Intel platforms have an USB port mux controlled by GPIOs.
There's a single ACPI platform device that provides both USB ID
extcon device and a USB port mux device. This MFD driver will
split the 2 devices for their respective drivers.
Signed-off-by: Lu Baolu <baolu...@linux.intel.
Some Intel platforms have an USB port mux controlled by GPIOs.
There's a single ACPI platform device that provides both USB ID
extcon device and a USB port mux device. This MFD driver will
split the 2 devices for their respective drivers.
Signed-off-by: Lu Baolu
Suggested-by: David Cohen
HOST and PERIPHERAL;
3) The required action to do the real port switch.
This patch adds the common code to handle usb port mux. With this
common code, the individual mux driver, which always is platform
dependent, could focus on the real operation of mux switch.
Signed-off-by: Lu Baolu <ba
HOST and PERIPHERAL;
3) The required action to do the real port switch.
This patch adds the common code to handle usb port mux. With this
common code, the individual mux driver, which always is platform
dependent, could focus on the real operation of mux switch.
Signed-off-by: Lu Baolu
Reviewed
Several Intel PCHs and SOCs have an internal mux that is used to
share one USB port between device controller and host controller.
The mux is handled through the Dual Role Configuration Register.
Signed-off-by: Heikki Krogerus <heikki.kroge...@linux.intel.com>
Signed-off-by: Lu Baolu
Several Intel PCHs and SOCs have an internal mux that is used to
share one USB port between device controller and host controller.
The mux is handled through the Dual Role Configuration Register.
Signed-off-by: Heikki Krogerus
Signed-off-by: Lu Baolu
Signed-off-by: Wu Hao
Reviewed-by: Felipe
function with unique id on patch[2]
> [2] 5960387a2fb83 (usb: dwc3: omap: Replace deprecated API of extcon)
Thanks. That's helpful.
By the way, is extcon_get_extcon_dev() still available?
>
> I'm sorry for late reply. I add the some comment on below.
Never mind. Thank you for remin
function with unique id on patch[2]
> [2] 5960387a2fb83 (usb: dwc3: omap: Replace deprecated API of extcon)
Thanks. That's helpful.
By the way, is extcon_get_extcon_dev() still available?
>
> I'm sorry for late reply. I add the some comment on below.
Never mind. Thank you for remin
On 03/18/2016 04:09 PM, Lee Jones wrote:
> On Fri, 18 Mar 2016, Lu Baolu wrote:
>
>> Some Intel platforms have an USB port mux controlled by GPIOs.
>> There's a single ACPI platform device that provides both USB ID
>> extcon device and a USB port mux device. This MFD dr
On 03/18/2016 04:09 PM, Lee Jones wrote:
> On Fri, 18 Mar 2016, Lu Baolu wrote:
>
>> Some Intel platforms have an USB port mux controlled by GPIOs.
>> There's a single ACPI platform device that provides both USB ID
>> extcon device and a USB port mux device. This MFD dr
This is needed to handle the GPIO connected USB ID pin found on
Intel Baytrail devices.
Signed-off-by: Lu Baolu <baolu...@linux.intel.com>
Reviewed-by: Felipe Balbi <ba...@kernel.org>
Acked-by: Chanwoo Choi <cw00.c...@samsung.com>
---
drivers/extcon/extcon-usb-gpio.c | 7 +
This is needed to handle the GPIO connected USB ID pin found on
Intel Baytrail devices.
Signed-off-by: Lu Baolu
Reviewed-by: Felipe Balbi
Acked-by: Chanwoo Choi
---
drivers/extcon/extcon-usb-gpio.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/extcon/extcon-usb-gpio.c b
In some Intel platforms, a single usb port is shared between USB host
and device controller. The shared port is under control of GPIO pins.
This patch adds the support for USB GPIO controlled port mux.
Signed-off-by: David Cohen <david.a.co...@linux.intel.com>
Signed-off-by: Lu Baolu
In some Intel platforms, a single usb port is shared between USB host
and device controller. The shared port is under control of GPIO pins.
This patch adds the support for USB GPIO controlled port mux.
Signed-off-by: David Cohen
Signed-off-by: Lu Baolu
Reviewed-by: Heikki Krogerus
Reviewed
mux switch.
Signed-off-by: Lu Baolu <baolu...@linux.intel.com>
Reviewed-by: Felipe Balbi <ba...@kernel.org>
---
drivers/usb/host/pci-quirks.c| 47 ++--
drivers/usb/host/xhci-ext-caps.h | 2 ++
2 files changed, 47 insertions(+), 2 deletions(-)
mux switch.
Signed-off-by: Lu Baolu
Reviewed-by: Felipe Balbi
---
drivers/usb/host/pci-quirks.c| 47 ++--
drivers/usb/host/xhci-ext-caps.h | 2 ++
2 files changed, 47 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb
Some Intel platforms have an USB port mux controlled by GPIOs.
There's a single ACPI platform device that provides both USB ID
extcon device and a USB port mux device. This MFD driver will
split the 2 devices for their respective drivers.
Signed-off-by: Lu Baolu <baolu...@linux.intel.
Some Intel platforms have an USB port mux controlled by GPIOs.
There's a single ACPI platform device that provides both USB ID
extcon device and a USB port mux device. This MFD driver will
split the 2 devices for their respective drivers.
Signed-off-by: Lu Baolu
Suggested-by: David Cohen
GPIO resource could be retrieved through APCI as well.
Signed-off-by: Lu Baolu <baolu...@linux.intel.com>
Reviewed-by: Felipe Balbi <ba...@kernel.org>
Acked-by: Chanwoo Choi <cw00.c...@samsung.com>
---
drivers/extcon/extcon-usb-gpio.c | 3 ++-
1 file changed, 2 insertions(+), 1
GPIO resource could be retrieved through APCI as well.
Signed-off-by: Lu Baolu
Reviewed-by: Felipe Balbi
Acked-by: Chanwoo Choi
---
drivers/extcon/extcon-usb-gpio.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/extcon/extcon-usb-gpio.c b/drivers/extcon/extcon
Several Intel PCHs and SOCs have an internal mux that is used to
share one USB port between device controller and host controller.
The mux is handled through the Dual Role Configuration Register.
Signed-off-by: Heikki Krogerus <heikki.kroge...@linux.intel.com>
Signed-off-by: Lu Baolu
Several Intel PCHs and SOCs have an internal mux that is used to
share one USB port between device controller and host controller.
The mux is handled through the Dual Role Configuration Register.
Signed-off-by: Heikki Krogerus
Signed-off-by: Lu Baolu
Signed-off-by: Wu Hao
Reviewed-by: Felipe
This is needed to handle the GPIO connected USB ID pin found on
Intel Baytrail devices.
Signed-off-by: Lu Baolu <baolu...@linux.intel.com>
Reviewed-by: Felipe Balbi <ba...@kernel.org>
Acked-by: Chanwoo Choi <cw00.c...@samsung.com>
---
drivers/extcon/extcon-usb-gpio.c | 7 +
This is needed to handle the GPIO connected USB ID pin found on
Intel Baytrail devices.
Signed-off-by: Lu Baolu
Reviewed-by: Felipe Balbi
Acked-by: Chanwoo Choi
---
drivers/extcon/extcon-usb-gpio.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/extcon/extcon-usb-gpio.c b
HOST and PERIPHERAL;
3) The required action to do the real port switch.
This patch adds the common code to handle usb port mux. With this
common code, the individual mux driver, which always is platform
dependent, could focus on the real operation of mux switch.
Signed-off-by: Lu Baolu <ba
HOST and PERIPHERAL;
3) The required action to do the real port switch.
This patch adds the common code to handle usb port mux. With this
common code, the individual mux driver, which always is platform
dependent, could focus on the real operation of mux switch.
Signed-off-by: Lu Baolu
Reviewed
GPIO resource could be retrieved through APCI as well.
Signed-off-by: Lu Baolu <baolu...@linux.intel.com>
Reviewed-by: Felipe Balbi <ba...@kernel.org>
Acked-by: Chanwoo Choi <cw00.c...@samsung.com>
---
drivers/extcon/extcon-usb-gpio.c | 3 ++-
1 file changed, 2 insertions(+), 1
GPIO resource could be retrieved through APCI as well.
Signed-off-by: Lu Baolu
Reviewed-by: Felipe Balbi
Acked-by: Chanwoo Choi
---
drivers/extcon/extcon-usb-gpio.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/extcon/extcon-usb-gpio.c b/drivers/extcon/extcon
for USB port mux controlled through memory mapped
registers and the logic to create the mux device. This type
of dual role port mux could be found in Cherry Trail and
Broxton devices.
Lu Baolu (7):
extcon: usb-gpio: add device binding for platform device
extcon: usb-gpio: add support
for USB port mux controlled through memory mapped
registers and the logic to create the mux device. This type
of dual role port mux could be found in Cherry Trail and
Broxton devices.
Lu Baolu (7):
extcon: usb-gpio: add device binding for platform device
extcon: usb-gpio: add support
On 03/17/2016 03:27 PM, Chanwoo Choi wrote:
> Hi Lu,
>
> On 2016년 03월 17일 16:16, Lu Baolu wrote:
>> Hi Chanwoo,
>>
>> On 03/17/2016 02:07 PM, Chanwoo Choi wrote:
>>> Hi Lu,
>>>
>>> To handle extcon (external connector), I implemented th
On 03/17/2016 03:27 PM, Chanwoo Choi wrote:
> Hi Lu,
>
> On 2016년 03월 17일 16:16, Lu Baolu wrote:
>> Hi Chanwoo,
>>
>> On 03/17/2016 02:07 PM, Chanwoo Choi wrote:
>>> Hi Lu,
>>>
>>> To handle extcon (external connector), I implemented th
On 03/14/2016 11:27 AM, Greg Kroah-Hartman wrote:
> On Mon, Mar 14, 2016 at 09:09:22AM +0800, Lu Baolu wrote:
>> On 03/11/2016 08:06 AM, Greg Kroah-Hartman wrote:
>>> On Tue, Mar 08, 2016 at 03:53:44PM +0800, Lu Baolu wrote:
>>>> +struct intel_mux_dev {
>>>
On 03/14/2016 11:27 AM, Greg Kroah-Hartman wrote:
> On Mon, Mar 14, 2016 at 09:09:22AM +0800, Lu Baolu wrote:
>> On 03/11/2016 08:06 AM, Greg Kroah-Hartman wrote:
>>> On Tue, Mar 08, 2016 at 03:53:44PM +0800, Lu Baolu wrote:
>>>> +struct intel_mux_dev {
>>>
Hi,
On 03/11/2016 08:06 AM, Greg Kroah-Hartman wrote:
> On Tue, Mar 08, 2016 at 03:53:44PM +0800, Lu Baolu wrote:
>> Several Intel PCHs and SOCs have an internal mux that is used to
>> share one USB port between device controller and host controller.
>>
>> A usb p
Hi,
On 03/11/2016 08:06 AM, Greg Kroah-Hartman wrote:
> On Tue, Mar 08, 2016 at 03:53:44PM +0800, Lu Baolu wrote:
>> Several Intel PCHs and SOCs have an internal mux that is used to
>> share one USB port between device controller and host controller.
>>
>> A usb p
On 03/11/2016 07:57 AM, Greg Kroah-Hartman wrote:
> On Thu, Mar 10, 2016 at 01:39:43PM +0100, Oliver Neukum wrote:
>> On Tue, 2016-03-08 at 15:53 +0800, Lu Baolu wrote:
>>
>>> diff --git a/Documentation/ABI/testing/sysfs-bus-platform
>>> b/Documentation/ABI/tes
On 03/11/2016 07:57 AM, Greg Kroah-Hartman wrote:
> On Thu, Mar 10, 2016 at 01:39:43PM +0100, Oliver Neukum wrote:
>> On Tue, 2016-03-08 at 15:53 +0800, Lu Baolu wrote:
>>
>>> diff --git a/Documentation/ABI/testing/sysfs-bus-platform
>>> b/Documentation/ABI/tes
On 03/11/2016 08:03 AM, Greg Kroah-Hartman wrote:
> On Tue, Mar 08, 2016 at 03:53:41PM +0800, Lu Baolu wrote:
>> Intel SOC chips are featured with USB dual role. The host role is
>> provided by Intel xHCI IP, and the gadget role is provided by IP
>> from designware. Ta
On 03/11/2016 08:03 AM, Greg Kroah-Hartman wrote:
> On Tue, Mar 08, 2016 at 03:53:41PM +0800, Lu Baolu wrote:
>> Intel SOC chips are featured with USB dual role. The host role is
>> provided by Intel xHCI IP, and the gadget role is provided by IP
>> from designware. Ta
Several Intel PCHs and SOCs have an internal mux that is used to
share one USB port between device controller and host controller.
The mux is handled through the Dual Role Configuration Register.
Signed-off-by: Heikki Krogerus <heikki.kroge...@linux.intel.com>
Signed-off-by: Lu Baolu
GPIO resource could be retrieved through APCI as well.
Signed-off-by: Lu Baolu <baolu...@linux.intel.com>
Reviewed-by: Felipe Balbi <ba...@kernel.org>
Acked-by: Chanwoo Choi <cw00.c...@samsung.com>
---
drivers/extcon/extcon-usb-gpio.c | 3 ++-
1 file changed, 2 insertions(+), 1
This is needed to handle the GPIO connected USB ID pin found on
Intel Baytrail devices.
Signed-off-by: Lu Baolu <baolu...@linux.intel.com>
Reviewed-by: Felipe Balbi <ba...@kernel.org>
Acked-by: Chanwoo Choi <cw00.c...@samsung.com>
---
drivers/extcon/extcon-usb-gpio.c | 7 +
Several Intel PCHs and SOCs have an internal mux that is used to
share one USB port between device controller and host controller.
The mux is handled through the Dual Role Configuration Register.
Signed-off-by: Heikki Krogerus
Signed-off-by: Lu Baolu
Signed-off-by: Wu Hao
Reviewed-by: Felipe
GPIO resource could be retrieved through APCI as well.
Signed-off-by: Lu Baolu
Reviewed-by: Felipe Balbi
Acked-by: Chanwoo Choi
---
drivers/extcon/extcon-usb-gpio.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/extcon/extcon-usb-gpio.c b/drivers/extcon/extcon
This is needed to handle the GPIO connected USB ID pin found on
Intel Baytrail devices.
Signed-off-by: Lu Baolu
Reviewed-by: Felipe Balbi
Acked-by: Chanwoo Choi
---
drivers/extcon/extcon-usb-gpio.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/extcon/extcon-usb-gpio.c b
mux switch.
Signed-off-by: Lu Baolu <baolu...@linux.intel.com>
Reviewed-by: Felipe Balbi <ba...@kernel.org>
---
drivers/usb/host/pci-quirks.c| 47 ++--
drivers/usb/host/xhci-ext-caps.h | 2 ++
2 files changed, 47 insertions(+), 2 deletions(-)
mux switch.
Signed-off-by: Lu Baolu
Reviewed-by: Felipe Balbi
---
drivers/usb/host/pci-quirks.c| 47 ++--
drivers/usb/host/xhci-ext-caps.h | 2 ++
2 files changed, 47 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb
HOST and PERIPHERAL;
3) The required action to do the real port switch.
This patch adds the common code to handle usb port mux. With this
common code, the individual mux driver, which always is platform
dependent, could focus on the real operation of mux switch.
Signed-off-by: Lu Baolu <ba
Some Intel platforms have an USB port mux controlled by GPIOs.
There's a single ACPI platform device that provides both USB ID
extcon device and a USB port mux device. This MFD driver will
split the 2 devices for their respective drivers.
Signed-off-by: Lu Baolu <baolu...@linux.intel.
HOST and PERIPHERAL;
3) The required action to do the real port switch.
This patch adds the common code to handle usb port mux. With this
common code, the individual mux driver, which always is platform
dependent, could focus on the real operation of mux switch.
Signed-off-by: Lu Baolu
Reviewed
Some Intel platforms have an USB port mux controlled by GPIOs.
There's a single ACPI platform device that provides both USB ID
extcon device and a USB port mux device. This MFD driver will
split the 2 devices for their respective drivers.
Signed-off-by: Lu Baolu
Suggested-by: David Cohen
In some Intel platforms, a single usb port is shared between USB host
and device controller. The shared port is under control of GPIO pins.
This patch adds the support for USB GPIO controlled port mux.
Signed-off-by: David Cohen <david.a.co...@linux.intel.com>
Signed-off-by: Lu Baolu
In some Intel platforms, a single usb port is shared between USB host
and device controller. The shared port is under control of GPIO pins.
This patch adds the support for USB GPIO controlled port mux.
Signed-off-by: David Cohen
Signed-off-by: Lu Baolu
Reviewed-by: Heikki Krogerus
Reviewed
for USB port mux controlled through memory mapped
registers and the logic to create the mux device. This type
of dual role port mux could be found in Cherry Trail and
Broxton devices.
Lu Baolu (7):
extcon: usb-gpio: add device binding for platform device
extcon: usb-gpio: add support
for USB port mux controlled through memory mapped
registers and the logic to create the mux device. This type
of dual role port mux could be found in Cherry Trail and
Broxton devices.
Lu Baolu (7):
extcon: usb-gpio: add device binding for platform device
extcon: usb-gpio: add support
On 03/08/2016 12:40 PM, Lee Jones wrote:
> On Mon, 07 Mar 2016, Lu Baolu wrote:
>
>> Some Intel platforms have an USB port mux controlled by GPIOs.
>> There's a single ACPI platform device that provides both USB ID
>> extcon device and a USB port mux device. This MFD dr
On 03/08/2016 12:40 PM, Lee Jones wrote:
> On Mon, 07 Mar 2016, Lu Baolu wrote:
>
>> Some Intel platforms have an USB port mux controlled by GPIOs.
>> There's a single ACPI platform device that provides both USB ID
>> extcon device and a USB port mux device. This MFD dr
mux switch.
Signed-off-by: Lu Baolu <baolu...@linux.intel.com>
Reviewed-by: Felipe Balbi <ba...@kernel.org>
---
drivers/usb/host/pci-quirks.c| 47 ++--
drivers/usb/host/xhci-ext-caps.h | 2 ++
2 files changed, 47 insertions(+), 2 deletions(-)
mux switch.
Signed-off-by: Lu Baolu
Reviewed-by: Felipe Balbi
---
drivers/usb/host/pci-quirks.c| 47 ++--
drivers/usb/host/xhci-ext-caps.h | 2 ++
2 files changed, 47 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb
HOST and PERIPHERAL;
3) The required action to do the real port switch.
This patch adds the common code to handle usb port mux. With this
common code, the individual mux driver, which always is platform
dependent, could focus on the real operation of mux switch.
Signed-off-by: Lu Baolu <ba
GPIO resource could be retrieved through APCI as well.
Signed-off-by: Lu Baolu <baolu...@linux.intel.com>
Reviewed-by: Felipe Balbi <ba...@kernel.org>
Acked-by: Chanwoo Choi <cw00.c...@samsung.com>
---
drivers/extcon/extcon-usb-gpio.c | 3 ++-
1 file changed, 2 insertions(+), 1
HOST and PERIPHERAL;
3) The required action to do the real port switch.
This patch adds the common code to handle usb port mux. With this
common code, the individual mux driver, which always is platform
dependent, could focus on the real operation of mux switch.
Signed-off-by: Lu Baolu
Reviewed
GPIO resource could be retrieved through APCI as well.
Signed-off-by: Lu Baolu
Reviewed-by: Felipe Balbi
Acked-by: Chanwoo Choi
---
drivers/extcon/extcon-usb-gpio.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/extcon/extcon-usb-gpio.c b/drivers/extcon/extcon
Several Intel PCHs and SOCs have an internal mux that is used to
share one USB port between device controller and host controller.
The mux is handled through the Dual Role Configuration Register.
Signed-off-by: Heikki Krogerus <heikki.kroge...@linux.intel.com>
Signed-off-by: Lu Baolu
Several Intel PCHs and SOCs have an internal mux that is used to
share one USB port between device controller and host controller.
The mux is handled through the Dual Role Configuration Register.
Signed-off-by: Heikki Krogerus
Signed-off-by: Lu Baolu
Signed-off-by: Wu Hao
Reviewed-by: Felipe
In some Intel platforms, a single usb port is shared between USB host
and device controller. The shared port is under control of GPIO pins.
This patch adds the support for USB GPIO controlled port mux.
Signed-off-by: David Cohen <david.a.co...@linux.intel.com>
Signed-off-by: Lu Baolu
Some Intel platforms have an USB port mux controlled by GPIOs.
There's a single ACPI platform device that provides both USB ID
extcon device and a USB port mux device. This MFD driver will
split the 2 devices for their respective drivers.
Signed-off-by: Lu Baolu <baolu...@linux.intel.
In some Intel platforms, a single usb port is shared between USB host
and device controller. The shared port is under control of GPIO pins.
This patch adds the support for USB GPIO controlled port mux.
Signed-off-by: David Cohen
Signed-off-by: Lu Baolu
Reviewed-by: Heikki Krogerus
Reviewed
Some Intel platforms have an USB port mux controlled by GPIOs.
There's a single ACPI platform device that provides both USB ID
extcon device and a USB port mux device. This MFD driver will
split the 2 devices for their respective drivers.
Signed-off-by: Lu Baolu
Suggested-by: David Cohen
This is needed to handle the GPIO connected USB ID pin found on
Intel Baytrail devices.
Signed-off-by: Lu Baolu <baolu...@linux.intel.com>
Reviewed-by: Felipe Balbi <ba...@kernel.org>
Acked-by: Chanwoo Choi <cw00.c...@samsung.com>
---
drivers/extcon/extcon-usb-gpio.c | 7 +
This is needed to handle the GPIO connected USB ID pin found on
Intel Baytrail devices.
Signed-off-by: Lu Baolu
Reviewed-by: Felipe Balbi
Acked-by: Chanwoo Choi
---
drivers/extcon/extcon-usb-gpio.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/extcon/extcon-usb-gpio.c b
for USB port mux controlled through memory mapped
registers and the logic to create the mux device. This type
of dual role port mux could be found in Cherry Trail and
Broxton devices.
Lu Baolu (7):
extcon: usb-gpio: add device binding for platform device
extcon: usb-gpio: add support
for USB port mux controlled through memory mapped
registers and the logic to create the mux device. This type
of dual role port mux could be found in Cherry Trail and
Broxton devices.
Lu Baolu (7):
extcon: usb-gpio: add device binding for platform device
extcon: usb-gpio: add support
On 03/04/2016 09:44 AM, Greg Kroah-Hartman wrote:
> On Fri, Mar 04, 2016 at 09:38:58AM +0800, Lu Baolu wrote:
>>
>> On 03/04/2016 12:14 AM, Greg Kroah-Hartman wrote:
>>> On Thu, Mar 03, 2016 at 02:37:42PM +0800, Lu Baolu wrote:
>>>> Several Intel PCHs and SO
On 03/04/2016 09:44 AM, Greg Kroah-Hartman wrote:
> On Fri, Mar 04, 2016 at 09:38:58AM +0800, Lu Baolu wrote:
>>
>> On 03/04/2016 12:14 AM, Greg Kroah-Hartman wrote:
>>> On Thu, Mar 03, 2016 at 02:37:42PM +0800, Lu Baolu wrote:
>>>> Several Intel PCHs and SO
On 03/04/2016 12:12 AM, Greg Kroah-Hartman wrote:
> On Thu, Mar 03, 2016 at 02:37:42PM +0800, Lu Baolu wrote:
>> Several Intel PCHs and SOCs have an internal mux that is used to
>> share one USB port between device controller and host controller.
>> The mux is handled
On 03/04/2016 12:12 AM, Greg Kroah-Hartman wrote:
> On Thu, Mar 03, 2016 at 02:37:42PM +0800, Lu Baolu wrote:
>> Several Intel PCHs and SOCs have an internal mux that is used to
>> share one USB port between device controller and host controller.
>> The mux is handled
On 03/04/2016 12:14 AM, Greg Kroah-Hartman wrote:
> On Thu, Mar 03, 2016 at 02:37:42PM +0800, Lu Baolu wrote:
>> Several Intel PCHs and SOCs have an internal mux that is used to
>> share one USB port between device controller and host controller.
>> The mux is handled
On 03/04/2016 12:14 AM, Greg Kroah-Hartman wrote:
> On Thu, Mar 03, 2016 at 02:37:42PM +0800, Lu Baolu wrote:
>> Several Intel PCHs and SOCs have an internal mux that is used to
>> share one USB port between device controller and host controller.
>> The mux is handled
On 03/04/2016 12:15 AM, Greg Kroah-Hartman wrote:
> On Thu, Mar 03, 2016 at 02:37:40PM +0800, Lu Baolu wrote:
>> +#if IS_ENABLED(CONFIG_USB_MUX)
>> +extern int usb_mux_register(struct usb_mux_dev *mux);
>> +extern int usb_mux_unregister(struct device *dev);
>>
On 03/04/2016 12:15 AM, Greg Kroah-Hartman wrote:
> On Thu, Mar 03, 2016 at 02:37:40PM +0800, Lu Baolu wrote:
>> +#if IS_ENABLED(CONFIG_USB_MUX)
>> +extern int usb_mux_register(struct usb_mux_dev *mux);
>> +extern int usb_mux_unregister(struct device *dev);
>>
On 03/04/2016 12:10 AM, Greg Kroah-Hartman wrote:
> On Thu, Mar 03, 2016 at 02:37:40PM +0800, Lu Baolu wrote:
>> Several Intel PCHs and SOCs have an internal mux that is used to
>> share one USB port between device controller and host controller.
>>
>> A usb p
On 03/04/2016 12:10 AM, Greg Kroah-Hartman wrote:
> On Thu, Mar 03, 2016 at 02:37:40PM +0800, Lu Baolu wrote:
>> Several Intel PCHs and SOCs have an internal mux that is used to
>> share one USB port between device controller and host controller.
>>
>> A usb p
On 03/03/2016 03:24 PM, Chanwoo Choi wrote:
> Hi Lu,
>
> On 2016년 03월 03일 15:37, Lu Baolu wrote:
>> GPIO resource could be retrieved through APCI as well.
>>
>> Signed-off-by: Lu Baolu <baolu...@linux.intel.com>
>> Reviewed-by: Felipe Balbi <ba...@kernel
On 03/03/2016 03:24 PM, Chanwoo Choi wrote:
> Hi Lu,
>
> On 2016년 03월 03일 15:37, Lu Baolu wrote:
>> GPIO resource could be retrieved through APCI as well.
>>
>> Signed-off-by: Lu Baolu
>> Reviewed-by: Felipe Balbi
>> ---
>> drivers/extcon/ex
On 03/03/2016 03:24 PM, Chanwoo Choi wrote:
> Hell Lu,
>
> On 2016년 03월 03일 15:37, Lu Baolu wrote:
>> This is needed to handle the GPIO connected USB ID pin found on
>> Intel Baytrail devices.
>>
>> Signed-off-by: Lu Baolu <baolu...@linux.intel.com>
>>
On 03/03/2016 03:24 PM, Chanwoo Choi wrote:
> Hell Lu,
>
> On 2016년 03월 03일 15:37, Lu Baolu wrote:
>> This is needed to handle the GPIO connected USB ID pin found on
>> Intel Baytrail devices.
>>
>> Signed-off-by: Lu Baolu
>> Reviewed-by: Felipe Balb
This is needed to handle the GPIO connected USB ID pin found on
Intel Baytrail devices.
Signed-off-by: Lu Baolu <baolu...@linux.intel.com>
Reviewed-by: Felipe Balbi <ba...@kernel.org>
---
drivers/extcon/extcon-usb-gpio.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/dr
This is needed to handle the GPIO connected USB ID pin found on
Intel Baytrail devices.
Signed-off-by: Lu Baolu
Reviewed-by: Felipe Balbi
---
drivers/extcon/extcon-usb-gpio.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/extcon/extcon-usb-gpio.c b/drivers/extcon/extcon-usb
GPIO resource could be retrieved through APCI as well.
Signed-off-by: Lu Baolu <baolu...@linux.intel.com>
Reviewed-by: Felipe Balbi <ba...@kernel.org>
---
drivers/extcon/extcon-usb-gpio.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/extcon/extcon-
In some Intel platforms, a single usb port is shared between USB host
and device controller. The shared port is under control of GPIO pins.
This patch adds the support for USB GPIO controlled port mux.
Signed-off-by: David Cohen <david.a.co...@linux.intel.com>
Signed-off-by: Lu Baolu
GPIO resource could be retrieved through APCI as well.
Signed-off-by: Lu Baolu
Reviewed-by: Felipe Balbi
---
drivers/extcon/extcon-usb-gpio.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/extcon/extcon-usb-gpio.c b/drivers/extcon/extcon-usb-gpio.c
index af9c8b0
In some Intel platforms, a single usb port is shared between USB host
and device controller. The shared port is under control of GPIO pins.
This patch adds the support for USB GPIO controlled port mux.
Signed-off-by: David Cohen
Signed-off-by: Lu Baolu
Reviewed-by: Heikki Krogerus
Reviewed
Several Intel PCHs and SOCs have an internal mux that is used to
share one USB port between device controller and host controller.
The mux is handled through the Dual Role Configuration Register.
Signed-off-by: Heikki Krogerus <heikki.kroge...@linux.intel.com>
Signed-off-by: Lu Baolu
HOST and PERIPHERAL;
3) The required action to do the real port switch.
This patch adds the common code to handle usb port mux. With this
common code, the individual mux driver, which always is platform
dependent, could focus on the real operation of mux switch.
Signed-off-by: Lu Baolu <ba
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