-architecture-specification
[4] https://lkml.org/lkml/2018/7/26/4
[5] https://www.spinics.net/lists/iommu/msg31874.html
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Cc: Liu Yi L
Suggested-by: Kevin Tian
Suggested-by: Jean-Philippe Brucker
Suggested-by: Joerg Roedel
Signed-off-by: Lu Baolu
Reviewed
/detach_device() ops
to support managing PASID granular translation structures
when the device driver has enabled multiple domains per
device.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Signed-off-by: Sanjay Kumar
Signed-off-by: Liu Yi L
Signed-off-by: Lu Baolu
---
drivers/iommu/intel-iommu.c | 152
Hi,
On 2/15/19 4:14 AM, Alex Williamson wrote:
On Wed, 13 Feb 2019 12:02:52 +0800
Lu Baolu wrote:
Hi,
The Mediate Device is a framework for fine-grained physical device
sharing across the isolated domains. Currently the mdev framework
is designed to be independent of the platform IOMMU
Hi Kirti,
On 2/15/19 4:14 AM, Alex Williamson wrote:
On Wed, 13 Feb 2019 12:02:52 +0800
Lu Baolu wrote:
Hi,
The Mediate Device is a framework for fine-grained physical device
sharing across the isolated domains. Currently the mdev framework
is designed to be independent of the platform
://schd.ws/hosted_files/lc32018/00/LC3-SIOV-final.pdf
Best regards,
Lu Baolu
Change log:
v5->v6:
This looks pretty reasonable with Jean-Philippe's nit fixups. Where do
we go from here? I think we need an ack from Kirti since they have an
interest here. Presumably this looks ok to the ARM fo
Hi Jean,
On 2/13/19 7:55 PM, Jean-Philippe Brucker wrote:
Hi,
I have a few boring nits and one question below
Thanks a lot for reviewing my patch.
On 13/02/2019 04:02, Lu Baolu wrote:
Sharing a physical PCI device in a finer-granularity way
is becoming a consensus in the industry. IOMMU
: Kevin Tian
Signed-off-by: Sanjay Kumar
Signed-off-by: Liu Yi L
Signed-off-by: Lu Baolu
---
drivers/iommu/intel-iommu.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 8ecf09db6047..b79c72cc5931 100644
--- a/drivers
don't need to set the
iommu device if it uses vendor defined isolation.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Cc: Liu Yi L
Suggested-by: Kevin Tian
Suggested-by: Alex Williamson
Signed-off-by: Lu Baolu
---
drivers/vfio/mdev/mdev_core.c| 18 ++
drivers/vfi
scope)
instead. The added helper supports attaching domain to
groups for both pci and mdev devices.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Signed-off-by: Sanjay Kumar
Signed-off-by: Liu Yi L
Signed-off-by: Lu Baolu
---
drivers/vfio/vfio_iommu_type1.c | 84
This part of code could be used by both normal and aux
domain specific attach entries. Hence move them into a
common function to avoid duplication.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Signed-off-by: Lu Baolu
---
drivers/iommu/intel-iommu.c | 60 ++---
1
Cc: Kevin Tian
Signed-off-by: Sanjay Kumar
Signed-off-by: Liu Yi L
Signed-off-by: Lu Baolu
---
drivers/vfio/vfio_iommu_type1.c | 48 -
1 file changed, 41 insertions(+), 7 deletions(-)
diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1
/detach_device() ops
to support managing PASID granular translation structures
when the device driver has enabled multiple domains per
device.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Signed-off-by: Sanjay Kumar
Signed-off-by: Liu Yi L
Signed-off-by: Lu Baolu
---
drivers/iommu/intel-iommu.c | 152
This adds the iommu ops entries for aux-domain per-device
feature query and enable/disable.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Signed-off-by: Sanjay Kumar
Signed-off-by: Liu Yi L
Signed-off-by: Lu Baolu
---
drivers/iommu/intel-iommu.c | 159
-specification
[4] https://lkml.org/lkml/2018/7/26/4
[5] https://www.spinics.net/lists/iommu/msg31874.html
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Cc: Liu Yi L
Suggested-by: Kevin Tian
Suggested-by: Jean-Philippe Brucker
Suggested-by: Joerg Roedel
Signed-off-by: Lu Baolu
---
drivers/iommu
This moves intel_iommu_enable_pasid() out of the scope of
CONFIG_INTEL_IOMMU_SVM with more and more features requiring
pasid function.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Signed-off-by: Lu Baolu
---
drivers/iommu/intel-iommu.c | 22 +++---
drivers/iommu/intel-svm.c
https://software.intel.com/en-us/download/intel-scalable-io-virtualization-technical-specification
[3] https://schd.ws/hosted_files/lc32018/00/LC3-SIOV-final.pdf
Best regards,
Lu Baolu
Change log:
v5->v6:
- Add a new API iommu_dev_feature_enabled() to check whether
an IOMMU specific feature is enabled.
Hi,
On 2/11/19 11:33 AM, Bjorn Helgaas wrote:
On Sun, Feb 10, 2019 at 8:00 PM Lu Baolu wrote:
Hi,
On 2/9/19 6:06 AM, Bjorn Helgaas wrote:
From: Bjorn Helgaas
A local variable initialization is a hint that the variable will be used in
an unusual way. If the initialization is unnecessary
t" might go through
dma_pte_clear_level() without any touches.
Best regards,
Lu Baolu
Hi Joerg,
On 1/24/19 9:22 PM, Joerg Roedel wrote:
On Thu, Jan 24, 2019 at 10:31:32AM +0800, Lu Baolu wrote:
Commit 765b6a98c1de3 ("iommu/vt-d: Enumerate the scalable
mode capability") enables VT-d scalable mode if hardware
advertises the capability. As we will bring up differen
n, dev)
Best regards,
Lu Baolu
atures are supported
in the kernel.
Cc: Liu Yi L
Cc: Jacob Pan
Suggested-by: Ashok Raj
Suggested-by: Kevin Tian
Signed-off-by: Lu Baolu
---
Documentation/admin-guide/kernel-parameters.txt | 7 +++
drivers/iommu/intel-iommu.c | 8
2 files changed, 7 insert
Hi,
On 1/14/19 8:26 PM, Jonathan Cameron wrote:
On Thu, 10 Jan 2019 11:00:23 +0800
Lu Baolu wrote:
When multiple domains per device has been enabled by the
device driver, the device will tag the default PASID for
the domain to all DMA traffics out of the subset of this
device; and the IOMMU
Hi,
On 1/14/19 7:22 PM, Jonathan Cameron wrote:
On Thu, 10 Jan 2019 11:00:20 +0800
Lu Baolu wrote:
Sharing a physical PCI device in a finer-granularity way
is becoming a consensus in the industry. IOMMU vendors
are also engaging efforts to support such sharing as well
as possible. Among
extended capability list.
More below:
On Thu, Jan 10, 2019 at 11:00:21AM +0800, Lu Baolu wrote:
+static int intel_iommu_enable_auxd(struct device *dev)
+{
+ struct device_domain_info *info;
+ struct dmar_domain *domain;
+ unsigned long flags;
+
+ if (!scalable_mode_support
de")
Signed-off-by: Lu Baolu
---
drivers/iommu/intel-svm.c | 77 ++---
include/linux/intel-iommu.h | 21 +-
include/linux/intel-svm.h | 2 +-
3 files changed, 55 insertions(+), 45 deletions(-)
diff --git a/drivers/iommu/intel-svm.c b/drivers/iom
don't need to set the
iommu device if it uses vendor defined isolation.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Cc: Liu Yi L
Suggested-by: Kevin Tian
Suggested-by: Alex Williamson
Signed-off-by: Lu Baolu
---
drivers/vfio/mdev/mdev_core.c| 18 ++
drivers/vfi
Cc: Kevin Tian
Signed-off-by: Sanjay Kumar
Signed-off-by: Liu Yi L
Signed-off-by: Lu Baolu
---
drivers/vfio/vfio_iommu_type1.c | 48 -
1 file changed, 41 insertions(+), 7 deletions(-)
diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1
/detach_device() ops
to support managing PASID granular translation structures
when the device driver has enabled multiple domains per
device.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Signed-off-by: Sanjay Kumar
Signed-off-by: Liu Yi L
Signed-off-by: Lu Baolu
---
drivers/iommu/intel-iommu.c | 152
This part of code could be used by both normal and aux
domain specific attach entries. Hence move them into a
common function to avoid duplication.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Signed-off-by: Lu Baolu
---
drivers/iommu/intel-iommu.c | 60 ++---
1
scope)
instead. The added helper supports attaching domain to
groups for both pci and mdev devices.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Signed-off-by: Sanjay Kumar
Signed-off-by: Liu Yi L
Signed-off-by: Lu Baolu
---
drivers/vfio/vfio_iommu_type1.c | 84
: Kevin Tian
Signed-off-by: Sanjay Kumar
Signed-off-by: Liu Yi L
Signed-off-by: Lu Baolu
---
drivers/iommu/intel-iommu.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index b8fb6a4bd447..614906276bf1 100644
--- a/drivers
: Jacob Pan
Cc: Kevin Tian
Cc: Liu Yi L
Suggested-by: Kevin Tian
Suggested-by: Jean-Philippe Brucker
Suggested-by: Joerg Roedel
Signed-off-by: Lu Baolu
---
drivers/iommu/iommu.c | 80 +++
include/linux/iommu.h | 61 +
2 files
This adds the iommu ops entries for aux-domain per-device
feature query and enable/disable.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Signed-off-by: Sanjay Kumar
Signed-off-by: Liu Yi L
Signed-off-by: Lu Baolu
---
drivers/iommu/intel-iommu.c | 86
0/LC3-SIOV-final.pdf
Best regards,
Lu Baolu
Change log:
v4->v5:
- The iommu APIs have been updated with Joerg's proposal posted
here https://www.spinics.net/lists/iommu/msg31874.html.
- Some typos in commit message and comments have been fixed.
- PATCH 3/8 was split from 4/8 to e
Hi,
On 12/16/18 6:38 AM, Liu, Yi L wrote:
From: Lu Baolu [mailto:baolu...@linux.intel.com]
Sent: Sunday, November 11, 2018 10:45 PM
Subject: [RFC PATCH 1/5] iommu: Add APIs for IOMMU PASID management
This adds APIs for IOMMU drivers and device drivers to manage the PASIDs used
for
DMA
So that the pasid related info, such as the pasid table and the
maximum of pasid could be used during setting up scalable mode
context.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Cc: Liu Yi L
Cc: Sanjay Kumar
Signed-off-by: Lu Baolu
Reviewed-by: Ashok Raj
Reviewed-by: Kevin Tian
So that they could also be used in other source files.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Cc: Liu Yi L
Cc: Sanjay Kumar
Signed-off-by: Lu Baolu
Reviewed-by: Ashok Raj
Reviewed-by: Kevin Tian
---
drivers/iommu/intel-iommu.c | 43 -
include/linux
and
pass-through translations.
This reserves a domain id for first-level and pass-through
translations.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Cc: Liu Yi L
Cc: Sanjay Kumar
Signed-off-by: Lu Baolu
---
drivers/iommu/intel-iommu.c | 10 ++
drivers/iommu/intel-pasid.h | 6 ++
2
This adds an interface to setup the PASID entries for first
level page table translation.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Signed-off-by: Sanjay Kumar
Signed-off-by: Liu Yi L
Signed-off-by: Lu Baolu
Reviewed-by: Ashok Raj
---
drivers/iommu/intel-pasid.c | 80
This patch enables the current SVA (Shared Virtual Address)
implementation to work in the scalable mode.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Signed-off-by: Sanjay Kumar
Signed-off-by: Liu Yi L
Signed-off-by: Lu Baolu
Reviewed-by: Ashok Raj
---
drivers/iommu/intel-iommu.c | 38
Deferred invalidation is an ECS specific feature. It will not be
supported when IOMMU works in scalable mode. As we deprecated the
ECS support, remove deferred invalidation and cleanup the code.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Cc: Liu Yi L
Cc: Sanjay Kumar
Signed-off-by: Lu Baolu
This adds the interfaces to setup or tear down the structures
for second level page table translations. This includes types
of second level only translation and pass through.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Signed-off-by: Sanjay Kumar
Signed-off-by: Liu Yi L
Signed-off-by: Lu
This patch enables the translation for requests without PASID in
the scalable mode by setting up the root and context entries.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Signed-off-by: Sanjay Kumar
Signed-off-by: Liu Yi L
Signed-off-by: Lu Baolu
Reviewed-by: Ashok Raj
---
drivers/iommu
use the PASID 0 as a sort of design decision.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Signed-off-by: Sanjay Kumar
Signed-off-by: Liu Yi L
Signed-off-by: Lu Baolu
Reviewed-by: Ashok Raj
---
drivers/iommu/intel-iommu.c | 20
drivers/iommu/intel-pasid.h | 1 +
2 files
).
This patch adds enumeration for Scalable Mode and removes
the deprecated ECS enumeration. It provides a boot time
option to disable scalable mode even hardware claims to
support it.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Signed-off-by: Sanjay Kumar
Signed-off-by: Liu Yi L
Signed-off-by: Lu
1;
- Add 256-bit invalidation descriptor support;
- Reserve a domain id for first level and pass-through
usage to make hardware cache entries more efficiently;
- Various code refinements.
Lu Baolu (12):
iommu/vt-d: Enumerate the scalable mode capability
iommu/vt-d: Manage scalalble
table entry according to the pasid value.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Signed-off-by: Sanjay Kumar
Signed-off-by: Liu Yi L
Signed-off-by: Lu Baolu
Reviewed-by: Ashok Raj
---
drivers/iommu/intel-iommu.c | 23 ++
drivers/iommu/intel-
256-bit invalidation descriptor support
if the hardware presents scalable mode capability.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Signed-off-by: Sanjay Kumar
Signed-off-by: Liu Yi L
Signed-off-by: Lu Baolu
---
drivers/iommu/dmar.c| 91
/detach_device() ops
to support managing PASID granular translation structures
when the device driver has enabled multiple domains per
device.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Signed-off-by: Sanjay Kumar
Signed-off-by: Lu Baolu
Signed-off-by: Liu Yi L
---
drivers/iommu/intel-iommu.c | 192
/detach_device() ops
to support managing PASID granular translation structures
when the device driver has enabled multiple domains per
device.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Signed-off-by: Sanjay Kumar
Signed-off-by: Lu Baolu
Signed-off-by: Liu Yi L
---
drivers/iommu/intel-iommu.c | 192
Hi,
On 05/16/2018 04:56 PM, Tian, Kevin wrote:
>> From: Lu Baolu [mailto:baolu...@linux.intel.com]
>> Sent: Wednesday, May 16, 2018 4:01 PM
>>
>> Hi Joerg,
>>
>> Thank you for looking at my patches.
>>
>> On 05/15/2018 10:11 PM, Joerg Roedel wrote:
Hi,
On 05/16/2018 04:56 PM, Tian, Kevin wrote:
>> From: Lu Baolu [mailto:baolu...@linux.intel.com]
>> Sent: Wednesday, May 16, 2018 4:01 PM
>>
>> Hi Joerg,
>>
>> Thank you for looking at my patches.
>>
>> On 05/15/2018 10:11 PM, Joerg Roedel wrote:
Hi Joerg,
Thank you for looking at my patches.
On 05/15/2018 10:11 PM, Joerg Roedel wrote:
> On Fri, May 04, 2018 at 09:41:15AM +0800, Lu Baolu wrote:
>> PATCH 4~9 implement per domain PASID table. Current per IOMMU
>> PASID table implementation is insecure in the cases where
>
Hi Joerg,
Thank you for looking at my patches.
On 05/15/2018 10:11 PM, Joerg Roedel wrote:
> On Fri, May 04, 2018 at 09:41:15AM +0800, Lu Baolu wrote:
>> PATCH 4~9 implement per domain PASID table. Current per IOMMU
>> PASID table implementation is insecure in the cases where
>
Hi,
On 05/15/2018 04:55 AM, Jacob Pan wrote:
> On Mon, 14 May 2018 14:01:06 +0800
> Lu Baolu <baolu...@linux.intel.com> wrote:
>
>> Hi,
>>
>> On 05/12/2018 04:54 AM, Jacob Pan wrote:
>>> Traditionally, device specific faults are detected and handled
>&
Hi,
On 05/15/2018 04:55 AM, Jacob Pan wrote:
> On Mon, 14 May 2018 14:01:06 +0800
> Lu Baolu wrote:
>
>> Hi,
>>
>> On 05/12/2018 04:54 AM, Jacob Pan wrote:
>>> Traditionally, device specific faults are detected and handled
>>> within their own
ble_iommu;
> }
> #endif
> - ret = dmar_set_interrupt(iommu);
> + ret = dmar_set_interrupt(iommu, true);
> if (ret)
> goto disable_iommu;
>
> diff --git a/include/linux/dmar.h b/include/linux/dmar.h
> index e2433bc..21f2162 100644
> --- a/include/linux/dmar.h
> +++ b/include/linux/dmar.h
> @@ -278,7 +278,7 @@ extern void dmar_msi_unmask(struct irq_data *data);
> extern void dmar_msi_mask(struct irq_data *data);
> extern void dmar_msi_read(int irq, struct msi_msg *msg);
> extern void dmar_msi_write(int irq, struct msi_msg *msg);
> -extern int dmar_set_interrupt(struct intel_iommu *iommu);
> +extern int dmar_set_interrupt(struct intel_iommu *iommu, bool queue_fault);
> extern irqreturn_t dmar_fault(int irq, void *dev_id);
> extern int dmar_alloc_hwirq(int id, int node, void *arg);
> extern void dmar_free_hwirq(int irq);
> diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
> index 5ac0c28..b3a26c7 100644
> --- a/include/linux/intel-iommu.h
> +++ b/include/linux/intel-iommu.h
> @@ -472,6 +472,7 @@ struct intel_iommu {
> struct iommu_device iommu; /* IOMMU core code handle */
> int node;
> u32 flags; /* Software defined flags */
> + struct workqueue_struct *fault_wq; /* Reporting IOMMU fault to device */
> };
>
> /* PCI domain-device relationship */
Best regards,
Lu Baolu
interrupt(iommu, true);
> if (ret)
> goto disable_iommu;
>
> diff --git a/include/linux/dmar.h b/include/linux/dmar.h
> index e2433bc..21f2162 100644
> --- a/include/linux/dmar.h
> +++ b/include/linux/dmar.h
> @@ -278,7 +278,7 @@ extern void dmar_msi_unmask(struct irq_data *data);
> extern void dmar_msi_mask(struct irq_data *data);
> extern void dmar_msi_read(int irq, struct msi_msg *msg);
> extern void dmar_msi_write(int irq, struct msi_msg *msg);
> -extern int dmar_set_interrupt(struct intel_iommu *iommu);
> +extern int dmar_set_interrupt(struct intel_iommu *iommu, bool queue_fault);
> extern irqreturn_t dmar_fault(int irq, void *dev_id);
> extern int dmar_alloc_hwirq(int id, int node, void *arg);
> extern void dmar_free_hwirq(int irq);
> diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
> index 5ac0c28..b3a26c7 100644
> --- a/include/linux/intel-iommu.h
> +++ b/include/linux/intel-iommu.h
> @@ -472,6 +472,7 @@ struct intel_iommu {
> struct iommu_device iommu; /* IOMMU core code handle */
> int node;
> u32 flags; /* Software defined flags */
> + struct workqueue_struct *fault_wq; /* Reporting IOMMU fault to device */
> };
>
> /* PCI domain-device relationship */
Best regards,
Lu Baolu
1, F2, F3 timeout won't be handled until the timer expires
again at 20s. That means a fault might be pending there until about
(2 * prq_timeout) seconds later.
Out of curiosity, Why not adding a timer in iommu_fault_event, starting it in
iommu_report_device_fault() and removing it in iommu_page_response()?
Best regards,
Lu B
ght be pending there until about
(2 * prq_timeout) seconds later.
Out of curiosity, Why not adding a timer in iommu_fault_event, starting it in
iommu_report_device_fault() and removing it in iommu_page_response()?
Best regards,
Lu Baolu
> /**
> * iommu_register_device_fault_handler()
page_req_group_id == evt->page_req_group_id) {
> + msg->private_data = evt->iommu_private;
> + ret = domain->ops->page_response(dev, msg);
> + list_del(>list);
> + kfree(evt);
> +
{
> + msg->private_data = evt->iommu_private;
> + ret = domain->ops->page_response(dev, msg);
> + list_del(>list);
> + kfree(evt);
> + break;
> + }
> + }
Are above two ch
r_t handler,
> + void *data);
> +
> +extern int iommu_unregister_device_fault_handler(struct device *dev);
> +
> +extern int iommu_report_device_fault(struct device *dev, struct
> iommu_fault_event *evt);
> +
> extern int iommu_group_id(struct iommu_group *group);
> extern struct iommu_group *iommu_group_get_for_dev(struct device *dev);
> extern struct iommu_domain *iommu_group_default_domain(struct iommu_group *);
> @@ -727,6 +741,23 @@ static inline int iommu_group_unregister_notifier(struct
> iommu_group *group,
> return 0;
> }
>
> +static inline int iommu_register_device_fault_handler(struct device *dev,
> + iommu_dev_fault_handler_t
> handler,
> + void *data)
> +{
> + return -ENODEV;
> +}
> +
> +static inline int iommu_unregister_device_fault_handler(struct device *dev)
> +{
> + return 0;
> +}
> +
> +static inline int iommu_report_device_fault(struct device *dev, struct
> iommu_fault_event *evt)
> +{
> + return -ENODEV;
> +}
> +
> static inline int iommu_group_id(struct iommu_group *group)
> {
> return -ENODEV;
Best regards,
Lu Baolu
_unregister_device_fault_handler(struct device *dev);
> +
> +extern int iommu_report_device_fault(struct device *dev, struct
> iommu_fault_event *evt);
> +
> extern int iommu_group_id(struct iommu_group *group);
> extern struct iommu_group *iommu_group_get_for_dev(struct device *dev);
> extern struct iommu_domain *iommu_group_default_domain(struct iommu_group *);
> @@ -727,6 +741,23 @@ static inline int iommu_group_unregister_notifier(struct
> iommu_group *group,
> return 0;
> }
>
> +static inline int iommu_register_device_fault_handler(struct device *dev,
> + iommu_dev_fault_handler_t
> handler,
> + void *data)
> +{
> + return -ENODEV;
> +}
> +
> +static inline int iommu_unregister_device_fault_handler(struct device *dev)
> +{
> + return 0;
> +}
> +
> +static inline int iommu_report_device_fault(struct device *dev, struct
> iommu_fault_event *evt)
> +{
> + return -ENODEV;
> +}
> +
> static inline int iommu_group_id(struct iommu_group *group)
> {
> return -ENODEV;
Best regards,
Lu Baolu
is to create a parent pointer under device struct and
move previous iommu_group and iommu_fwspec together with
the iommu fault related data into it.
Best regards,
Lu Baolu
>
> Suggested-by: Greg Kroah-Hartman <gre...@linuxfoundation.org>
> Reviewed-by: Greg Kroah-Hartman <gre...@linu
is to create a parent pointer under device struct and
move previous iommu_group and iommu_fwspec together with
the iommu fault related data into it.
Best regards,
Lu Baolu
>
> Suggested-by: Greg Kroah-Hartman
> Reviewed-by: Greg Kroah-Hartman
> Signed-off-by: Jacob Pan
> Link: https:
> +out_unlock:
> + spin_unlock(>lock);
> + spin_unlock_irqrestore(_domain_lock, flags);
> +
> + return ret;
> +}
> +
> static int intel_iommu_map(struct iommu_domain *domain,
> unsigned long iova, phys_addr_t hpa,
> size_t size, int iommu_prot)
> @@ -5401,6 +5529,7 @@ const struct iommu_ops intel_iommu_ops = {
> #ifdef CONFIG_INTEL_IOMMU_SVM
> .bind_pasid_table = intel_iommu_bind_pasid_table,
> .unbind_pasid_table = intel_iommu_unbind_pasid_table,
> + .sva_invalidate = intel_iommu_sva_invalidate,
> #endif
> .map= intel_iommu_map,
> .unmap = intel_iommu_unmap,
Best regards,
Lu Baolu
OMMU_INV_TYPE_TLB,
IOMMU_INV_TYPE_PASID,
IOMMU_INV_NR_TYPE
};
So "unsupported" looks better than "unknown" in the message.
> + ret = -EINVAL;
> + }
> +out_unlock:
> + spin_unlock(>lock);
> + spin_unlock_irqrestore(_domain_lock, flags);
> +
> + return ret;
> +}
> +
> static int intel_iommu_map(struct iommu_domain *domain,
> unsigned long iova, phys_addr_t hpa,
> size_t size, int iommu_prot)
> @@ -5401,6 +5529,7 @@ const struct iommu_ops intel_iommu_ops = {
> #ifdef CONFIG_INTEL_IOMMU_SVM
> .bind_pasid_table = intel_iommu_bind_pasid_table,
> .unbind_pasid_table = intel_iommu_unbind_pasid_table,
> + .sva_invalidate = intel_iommu_sva_invalidate,
> #endif
> .map= intel_iommu_map,
> .unmap = intel_iommu_unmap,
Best regards,
Lu Baolu
struct intel_iommu *iommu, u16 sid, u16 pfsid,
> u16 qdep, u64 addr, unsigned mask);
> +
> +extern void qi_flush_dev_eiotlb(struct intel_iommu *iommu, u16 sid,
> + u32 pasid, u16 qdep, u64 addr, unsigned size, u64
> granu);
> +extern void qi_flush_pasid(struct intel_iommu *iommu, u16 did, u64 granu,
> int pasid);
> +
> extern int qi_submit_sync(struct qi_desc *desc, struct intel_iommu *iommu);
>
> extern int dmar_ir_support(void);
Best regards,
Lu Baolu
unsigned int size_order, u64 type);
> +extern void qi_flush_eiotlb(struct intel_iommu *iommu, u16 did, u64 addr,
> + u32 pasid, unsigned int size_order, u64 type, bool
> global);
> extern void qi_flush_dev_iotlb(struct intel_iommu *iommu, u16 sid, u16 pfsid,
> u16 qdep, u64 addr, unsigned mask);
> +
> +extern void qi_flush_dev_eiotlb(struct intel_iommu *iommu, u16 sid,
> + u32 pasid, u16 qdep, u64 addr, unsigned size, u64
> granu);
> +extern void qi_flush_pasid(struct intel_iommu *iommu, u16 did, u64 granu,
> int pasid);
> +
> extern int qi_submit_sync(struct qi_desc *desc, struct intel_iommu *iommu);
>
> extern int dmar_ir_support(void);
Best regards,
Lu Baolu
unsigned int size_order, u64 type);
> -extern void qi_flush_dev_iotlb(struct intel_iommu *iommu, u16 sid, u16 qdep,
> - u64 addr, unsigned mask);
> -
> +extern void qi_flush_dev_iotlb(struct intel_iommu *iommu, u16 sid, u16 pfsid,
> + u16 qdep, u64 addr, unsigned mask);
Alignment should match open parenthesis.
> extern int qi_submit_sync(struct qi_desc *desc, struct intel_iommu *iommu);
>
> extern int dmar_ir_support(void);
Best regards,
Lu Baolu
type);
> -extern void qi_flush_dev_iotlb(struct intel_iommu *iommu, u16 sid, u16 qdep,
> -u64 addr, unsigned mask);
> -
> +extern void qi_flush_dev_iotlb(struct intel_iommu *iommu, u16 sid, u16 pfsid,
> + u16 qdep, u64 addr, unsigned mask);
Alignment should match open parenthesis.
> extern int qi_submit_sync(struct qi_desc *desc, struct intel_iommu *iommu);
>
> extern int dmar_ir_support(void);
Best regards,
Lu Baolu
struct list_head global; /* link to global list */
> u8 bus; /* PCI bus number */
> u8 devfn; /* PCI devfn number */
> + u16 pfsid; /* SRIOV physical function source ID */
> u8 pasid_supported:3;
> u8 pasid_enabled:1;
> u8 pri_supported:1;
Best regards,
Lu Baolu
o global list */
> u8 bus; /* PCI bus number */
> u8 devfn; /* PCI devfn number */
> + u16 pfsid; /* SRIOV physical function source ID */
> u8 pasid_supported:3;
> u8 pasid_enabled:1;
> u8 pri_supported:1;
Best regards,
Lu Baolu
iommu_ops = {
> .domain_free= intel_iommu_domain_free,
> .attach_dev = intel_iommu_attach_device,
> .detach_dev = intel_iommu_detach_device,
> +#ifdef CONFIG_INTEL_IOMMU_SVM
> + .bind_pasid_table = intel_iommu_bind_pasid_table,
> + .unbind_pasid_table = intel_iommu_unbind_pasid_table,
> +#endif
> .map= intel_iommu_map,
> .unmap = intel_iommu_unmap,
> .map_sg = default_iommu_map_sg,
> diff --git a/include/linux/dma_remapping.h b/include/linux/dma_remapping.h
> index 21b3e7d..db290b2 100644
> --- a/include/linux/dma_remapping.h
> +++ b/include/linux/dma_remapping.h
> @@ -28,6 +28,7 @@
>
> #define CONTEXT_DINVE(1ULL << 8)
> #define CONTEXT_PRS (1ULL << 9)
> +#define CONTEXT_NESTE(1ULL << 10)
> #define CONTEXT_PASIDE (1ULL << 11)
>
> struct intel_iommu;
Best regards,
Lu Baolu
= intel_iommu_attach_device,
> .detach_dev = intel_iommu_detach_device,
> +#ifdef CONFIG_INTEL_IOMMU_SVM
> + .bind_pasid_table = intel_iommu_bind_pasid_table,
> + .unbind_pasid_table = intel_iommu_unbind_pasid_table,
> +#endif
> .map= intel_iommu_map,
> .unmap = intel_iommu_unmap,
> .map_sg = default_iommu_map_sg,
> diff --git a/include/linux/dma_remapping.h b/include/linux/dma_remapping.h
> index 21b3e7d..db290b2 100644
> --- a/include/linux/dma_remapping.h
> +++ b/include/linux/dma_remapping.h
> @@ -28,6 +28,7 @@
>
> #define CONTEXT_DINVE(1ULL << 8)
> #define CONTEXT_PRS (1ULL << 9)
> +#define CONTEXT_NESTE(1ULL << 10)
> #define CONTEXT_PASIDE (1ULL << 11)
>
> struct intel_iommu;
Best regards,
Lu Baolu
nabled:1;
> u8 ats_supported:1;
> u8 ats_enabled:1;
> + u8 pasid_table_bound:1;
Can you please add some comments here? So that, people can
understand the purpose for this bit exactly.
Best regards,
Lu Baolu
> u8 ats_qdep;
> u64 fault_mask; /* selected IOMMU fa
orted:1;
> u8 ats_enabled:1;
> + u8 pasid_table_bound:1;
Can you please add some comments here? So that, people can
understand the purpose for this bit exactly.
Best regards,
Lu Baolu
> u8 ats_qdep;
> u64 fault_mask; /* selected IOMMU faults to be reported */
> struct device *dev; /* it's NULL for PCIe-to-PCI bridge */
Hi,
On 05/12/2018 04:53 AM, Jacob Pan wrote:
> Adding a flag in device domain into to track whether a guest or
typo: ^^info
Best regards,
Lu Baolu
> user PASID table is bound to a device.
>
> Signed-off-by: Jacob Pan <jacob.jun@
Hi,
On 05/12/2018 04:53 AM, Jacob Pan wrote:
> Adding a flag in device domain into to track whether a guest or
typo: ^^info
Best regards,
Lu Baolu
> user PASID table is bound to a device.
>
> Signed-off-by: Jacob Pan
> ---
> include/l
n mapping
> will trigger the MAP PSI notifications.
>
> Without the patchset, nested device assignment (assign one device
> firstly to L1 guest, then to L2 guest) won't work for QEMU. After
> applying the patchset, it works.
>
> Please review. Thanks.
Both patches l
n mapping
> will trigger the MAP PSI notifications.
>
> Without the patchset, nested device assignment (assign one device
> firstly to L1 guest, then to L2 guest) won't work for QEMU. After
> applying the patchset, it works.
>
> Please review. Thanks.
Both patches l
Hi,
This includes several cleanup patches which aim to make the
code more concise and easier for reading. There aren't any
functionality changes.
Best regards,
Lu Baolu
Lu Baolu (4):
iommu: Clean up the comments for iommu_group_alloc
iommu/vt-d: Clean up unused variable
Hi,
This includes several cleanup patches which aim to make the
code more concise and easier for reading. There aren't any
functionality changes.
Best regards,
Lu Baolu
Lu Baolu (4):
iommu: Clean up the comments for iommu_group_alloc
iommu/vt-d: Clean up unused variable
Remove it to make the code more concise.
Signed-off-by: Lu Baolu <baolu...@linux.intel.com>
---
drivers/iommu/intel-iommu.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 749d8f2..9064607 100644
--- a/d
Remove it to make the code more concise.
Signed-off-by: Lu Baolu
---
drivers/iommu/intel-iommu.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 749d8f2..9064607 100644
--- a/drivers/iommu/intel-iommu.c
+++ b
Remove unnecessary parentheses to comply with preferred coding
style.
Signed-off-by: Lu Baolu <baolu...@linux.intel.com>
---
drivers/iommu/intel-svm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-svm.c
index e8cd984..4
Remove unnecessary parentheses to comply with preferred coding
style.
Signed-off-by: Lu Baolu
---
drivers/iommu/intel-svm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-svm.c
index e8cd984..45f6e58 100644
--- a/drivers/iommu
The pasid28 quirk is needed only for some pre-production devices.
Remove it to make the code concise.
Signed-off-by: Ashok Raj <ashok@intel.com>
Signed-off-by: Lu Baolu <baolu...@linux.intel.com>
---
drivers/iommu/intel-iommu.c | 32 ++--
include
The pasid28 quirk is needed only for some pre-production devices.
Remove it to make the code concise.
Signed-off-by: Ashok Raj
Signed-off-by: Lu Baolu
---
drivers/iommu/intel-iommu.c | 32 ++--
include/linux/intel-iommu.h | 1 -
2 files changed, 2 insertions(+), 31
@name parameter has been removed.
Signed-off-by: Lu Baolu <baolu...@linux.intel.com>
---
drivers/iommu/iommu.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
index d2aa2320..d87e7c2 100644
--- a/drivers/iommu/iommu.c
+++ b/drivers/iommu/i
@name parameter has been removed.
Signed-off-by: Lu Baolu
---
drivers/iommu/iommu.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
index d2aa2320..d87e7c2 100644
--- a/drivers/iommu/iommu.c
+++ b/drivers/iommu/iommu.c
@@ -322,7 +322,6 @@ static
reside behind two different IOMMU units.
Cc: Ashok Raj <ashok@intel.com>
Cc: Jacob Pan <jacob.jun@linux.intel.com>
Cc: Kevin Tian <kevin.t...@intel.com>
Cc: Liu Yi L <yi.l@intel.com>
Suggested-by: Ashok Raj <ashok@intel.com>
Signed-off-by: Lu B
reside behind two different IOMMU units.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Cc: Liu Yi L
Suggested-by: Ashok Raj
Signed-off-by: Lu Baolu
Reviewed-by: Kevin Tian
Reviewed-by: Liu Yi L
---
drivers/iommu/Makefile | 2 +-
drivers/iommu/intel-iommu.c | 13 ++
drivers
code. It's required to replace the SVM-specific idr with the
global PASID idr.
Cc: Ashok Raj <ashok@intel.com>
Cc: Jacob Pan <jacob.jun@linux.intel.com>
Cc: Kevin Tian <kevin.t...@intel.com>
Cc: Liu Yi L <yi.l@intel.com>
Signed-off-by: Lu Baolu <baolu..
code. It's required to replace the SVM-specific idr with the
global PASID idr.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Cc: Liu Yi L
Signed-off-by: Lu Baolu
Reviewed-by: Kevin Tian
Reviewed-by: Liu Yi L
---
drivers/iommu/intel-svm.c | 14 ++
include/linux/intel-iommu.h | 1
ian <kevin.t...@intel.com>
Cc: Liu Yi L <yi.l@intel.com>
Signed-off-by: Lu Baolu <baolu...@linux.intel.com>
Reviewed-by: Liu Yi L <yi.l@intel.com>
---
drivers/iommu/intel-iommu.c | 19 +++
drivers/iommu/intel-svm.c | 8
include/linux/intel-iommu.h
jacob.jun@linux.intel.com>
Cc: Kevin Tian <kevin.t...@intel.com>
Cc: Liu Yi L <yi.l@intel.com>
Signed-off-by: Lu Baolu <baolu...@linux.intel.com>
Reviewed-by: Liu Yi L <yi.l@intel.com>
---
drivers/iommu/intel-iommu.c | 6 +++---
drivers/iommu/intel-svm.c | 37
This patch allocates PASID table for a domain at the time when
it is being created (if any devices using this domain supports
PASID feature), and free it when the domain is freed.
Cc: Ashok Raj
Cc: Jacob Pan
Cc: Kevin Tian
Cc: Liu Yi L
Signed-off-by: Lu Baolu
Reviewed-by: Liu Yi L
-off-by: Lu Baolu
Reviewed-by: Liu Yi L
---
drivers/iommu/intel-iommu.c | 6 +++---
drivers/iommu/intel-svm.c | 37 +
2 files changed, 28 insertions(+), 15 deletions(-)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 5602ccd
501 - 600 of 1892 matches
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