The following commit has been merged into the timers/core branch of tip:
Commit-ID: c90d37c9c41a572ea7183299951341b4640d5b4b
Gitweb:
https://git.kernel.org/tip/c90d37c9c41a572ea7183299951341b4640d5b4b
Author:Magnus Damm
AuthorDate:Tue, 20 Aug 2019 21:35:03 +09:00
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 1be8c9fd2ac9ad730cf537b8909f66c357866c5d
Gitweb:
https://git.kernel.org/tip/1be8c9fd2ac9ad730cf537b8909f66c357866c5d
Author:Magnus Damm
AuthorDate:Tue, 20 Aug 2019 21:35:46 +09:00
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 649dd060334f13792f624ec3fa8a0024ed1e02bc
Gitweb:
https://git.kernel.org/tip/649dd060334f13792f624ec3fa8a0024ed1e02bc
Author:Magnus Damm
AuthorDate:Tue, 20 Aug 2019 21:35:25 +09:00
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 53933bc3a69e0f07a1af2fea16fda9c816ffcf87
Gitweb:
https://git.kernel.org/tip/53933bc3a69e0f07a1af2fea16fda9c816ffcf87
Author:Magnus Damm
AuthorDate:Tue, 20 Aug 2019 21:35:36 +09:00
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 19d608458f4f3bb3a1f89bd7e4814c3fd30dbec7
Gitweb:
https://git.kernel.org/tip/19d608458f4f3bb3a1f89bd7e4814c3fd30dbec7
Author:Magnus Damm
AuthorDate:Tue, 20 Aug 2019 21:36:07 +09:00
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 8c1afba285a86b9dbb0637f8c70a34fe2d88569e
Gitweb:
https://git.kernel.org/tip/8c1afba285a86b9dbb0637f8c70a34fe2d88569e
Author:Magnus Damm
AuthorDate:Tue, 20 Aug 2019 21:35:56 +09:00
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 81b604c39997de91f4b2912f803074c85045fe36
Gitweb:
https://git.kernel.org/tip/81b604c39997de91f4b2912f803074c85045fe36
Author:Magnus Damm
AuthorDate:Tue, 20 Aug 2019 21:35:14 +09:00
From: Magnus Damm
Update the CMT driver to mark "renesas,cmt-48" as deprecated.
Instead of documenting a theoretical hardware device based on current software
support level, define DT bindings top-down based on available data sheet
information and make use of part numbers in the
From: Magnus Damm
Add SoC-specific matching for CMT1 on r8a7740 and sh73a0.
This allows us to move away from the old DT bindings such as
- "renesas,cmt-48-sh73a0"
- "renesas,cmt-48-r8a7740"
- "renesas,cmt-48"
in favour for the now commonly used format "ren
Hi Simon,
On Wed, Jul 24, 2019 at 8:12 PM Simon Horman wrote:
>
> On Thu, Jul 18, 2019 at 08:45:24PM +0900, Magnus Damm wrote:
> > From: Magnus Damm
> >
> > Add SoC-specific matching for CMT1 on r8a7740 and sh73a0.
> >
> > This allows us t
From: Magnus Damm
This patch reworks the DT binding documentation for the 6-channel
48-bit CMTs known as CMT1 on r8a7740 and sh73a0.
After the update the same style of DT binding as the rest of the upstream
SoCs will now also be used by r8a7740 and sh73a0. The DT binding "cmt-48"
From: Magnus Damm
The R-Car Gen3 SoCs so far come with a total for 4 on-chip CMT devices:
- CMT0
- CMT1
- CMT2
- CMT3
CMT0 includes two rather basic 32-bit timer channels. The rest of the on-chip
CMT devices support 48-bit counters and have 8 channels each.
Based on the data sheet
From: Magnus Damm
This patch adds DT binding documentation for the CMT devices on
the R-Car Gen3 D3 (r8a77995) SoC.
Signed-off-by: Magnus Damm
Reviewed-by: Geert Uytterhoeven
Reviewed-by: Rob Herring
Reviewed-by: Simon Horman
---
Documentation/devicetree/bindings/timer/renesas,cmt.txt
From: Magnus Damm
This patch adds DT binding documentation for the CMT devices on
the R-Car Gen2 V2H (r8a7792) SoC.
Signed-off-by: Magnus Damm
Reviewed-by: Geert Uytterhoeven
Reviewed-by: Rob Herring
Reviewed-by: Simon Horman
---
Documentation/devicetree/bindings/timer/renesas,cmt.txt
From: Magnus Damm
Document the on-chip CMT devices included in r8a7740 and sh73a0.
Included in this patch is DT binding documentation for 32-bit CMTs
CMT0, CMT2, CMT3 and CMT4. They all contain a single channel and are
quite similar however some minor differences still exist:
- "Counter
viewed-by from Simon - thanks!
Please see each individual patch for more detailed information.
Signed-off-by: Magnus Damm
Reviewed-by: Geert Uytterhoeven [Patch 3-5]
Reviewed-by: Rob Herring [Patch 1-5]
Reviewed-by: Simon Horman
---
Developed on top of "renesas-drivers-2019-08-13-
From: Magnus Damm
Add SoC-specific matching for CMT1 on r8a7740 and sh73a0.
This allows us to move away from the old DT bindings such as
- "renesas,cmt-48-sh73a0"
- "renesas,cmt-48-r8a7740"
- "renesas,cmt-48"
in favour for the now commonly used format "ren
From: Magnus Damm
Update the CMT driver to mark "renesas,cmt-48" as deprecated.
Instead of documenting a theoretical hardware device based on current software
support level, define DT bindings top-down based on available data sheet
information and make use of part numbers in the
From: Magnus Damm
This patch adds DT binding documentation for the CMT devices on
the R-Car Gen3 D3 (r8a77995) SoC.
Signed-off-by: Magnus Damm
Reviewed-by: Geert Uytterhoeven
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/timer/renesas,cmt.txt |2 ++
1 file changed, 2
From: Magnus Damm
The R-Car Gen3 SoCs so far come with a total for 4 on-chip CMT devices:
- CMT0
- CMT1
- CMT2
- CMT3
CMT0 includes two rather basic 32-bit timer channels. The rest of the on-chip
CMT devices support 48-bit counters and have 8 channels each.
Based on the data sheet
From: Magnus Damm
This patch reworks the DT binding documentation for the 6-channel
48-bit CMTs known as CMT1 on r8a7740 and sh73a0.
After the update the same style of DT binding as the rest of the upstream
SoCs will now also be used by r8a7740 and sh73a0. The DT binding "cmt-48"
From: Magnus Damm
Document the on-chip CMT devices included in r8a7740 and sh73a0.
Included in this patch is DT binding documentation for 32-bit CMTs
CMT0, CMT2, CMT3 and CMT4. They all contain a single channel and are
quite similar however some minor differences still exist:
- "Counter
From: Magnus Damm
This patch adds DT binding documentation for the CMT devices on
the R-Car Gen2 V2H (r8a7792) SoC.
Signed-off-by: Magnus Damm
Reviewed-by: Geert Uytterhoeven
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/timer/renesas,cmt.txt |2 ++
1 file changed, 2
(r8a77995).
- Update the R-Car Gen3 DT documentation to reflect current usage.
- Introduce SoC-specific matching in the driver for CMT1 on sh73a0 and sh73a0.
- Document old "cmt-48" binding as deprecated in the driver.
Please see each individual patch for more detailed information.
Signed
Hi Robin,
On Tue, Jun 20, 2017 at 2:19 AM, Robin Murphy <robin.mur...@arm.com> wrote:
> On 19/06/17 10:14, Magnus Damm wrote:
>> From: Magnus Damm <damm+rene...@opensource.se>
>>
>> Add root device handling to the IPMMU driver by allowing certa
Hi Robin,
On Tue, Jun 20, 2017 at 2:19 AM, Robin Murphy wrote:
> On 19/06/17 10:14, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Add root device handling to the IPMMU driver by allowing certain
>> DT compat strings to enable has_cache_leaf_nodes that in turn will
&
From: Magnus Damm <damm+rene...@opensource.se>
Introduce support for two bit SL0 bitfield in IMTTBCR
by using a separate feature flag.
Signed-off-by: Magnus Damm <damm+rene...@opensource.se>
---
Changes since V4:
- Use leaf node mmu instead of root
Changes since V3:
- None
C
From: Magnus Damm <damm+rene...@opensource.se>
Tie in r8a7795 features and update the IOMMU_OF_DECLARE
compat string to include the updated compat string.
Signed-off-by: Magnus Damm <damm+rene...@opensource.se>
---
Changes since V4:
- Got rid of root device availability chec
From: Magnus Damm
Introduce support for two bit SL0 bitfield in IMTTBCR
by using a separate feature flag.
Signed-off-by: Magnus Damm
---
Changes since V4:
- Use leaf node mmu instead of root
Changes since V3:
- None
Changes since V2:
- None
Changes since V1:
- None
drivers/iommu
From: Magnus Damm
Tie in r8a7795 features and update the IOMMU_OF_DECLARE
compat string to include the updated compat string.
Signed-off-by: Magnus Damm
---
Changes since V4:
- Got rid of root device availability check in ->xlate()
-> deferred probing is used to make sure th
From: Magnus Damm <damm+rene...@opensource.se>
Write IMCTR both in the root device and the leaf node.
To allow access of IMCTR introduce the following function:
- ipmmu_ctx_write_all()
While at it also rename context functions:
- ipmmu_ctx_read() -> ipmmu_ctx_read_root()
- ipmmu_
From: Magnus Damm <damm+rene...@opensource.se>
Introduce a feature to allow opt-out of setting up
IMBUSCR. The default case is unchanged.
Signed-off-by: Magnus Damm <damm+rene...@opensource.se>
---
Changes since V4:
- Use leaf node mmu instead of root
Changes since V3:
- No
From: Magnus Damm
Write IMCTR both in the root device and the leaf node.
To allow access of IMCTR introduce the following function:
- ipmmu_ctx_write_all()
While at it also rename context functions:
- ipmmu_ctx_read() -> ipmmu_ctx_read_root()
- ipmmu_ctx_write() -> ipmmu_ctx_writ
From: Magnus Damm
Introduce a feature to allow opt-out of setting up
IMBUSCR. The default case is unchanged.
Signed-off-by: Magnus Damm
---
Changes since V4:
- Use leaf node mmu instead of root
Changes since V3:
- None
Changes since V2:
- None
Changes since V1:
- Updated the commit
From: Magnus Damm <damm+rene...@opensource.se>
The r8a7795 IPMMU supports 40-bit bus mastering. Both
the coherent DMA mask and the streaming DMA mask are
set to unlock the 40-bit address space for coherent
allocations and streaming operations.
Signed-off-by: Magnus Damm <
From: Magnus Damm
The r8a7795 IPMMU supports 40-bit bus mastering. Both
the coherent DMA mask and the streaming DMA mask are
set to unlock the 40-bit address space for coherent
allocations and streaming operations.
Signed-off-by: Magnus Damm
---
Changes since V4:
- None
Changes since V3
From: Magnus Damm <damm+rene...@opensource.se>
Hook up IOMMU_OF_DECLARE() support in case CONFIG_IOMMU_DMA
is enabled. The only current supported case for 32-bit ARM
is disabled, however for 64-bit ARM usage of OF is required.
Signed-off-by: Magnus Damm <damm+rene...@opensource.se>
-
From: Magnus Damm
Hook up IOMMU_OF_DECLARE() support in case CONFIG_IOMMU_DMA
is enabled. The only current supported case for 32-bit ARM
is disabled, however for 64-bit ARM usage of OF is required.
Signed-off-by: Magnus Damm
---
Changes since V4:
- Use ipmmu_is_root() instead of now removed
From: Magnus Damm <damm+rene...@opensource.se>
Add support for up to 8 contexts. Each context is mapped to one
domain. One domain is assigned one or more slave devices. Contexts
are allocated dynamically and slave devices are grouped together
based on which IPMMU device they are con
From: Magnus Damm
Add support for up to 8 contexts. Each context is mapped to one
domain. One domain is assigned one or more slave devices. Contexts
are allocated dynamically and slave devices are grouped together
based on which IPMMU device they are connected to. This makes slave
devices tied
From: Magnus Damm <damm+rene...@opensource.se>
Add root device handling to the IPMMU driver by allowing certain
DT compat strings to enable has_cache_leaf_nodes that in turn will
support both root devices with interrupts and leaf devices that
face the actual IPMMU consumer devices.
Sign
From: Magnus Damm <damm+rene...@opensource.se>
Introduce struct ipmmu_features to track various hardware
and software implementation changes inside the driver for
different kinds of IPMMU hardware. Add use_ns_alias_offset
as a first example of a feature to control if the secure
registe
From: Magnus Damm
Add root device handling to the IPMMU driver by allowing certain
DT compat strings to enable has_cache_leaf_nodes that in turn will
support both root devices with interrupts and leaf devices that
face the actual IPMMU consumer devices.
Signed-off-by: Magnus Damm
---
Changes
From: Magnus Damm
Introduce struct ipmmu_features to track various hardware
and software implementation changes inside the driver for
different kinds of IPMMU hardware. Add use_ns_alias_offset
as a first example of a feature to control if the secure
register bank offset should be used
-bit ARM update V2
- Reworked root device handling to make use of driver_for_each_device()
- Added deferred probing to make sure root device always is present
Signed-off-by: Magnus Damm <damm+rene...@opensource.se>
---
Developed on top of next-20171013
Also applies to renesas-drivers
-bit ARM update V2
- Reworked root device handling to make use of driver_for_each_device()
- Added deferred probing to make sure root device always is present
Signed-off-by: Magnus Damm
---
Developed on top of next-20171013
Also applies to renesas-drivers-2017-10-03-v4.14-rc3
Tested on top
From: Magnus Damm <damm+rene...@opensource.se>
Extend the driver to make use of iommu_device_sysfs_add()/remove()
functions to hook up initial sysfs support.
Suggested-by: Joerg Roedel <jroe...@suse.de>
Signed-off-by: Magnus Damm <damm+rene...@opensource.se>
---
Applies on to
From: Magnus Damm
Extend the driver to make use of iommu_device_sysfs_add()/remove()
functions to hook up initial sysfs support.
Suggested-by: Joerg Roedel
Signed-off-by: Magnus Damm
---
Applies on top of next-20170817
drivers/iommu/ipmmu-vmsa.c |6 ++
1 file changed, 6 insertions
ed-off-by: Robin Murphy <robin.mur...@arm.com>
Signed-off-by: Magnus Damm <damm+rene...@opensource.se>
---
Changes since V1:
- Rebased to apply on top of earlier changes in series
drivers/iommu/ipmmu-vmsa.c | 21 +++--
1 file changed, 3 insertions(+), 18 deletions(-)
---
-by: Magnus Damm
---
Changes since V1:
- Rebased to apply on top of earlier changes in series
drivers/iommu/ipmmu-vmsa.c | 21 +++--
1 file changed, 3 insertions(+), 18 deletions(-)
--- 0004/drivers/iommu/ipmmu-vmsa.c
+++ work/drivers/iommu/ipmmu-vmsa.c 2017-07-17 21:04
From: Magnus Damm <damm+rene...@opensource.se>
Now when both 32-bit and 64-bit code inside the driver is using
fwspec it is possible to replace the utlb handling with fwspec ids
that get populated from ->of_xlate().
Suggested-by: Robin Murphy <robin.mur...@arm.com>
Signed-off-
From: Magnus Damm
Now when both 32-bit and 64-bit code inside the driver is using
fwspec it is possible to replace the utlb handling with fwspec ids
that get populated from ->of_xlate().
Suggested-by: Robin Murphy
Signed-off-by: Magnus Damm
---
Changes since V1:
- Rebased to apply on
Signed-off-by: Robin Murphy <robin.mur...@arm.com>
Signed-off-by: Magnus Damm <damm+rene...@opensource.se>
---
Change since V1:
- New patch
drivers/iommu/ipmmu-vmsa.c | 12
1 file changed, 12 deletions(-)
--- 0008/drivers/iommu/ipmmu-vmsa.c
+++ work/drivers/iommu/ipmmu-
Signed-off-by: Magnus Damm
---
Change since V1:
- New patch
drivers/iommu/ipmmu-vmsa.c | 12
1 file changed, 12 deletions(-)
--- 0008/drivers/iommu/ipmmu-vmsa.c
+++ work/drivers/iommu/ipmmu-vmsa.c 2017-07-17 21:35:26.690607110 +0900
@@ -37,7 +37,6 @@ struct ipmmu_vmsa_device
From: Magnus Damm <damm+rene...@opensource.se>
The 32-bit ARM code gets updated to make use of ->of_xlate() and the
code is shared between 64-bit and 32-bit ARM. The of_device_is_available()
check gets dropped since it is included in of_iommu_xlate().
Suggested-by: Robin Murphy &
From: Magnus Damm
The 32-bit ARM code gets updated to make use of ->of_xlate() and the
code is shared between 64-bit and 32-bit ARM. The of_device_is_available()
check gets dropped since it is included in of_iommu_xlate().
Suggested-by: Robin Murphy
Signed-off-by: Magnus Damm
---
Chan
From: Magnus Damm <damm+rene...@opensource.se>
Extend the driver to make use of iommu_device_register()/unregister()
functions together with iommu_device_set_ops() and iommu_set_fwnode().
These used to be part of the earlier posted 64-bit ARM (r8a7795) series but
it turns out that thes
From: Magnus Damm
Extend the driver to make use of iommu_device_register()/unregister()
functions together with iommu_device_set_ops() and iommu_set_fwnode().
These used to be part of the earlier posted 64-bit ARM (r8a7795) series but
it turns out that these days they are required on 32-bit ARM
ted-by: Robin Murphy <robin.mur...@arm.com> (Patch 2 and 4)
Signed-off-by: Robin Murphy <robin.mur...@arm.com> (Patch 3 and 5)
Signed-off-by: Magnus Damm <damm+rene...@opensource.se>
---
Changes since V1:
- Minor changes to patch 1 and 2 - thanks Robin and Geert!
- Added patch
ted-by: Robin Murphy (Patch 2 and 4)
Signed-off-by: Robin Murphy (Patch 3 and 5)
Signed-off-by: Magnus Damm
---
Changes since V1:
- Minor changes to patch 1 and 2 - thanks Robin and Geert!
- Added patch 5 to include further clean ups
Developed on top of v4.13-rc1
drivers/iommu/ipmmu-vms
From: Magnus Damm <damm+rene...@opensource.se>
Update the IPMMU DT binding documentation to include the r8a7796 compat
string for R-Car M3-W.
Signed-off-by: Magnus Damm <damm+rene...@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
Acked-
From: Magnus Damm
Update the IPMMU DT binding documentation to include the r8a7796 compat
string for R-Car M3-W.
Signed-off-by: Magnus Damm
Acked-by: Laurent Pinchart
Acked-by: Rob Herring
Acked-by: Simon Horman
Acked-by: Geert Uytterhoeven
---
Changes since V3:
- None
Changes since
From: Magnus Damm <damm+rene...@opensource.se>
Support the r8a7796 IPMMU by sharing feature flags between
r8a7795 and r8a7796. Also update IOMMU_OF_DECLARE to hook
up the updated compat string.
Signed-off-by: Magnus Damm <damm+rene...@opensource.se>
Reviewed-by: Geert Uytterhoeven
From: Magnus Damm
Support the r8a7796 IPMMU by sharing feature flags between
r8a7795 and r8a7796. Also update IOMMU_OF_DECLARE to hook
up the updated compat string.
Signed-off-by: Magnus Damm
Reviewed-by: Geert Uytterhoeven
---
Changes since V3:
- Added Reviewed-by from Geert - thanks
From: Magnus Damm <damm+rene...@opensource.se>
Bump up the maximum numbers of micro-TLBS to 48.
Each IPMMU device instance get micro-TLB assignment via
the "iommus" property in DT. Older SoCs tend to use a
maximum number of 32 micro-TLBs per IPMMU instance however
newer SoCs such
From: Magnus Damm
Bump up the maximum numbers of micro-TLBS to 48.
Each IPMMU device instance get micro-TLB assignment via
the "iommus" property in DT. Older SoCs tend to use a
maximum number of 32 micro-TLBs per IPMMU instance however
newer SoCs such as r8a7796 make use of up to 48
for upstream merge and includes the following tags:
Signed-off-by: Magnus Damm <damm+rene...@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
Acked-by: Rob Herring <r...@kernel.org>
Acked-by: Simon Horman <horms+rene...@verge.net.au>
Acked-by: Geert
for upstream merge and includes the following tags:
Signed-off-by: Magnus Damm
Acked-by: Laurent Pinchart
Acked-by: Rob Herring
Acked-by: Simon Horman
Acked-by: Geert Uytterhoeven
Patch 2/3 and 3/3 are quite trivial but have no acked-by so far.
Signed-off-by: Magnus Damm
---
Developed on top
From: Magnus Damm <damm+rene...@opensource.se>
Tie in r8a7795 features and update the IOMMU_OF_DECLARE
compat string to include the updated compat string.
Signed-off-by: Magnus Damm <damm+rene...@opensource.se>
---
Changes since V3:
- Rebased code on top of
[PATCH 00/04] iomm
From: Magnus Damm
Tie in r8a7795 features and update the IOMMU_OF_DECLARE
compat string to include the updated compat string.
Signed-off-by: Magnus Damm
---
Changes since V3:
- Rebased code on top of
[PATCH 00/04] iommu/ipmmu-vmsa: 32-bit ARM update
This includes support
From: Magnus Damm <damm+rene...@opensource.se>
Hook up IOMMU_OF_DECLARE() support in case CONFIG_IOMMU_DMA
is enabled. The only current supported case for 32-bit ARM
is disabled, however for 64-bit ARM usage of OF is required.
Signed-off-by: Magnus Damm <damm+rene...@opensource.se>
-
From: Magnus Damm
Hook up IOMMU_OF_DECLARE() support in case CONFIG_IOMMU_DMA
is enabled. The only current supported case for 32-bit ARM
is disabled, however for 64-bit ARM usage of OF is required.
Signed-off-by: Magnus Damm
---
Changes since V3:
- Reworked to fit on top of
[PATCH 00/04
From: Magnus Damm <damm+rene...@opensource.se>
Introduce support for two bit SL0 bitfield in IMTTBCR
by using a separate feature flag.
Signed-off-by: Magnus Damm <damm+rene...@opensource.se>
---
Changes since V3:
- None
Changes since V2:
- None
Changes since V1:
- None
d
From: Magnus Damm
Introduce support for two bit SL0 bitfield in IMTTBCR
by using a separate feature flag.
Signed-off-by: Magnus Damm
---
Changes since V3:
- None
Changes since V2:
- None
Changes since V1:
- None
drivers/iommu/ipmmu-vmsa.c | 14 +-
1 file changed, 13
From: Magnus Damm <damm+rene...@opensource.se>
Introduce a feature to allow opt-out of setting up
IMBUSCR. The default case is unchanged.
Signed-off-by: Magnus Damm <damm+rene...@opensource.se>
---
Changes since V3:
- None
Changes since V2:
- None
Changes since V1:
- Update
From: Magnus Damm <damm+rene...@opensource.se>
The r8a7795 IPMMU supports 40-bit bus mastering. Both
the coherent DMA mask and the streaming DMA mask are
set to unlock the 40-bit address space for coherent
allocations and streaming operations.
Signed-off-by: Magnus Damm <
From: Magnus Damm <damm+rene...@opensource.se>
Write IMCTR both in the root device and the leaf node.
To allow access of IMCTR introduce the following function:
- ipmmu_ctx_write_all()
While at it also rename context functions:
- ipmmu_ctx_read() -> ipmmu_ctx_read_root()
- ipmmu_
From: Magnus Damm
Introduce a feature to allow opt-out of setting up
IMBUSCR. The default case is unchanged.
Signed-off-by: Magnus Damm
---
Changes since V3:
- None
Changes since V2:
- None
Changes since V1:
- Updated the commit message
- Reworked patch to coexist with the multi
From: Magnus Damm
The r8a7795 IPMMU supports 40-bit bus mastering. Both
the coherent DMA mask and the streaming DMA mask are
set to unlock the 40-bit address space for coherent
allocations and streaming operations.
Signed-off-by: Magnus Damm
---
Changes since V3:
- None
Changes since V2
From: Magnus Damm
Write IMCTR both in the root device and the leaf node.
To allow access of IMCTR introduce the following function:
- ipmmu_ctx_write_all()
While at it also rename context functions:
- ipmmu_ctx_read() -> ipmmu_ctx_read_root()
- ipmmu_ctx_write() -> ipmmu_ctx_writ
From: Magnus Damm <damm+rene...@opensource.se>
Add support for up to 8 contexts. Each context is mapped to one
domain. One domain is assigned one or more slave devices. Contexts
are allocated dynamically and slave devices are grouped together
based on which IPMMU device they are con
From: Magnus Damm
Add support for up to 8 contexts. Each context is mapped to one
domain. One domain is assigned one or more slave devices. Contexts
are allocated dynamically and slave devices are grouped together
based on which IPMMU device they are connected to. This makes slave
devices tied
se of iommu_device_* functions
- Patch 5/9 sets the mask to 40 bits instead of 64 bits
- Patch 9/9 implements white list handling via ->xlate() and fixes a bug
Signed-off-by: Magnus Damm <damm+rene...@opensource.se>
---
Developed on top of next-20170614 with the following series applied
[PA
From: Magnus Damm <damm+rene...@opensource.se>
Add root device handling to the IPMMU driver by allowing certain
DT compat strings to enable has_cache_leaf_nodes that in turn will
support both root devices with interrupts and leaf devices that
face the actual IPMMU consumer devices.
Sign
se of iommu_device_* functions
- Patch 5/9 sets the mask to 40 bits instead of 64 bits
- Patch 9/9 implements white list handling via ->xlate() and fixes a bug
Signed-off-by: Magnus Damm
---
Developed on top of next-20170614 with the following series applied
[PATCH 00/04] iommu/ipmmu-vmsa: 32-bit
From: Magnus Damm
Add root device handling to the IPMMU driver by allowing certain
DT compat strings to enable has_cache_leaf_nodes that in turn will
support both root devices with interrupts and leaf devices that
face the actual IPMMU consumer devices.
Signed-off-by: Magnus Damm
---
Changes
From: Magnus Damm <damm+rene...@opensource.se>
Introduce struct ipmmu_features to track various hardware
and software implementation changes inside the driver for
different kinds of IPMMU hardware. Add use_ns_alias_offset
as a first example of a feature to control if the secure
registe
From: Magnus Damm
Introduce struct ipmmu_features to track various hardware
and software implementation changes inside the driver for
different kinds of IPMMU hardware. Add use_ns_alias_offset
as a first example of a feature to control if the secure
register bank offset should be used
Hi Geert,
On Fri, Jun 16, 2017 at 4:18 PM, Geert Uytterhoeven
<ge...@linux-m68k.org> wrote:
> Hi Magnus,
>
> On Thu, Jun 15, 2017 at 12:29 PM, Magnus Damm <magnus.d...@gmail.com> wrote:
>> Now when both 32-bit and 64-bit code inside the driver is using
>> fwspec i
Hi Geert,
On Fri, Jun 16, 2017 at 4:18 PM, Geert Uytterhoeven
wrote:
> Hi Magnus,
>
> On Thu, Jun 15, 2017 at 12:29 PM, Magnus Damm wrote:
>> Now when both 32-bit and 64-bit code inside the driver is using
>> fwspec it is possible to replace the utlb handling with f
From: Magnus Damm <damm+rene...@opensource.se>
The 32-bit ARM code gets updated to make use of ->of_xlate() and the
code is shared between 64-bit and 32-bit ARM. The of_device_is_available()
check gets dropped since it is included in of_iommu_xlate().
Suggested-by: Robin Murphy &
From: Magnus Damm
The 32-bit ARM code gets updated to make use of ->of_xlate() and the
code is shared between 64-bit and 32-bit ARM. The of_device_is_available()
check gets dropped since it is included in of_iommu_xlate().
Suggested-by: Robin Murphy
Signed-off-by: Magnus Damm
---
driv
From: Magnus Damm <damm+rene...@opensource.se>
Extend the driver to make use of iommu_device_register()/unregister()
functions together with iommu_device_set_ops() and iommu_set_fwnode().
These used to be part of the earlier posted 64-bit ARM (r8a7795) series but
it turns out that thes
ed-off-by: Robin Murphy <robin.mur...@arm.com>
Signed-off-by: Magnus Damm <damm+rene...@opensource.se>
---
drivers/iommu/ipmmu-vmsa.c | 21 +++--
1 file changed, 3 insertions(+), 18 deletions(-)
--- 0010/drivers/iommu/ipmmu-vmsa.c
+++ work/drivers/iommu/ipmmu-vmsa.c
From: Magnus Damm <damm+rene...@opensource.se>
Now when both 32-bit and 64-bit code inside the driver is using
fwspec it is possible to replace the utlb handling with fwspec ids
that get populated from ->of_xlate().
Suggested-by: Robin Murphy <robin.mur...@arm.com>
Signed-off-
From: Magnus Damm
Extend the driver to make use of iommu_device_register()/unregister()
functions together with iommu_device_set_ops() and iommu_set_fwnode().
These used to be part of the earlier posted 64-bit ARM (r8a7795) series but
it turns out that these days they are required on 32-bit ARM
-by: Magnus Damm
---
drivers/iommu/ipmmu-vmsa.c | 21 +++--
1 file changed, 3 insertions(+), 18 deletions(-)
--- 0010/drivers/iommu/ipmmu-vmsa.c
+++ work/drivers/iommu/ipmmu-vmsa.c 2017-06-15 17:29:00.290607110 +0900
@@ -73,22 +73,9 @@ static struct ipmmu_vmsa_domain *to_vmsa
From: Magnus Damm
Now when both 32-bit and 64-bit code inside the driver is using
fwspec it is possible to replace the utlb handling with fwspec ids
that get populated from ->of_xlate().
Suggested-by: Robin Murphy
Signed-off-by: Magnus Damm
---
drivers/iommu/ipmmu-vmsa.c |
by: Robin Murphy <robin.mur...@arm.com> (Patch 3)
Signed-off-by: Magnus Damm <damm+rene...@opensource.se>
---
Developed on renesas-drivers-2017-06-13-v4.12-rc5 and rebased to next-20170614
drivers/iommu/ipmmu-vmsa.c | 186 +++-
1 file c
h 3)
Signed-off-by: Magnus Damm
---
Developed on renesas-drivers-2017-06-13-v4.12-rc5 and rebased to next-20170614
drivers/iommu/ipmmu-vmsa.c | 186 +++-
1 file changed, 49 insertions(+), 137 deletions(-)
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