Hi Boris,
Thanks for the review
On Sun, Feb 19, 2017 at 3:56 PM, Boris Brezillon
wrote:
> Hi Punnaiah,
>
> Sorry for the late reply.
>
> On Mon, 9 Jan 2017 08:28:54 +0530
> Punnaiah Choudary Kalluri wrote:
>
>> Added the basic driver for Arasan NAND Flash
Hi Boris,
Thanks. I will implement these changes and send the next series.
Regards,
Punnaiah
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@free-electrons.com]
> Sent: Tuesday, January 10, 2017 1:36 PM
> To: Punnaiah Choudary Kalluri
> Cc: R
Hi Rob,
Thanks for the review.
> -Original Message-
> From: Rob Herring [mailto:r...@kernel.org]
> Sent: Tuesday, January 10, 2017 11:06 AM
> To: Punnaiah Choudary Kalluri
> Cc: dw...@infradead.org; computersforpe...@gmail.com;
> boris.brezil...@free-elect
Added the basic driver for Arasan NAND Flash Controller used in
Zynq UltraScale+ MPSoC. It supports only Hw ECC and upto 24bit
correction.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v7:
- Implemented Marek suggestions and comments
- Corrected the acronyms those should be in caps
This patch adds the dts binding document for arasan nand flash
controller.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v7:
- Corrected the acronyms those should be in caps
changes in v6:
- Removed num-cs property
- Separated nandchip from nand controller
changes in v5:
- None
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@free-electrons.com]
> Sent: Monday, December 05, 2016 2:31 PM
> To: Punnaiah Choudary Kalluri
> Cc: Florian Fainelli ; Kevin Hao
> ; g...@denx.de; linux-kernel@vger.kernel.org; Andy
>
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@free-electrons.com]
> Sent: Monday, December 05, 2016 2:07 PM
> To: Marek Vasut
> Cc: Punnaiah Choudary Kalluri ;
> dw...@infradead.org; computersforpe...@gmail.com; rich...@nod.at;
> cyrille.pi
Hi Marek,
Thanks for the review and comments.
> -Original Message-
> From: Marek Vasut [mailto:marek.va...@gmail.com]
> Sent: Monday, December 05, 2016 10:10 AM
> To: Punnaiah Choudary Kalluri ;
> dw...@infradead.org; computersforpe...@gmail.com;
> boris.brezil...@
Hi Marek,
Thanks for the review.
> -Original Message-
> From: Marek Vasut [mailto:marek.va...@gmail.com]
> Sent: Monday, December 05, 2016 9:56 AM
> To: Punnaiah Choudary Kalluri ;
> dw...@infradead.org; computersforpe...@gmail.com;
> boris.brezil...@free-electrons.c
This patch adds the dts binding document for arasan nand flash
controller.
Signed-off-by: Punnaiah Choudary Kalluri
Acked-by: Rob Herring
---
changes in v6:
- Removed num-cs property
- Separated nandchip from nand controller
changes in v5:
- None
Changes in v4:
- Added num-cs property
- Added
Added the basic driver for Arasan Nand Flash Controller used in
Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
correction.
Signed-off-by: Punnaiah Choudary Kalluri
---
Chnages in v6:
- Addressed most of the Brian and Boris comments
- Separated the nandchip from the nand
> -Original Message-
> From: Jason Gunthorpe [mailto:jguntho...@obsidianresearch.com]
> Sent: Tuesday, October 25, 2016 4:30 AM
> To: Punnaiah Choudary Kalluri
> Cc: Boris Brezillon ; Punnaiah Choudary
> Kalluri ; mark.rutl...@arm.com; linux-
> m...@lists.inf
> -Original Message-
> From: Jason Gunthorpe [mailto:jguntho...@obsidianresearch.com]
> Sent: Tuesday, October 25, 2016 10:16 AM
> To: Punnaiah Choudary Kalluri
> Cc: Boris Brezillon ;
> mark.rutl...@arm.com; linux-...@lists.infradead.org;
> michal.si...@xilinx.com;
5 at 11:38:36PM +0530, Punnaiah Choudary Kalluri wrote:
>> > Add driver for arm pl353 static memory controller nand interface with
>> > HW ECC support. This controller is used in xilinx zynq soc for interfacing
>> > the nand flash memory.
>> >
>> >
t; Boris Brezillon electrons.com>; alexandre.bell...@free-electrons.com;
> net...@vger.kernel.org; linux-kernel@vger.kernel.org;
> devicet...@vger.kernel.org; Punnaiah Choudary Kalluri
> ; Michal Simek ; Anirudha
> Sarangi
> Subject: Re: [RFC PATCH 2/3] net: macb: Add support for 1588 for Z
.@gmail.com;
> and...@lunn.ch; Punnaiah Choudary Kalluri ;
> Anirudha Sarangi
> Cc: devicet...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux-
> ker...@vger.kernel.org; net...@vger.kernel.org
> Subject: [RFC PATCH v4 2/2] net: phy: Add gmiitorgmii converter support
> -Original Message-
> From: Andrew Lunn [mailto:and...@lunn.ch]
> Sent: Wednesday, July 06, 2016 7:51 PM
> To: Punnaiah Choudary Kalluri
> Cc: Appana Durga Kedareswara Rao ;
> robh...@kernel.org; mark.rutl...@arm.com; Michal Simek
> ; Soren Brinkmann ;
>
Hi Andrew,
> -Original Message-
> From: Andrew Lunn [mailto:and...@lunn.ch]
> Sent: Monday, July 04, 2016 7:35 PM
> To: Appana Durga Kedareswara Rao
> Cc: robh...@kernel.org; mark.rutl...@arm.com; Michal Simek
> ; Soren Brinkmann ; Punnaiah
> Choudary Kalluri ; ni
> -Original Message-
> From: Vinod Koul [mailto:vinod.k...@intel.com]
> Sent: Tuesday, June 28, 2016 9:45 AM
> To: Punnaiah Choudary Kalluri
> Cc: Appana Durga Kedareswara Rao ;
> robh...@kernel.org; pawel.m...@arm.com; mark.rutl...@arm.com;
> ijc+devicet.
aurora.org; Michal Simek
> ; Soren Brinkmann ;
> dan.j.willi...@intel.com; moritz.fisc...@ettus.com;
> laurent.pinch...@ideasonboard.com; l...@debethencourt.com; Srikanth
> Vemula ; Anirudha Sarangi ;
> Punnaiah Choudary Kalluri ;
> devicet...@vger.kernel.org; linux-arm-ker.
> On Tue, Jun 21, 2016 at 04:19:38PM +0000, Punnaiah Choudary Kalluri wrote:
> > > > > > > > mode Earlier In the driver this configuration is read from the
> > > > > > > > device-tree But as per lars and your suggestion move
Hi,
We are using the pl353 smc controller for interfacing the nand in our zynq SOC.
The driver for this controller is currently under mainline review.
Recently we are moved to 4.4 kernel and observing issues with the driver.
while debug, found that the issue is with the virtual address returned fr
Hi Boris,
On Tue, Mar 8, 2016 at 8:08 PM, Boris Brezillon
wrote:
> Hi Punnaiah,
>
> Sorry for the late review.
>
> On Sat, 21 Nov 2015 20:09:48 +0530
> Punnaiah Choudary Kalluri wrote:
>
>> Added the basic driver for Arasan Nand Flash Controller used in
>> Zy
you're having trouble, try git-send-email.
Sure and thanks for the review. I will address the below commnets in v6 and
release the patches for review soon.
Regards,
Punnaiah.
>
> On Sat, Nov 21, 2015 at 08:09:48PM +0530, Punnaiah Choudary Kalluri wrote:
>> Added the basic driv
Hi Boris,
On Tue, Dec 1, 2015 at 4:45 PM, Boris Brezillon
wrote:
> Brian, Punnaiah,
>
> On Fri, 20 Nov 2015 11:33:42 -0800
> Brian Norris wrote:
>
>> On Thu, Nov 05, 2015 at 10:28:55PM +0530, Punnaiah Choudary Kalluri wrote:
>> > Device like MT29F32G08ABCDBJ4 h
Hi Brian,
On Tue, Dec 1, 2015 at 2:41 AM, Brian Norris
wrote:
> Hi Punnaiah,
>
> On Sat, Nov 21, 2015 at 08:59:15PM +0530, punnaiah choudary kalluri wrote:
>> On Sat, Nov 21, 2015 at 1:03 AM, Brian Norris
>> wrote:
>> > On Thu, Nov 05, 2015 at 10:28:55PM +0530, P
On Sat, Nov 21, 2015 at 1:03 AM, Brian Norris
wrote:
> On Thu, Nov 05, 2015 at 10:28:55PM +0530, Punnaiah Choudary Kalluri wrote:
>> Device like MT29F32G08ABCDBJ4 have a writesize/oobsize of 16K/1216 Bytes.
>> So, increasing the maximum ecc placement locations to 1216
>
>
Added the basic driver for Arasan Nand Flash Controller used in
Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
correction.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v5:
- Renamed the driver filei as arasan_nand.c
- Fixed all comments relaqted coding style
- Fixed
This patch adds the dts binding document for arasan nand flash
controller.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v5:
- None
Changes in v4:
- Added num-cs property
- Added clock support
Changes in v3:
- None
Changes in v2:
- None
---
.../devicetree/bindings/mtd/arasan_nfc.txt
Added macro definition for nvddr data interface mode field in
the sub feature parameter of onfi timing mode configuration.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v5:
- None
Changes in v4:
- New change
---
include/linux/mtd/nand.h | 3 +++
1 file changed, 3 insertions(+)
diff
This patch adds support for the sgmii phy interface.
Signed-off-by: Punnaiah Choudary Kalluri
---
drivers/net/ethernet/cadence/macb.c | 4
drivers/net/ethernet/cadence/macb.h | 5 +
2 files changed, 9 insertions(+)
diff --git a/drivers/net/ethernet/cadence/macb.c
b/drivers/net
On Thu, Nov 12, 2015 at 4:02 PM, Andy Shevchenko
wrote:
> On Thu, 2015-11-12 at 10:18 +0530, punnaiah choudary kalluri wrote:
>> On Mon, Nov 9, 2015 at 7:20 PM, Andy Shevchenko
>> wrote:
>> > On Thu, 2015-11-05 at 08:19 +0530, Punnaiah Choudary Kalluri wrote:
>>
On Mon, Nov 9, 2015 at 7:20 PM, Andy Shevchenko
wrote:
> On Thu, 2015-11-05 at 08:19 +0530, Punnaiah Choudary Kalluri wrote:
>> Added the basic driver for Arasan Nand Flash Controller used in
>> Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
>> correc
On Mon, Nov 9, 2015 at 7:20 PM, Andy Shevchenko
wrote:
> On Thu, 2015-11-05 at 08:19 +0530, Punnaiah Choudary Kalluri wrote:
>> Added the basic driver for Arasan Nand Flash Controller used in
>> Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
>> correc
On Fri, Nov 6, 2015 at 5:19 AM, Rob Herring wrote:
> On Thu, Nov 05, 2015 at 08:18:42AM +0530, Punnaiah Choudary Kalluri wrote:
>> This patch adds the dts binding document for arasan nand flash
>> controller.
>>
>> Signed-off-by: Punnaiah Choudary Kalluri
>> ---
Device like MT29F32G08ABCDBJ4 have a writesize/oobsize of 16K/1216 Bytes.
So, increasing the maximum ecc placement locations to 1216
Signed-off-by: Punnaiah Choudary Kalluri
---
include/linux/mtd/mtd.h| 2 +-
include/uapi/mtd/mtd-abi.h | 4 ++--
2 files changed, 3 insertions(+), 3 deletions
Added macro definition for nvddr data interface mode field in
the sub feature parameter of onfi timing mode configuration.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v4:
- New change
---
include/linux/mtd/nand.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/linux
This patch adds the dts binding document for arasan nand flash
controller.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v4:
- Added num-cs property
- Added clock support
Changes in v3:
- None
Changes in v2:
- None
---
.../devicetree/bindings/mtd/arasan_nfc.txt | 34
Added the basic driver for Arasan Nand Flash Controller used in
Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
correction.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v4:
- Added support for onfi timing mode configuration
- Added clock suort
- Added support for
gt;> From: Peter Chen [mailto:peter.c...@freescale.com]
>> >> Sent: Thursday, September 24, 2015 2:41 PM
>> >> To: Subbaraya Sundeep Bhatta
>> >> Cc: ba...@ti.com; devicet...@vger.kernel.org; kis...@ti.com;
>> >> gre...@linuxfoundation.org; lin
xfoundation.org); kis...@ti.com; Punnaiah Choudary Kalluri
> Subject: Re: Chipidea ULPI driver
>
> (break your lines at 80-characters)
>
> On Thu, Sep 10, 2015 at 12:44:58PM +, Subbaraya Sundeep Bhatta wrote:
> > Hi Peter,
> >
> > We are using NOP transceiver dr
On Tue, Aug 25, 2015 at 12:16 PM, punnaiah choudary kalluri
wrote:
> Hi Rob,
>
> On Tue, Aug 25, 2015 at 12:23 AM, Rob Herring wrote:
>> On Wed, Aug 5, 2015 at 10:19 PM, Punnaiah Choudary Kalluri
>> wrote:
>>> Device-tree binding documentation for Xilinx zynq
hu, Aug 27, 2015 at 01:11:30PM +0530, punnaiah choudary kalluri
>> > > wrote:
>> > > > Hi,
>> > > >
>> > > > On Thu, Aug 27, 2015 at 10:03 AM, Peter Chen
>> > > > wrote:
>> > > > > On Thu, Aug 27, 2015 at 10:59:
On Thu, Aug 27, 2015 at 3:45 PM, Jagan Teki wrote:
> On 27 August 2015 at 14:18, punnaiah choudary kalluri
> wrote:
>> On Thu, Aug 27, 2015 at 11:53 AM, Jagan Teki wrote:
>>> On 26 August 2015 at 21:02, punnaiah choudary kalluri
>>> wrote:
>>>> O
On Thu, Aug 27, 2015 at 11:53 AM, Jagan Teki wrote:
> On 26 August 2015 at 21:02, punnaiah choudary kalluri
> wrote:
>> On Wed, Aug 26, 2015 at 5:49 PM, Jagan Teki wrote:
>>> On 26 August 2015 at 11:56, Ranjit Waghmode
>>> wrote:
>>>> This serie
Hi,
On Thu, Aug 27, 2015 at 10:03 AM, Peter Chen wrote:
> On Thu, Aug 27, 2015 at 10:59:22AM +0530, sundeep subbaraya wrote:
>> Hi,
>>
>>
>> On Wed, Aug 26, 2015 at 8:57 PM, Nathan Sullivan
>> wrote:
>> > The Xilinx Zynq udc does not need the CI_HDRC_DISABLE_STREAMING flag,
>> > unlike the defa
On Wed, Aug 26, 2015 at 5:49 PM, Jagan Teki wrote:
> On 26 August 2015 at 11:56, Ranjit Waghmode
> wrote:
>> This series adds dual parallel mode support for Zynq Ultrascale+
>> MPSoC GQSPI controller driver.
>>
>> What is dual parallel mode?
>> ---
>> ZynqMP GQSPI control
Hi Rob,
On Tue, Aug 25, 2015 at 12:23 AM, Rob Herring wrote:
> On Wed, Aug 5, 2015 at 10:19 PM, Punnaiah Choudary Kalluri
> wrote:
>> Device-tree binding documentation for Xilinx zynqmp dma engine used in
>> Zynq UltraScale+ MPSoC.
>>
>> Signed-off
On Mon, Aug 24, 2015 at 7:17 PM, Lars-Peter Clausen wrote:
> On 08/06/2015 05:19 AM, Punnaiah Choudary Kalluri wrote:
> [...]
>> +Optional properties:
>> +- xlnx,include-sg: Indicates the controller to operate in simple or scatter
>> +gather dma
On Sun, Aug 23, 2015 at 7:38 PM, Vinod Koul wrote:
> On Thu, Aug 20, 2015 at 12:01:27PM +0530, punnaiah choudary kalluri wrote:
>> On Thu, Aug 20, 2015 at 11:43 AM, Vinod Koul wrote:
>> > On Thu, Aug 06, 2015 at 08:49:33AM +0530, Punnaiah Chou
Hi Moritz,
Thanks. I will take care of these suggestions in next version
Regards,
Punnaiah
On Fri, Aug 21, 2015 at 10:12 PM, Moritz Fischer
wrote:
> Hi all,
>
> sorry for HTML mail spam last night ... couple of nits below
>
> On Wed, Aug 5, 2015 at 8:19 PM, Punnaiah Choudary K
On Thu, Aug 20, 2015 at 11:43 AM, Vinod Koul wrote:
> On Thu, Aug 06, 2015 at 08:49:33AM +0530, Punnaiah Choudary Kalluri wrote:
>
>> + list_for_each_entry_safe(desc, next, &chan->done_list, node) {
>> + dma_async_tx_callback callback;
>> +
On Thu, Aug 20, 2015 at 11:22 AM, Vinod Koul wrote:
> On Thu, Aug 06, 2015 at 08:49:32AM +0530, Punnaiah Choudary Kalluri wrote:
>> Device-tree binding documentation for Xilinx zynqmp dma engine used in
>> Zynq UltraScale+ MPSoC.
>>
>> Signed-off-by: Punnaiah Choudary
Added the basic driver for zynqmp dma engine used in Zynq
UltraScale+ MPSoC. The initial release of this driver supports
only memory to memory transfers.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v4:
- Modified the defines to start with ZYNQMP_DMA perfix
- Changed the
Device-tree binding documentation for Xilinx zynqmp dma engine used in
Zynq UltraScale+ MPSoC.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v4:
- None
Changes in v3:
- None
Changes in v2:
- None
---
.../devicetree/bindings/dma/xilinx/zynqmp_dma.txt | 61
1
On Fri, Jul 17, 2015 at 2:38 PM, Vinod Koul wrote:
> On Fri, Jul 17, 2015 at 09:54:48AM +0530, punnaiah choudary kalluri wrote:
> your MUA is wrapping lines funny, please fix it
>
>> >> I have explored using the virt-dma to reduce the common list processing,
>>
On Fri, Jul 17, 2015 at 8:35 AM, Vinod Koul wrote:
> On Fri, Jul 17, 2015 at 06:22:42AM +0530, punnaiah choudary kalluri wrote:
>> On Thu, Jul 16, 2015 at 6:05 PM, Vinod Koul wrote:
>> > On Tue, Jun 16, 2015 at 08:04:43AM +0530, Punnaiah Choudary Kalluri wrote:
>>
On Thu, Jul 16, 2015 at 6:05 PM, Vinod Koul wrote:
> On Tue, Jun 16, 2015 at 08:04:43AM +0530, Punnaiah Choudary Kalluri wrote:
>> +/* Register Offsets */
>> +#define ISR 0x100
>> +#define IMR 0x104
>> +#define IER
Device like MT29F32G08ABCDBJ4 have a writesize/oobsize of 16K/1216 Bytes.
So, increasing the maximum ecc placement locations to 1216
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v2:
- Corrected the oobsize in commit message and code from 1260 to 1216
- Aligned the new values to
Device-tree binding documentation for Xilinx zynqmp dma engine used in
Zynq UltraScale+ MPSoC.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v3:
- None
Changes in v2:
- None
---
.../devicetree/bindings/dma/xilinx/zynqmp_dma.txt | 61
1 files changed, 61
Added the basic driver for zynqmp dma engine used in Zynq
UltraScale+ MPSoC. The initial release of this driver supports
only memory to memory transfers.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v3:
- Modified the zynqmp_dma_chan_is_idle function return type to bool
Changes in v2
Hi Brian,
Any further review comments on this patch ?
Could you consider this driver for 4.3 version if you think the
changes are fine.?
Regards,
Punnaiah
On Fri, May 22, 2015 at 11:49 PM, Punnaiah Choudary Kalluri
wrote:
> Added the basic driver for Arasan Nand Flash Controller used
Enable SG support for Zynq SOC family devices.
Signed-off-by: Punnaiah Choudary Kalluri
---
drivers/net/ethernet/cadence/macb.c |6 ++
1 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb.c
b/drivers/net/ethernet/cadence/macb.c
index caeb395
...@gmail.com;
> b...@decadent.org.uk; mika.westerb...@linux.intel.com; "Bean Huo 霍斌
> 斌 (beanhuo)"; Harini Katakam; Anurag Kumar Vulisha; Srikanth Vemula;
> linux-kernel@vger.kernel.org; broo...@kernel.org; linux-
> m...@lists.infradead.org; Anirudha Sarangi; Punnaiah Choudary Kalluri
Added the basic driver for zynqmp dma engine used in Zynq
UltraScale+ MPSoC. The initial release of this driver supports
only memory to memory transfers.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v3:
- Modified the zynqmp_dma_chan_is_idle function return type to
bool
Changes in
Device-tree binding documentation for Xilinx zynqmp dma engine used in
Zynq UltraScale+ MPSoC.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v3:
- None
Changes in v2:
- None
---
.../devicetree/bindings/dma/xilinx/zynqmp_dma.txt | 61
1 files changed, 61
> -Original Message-
> From: Shubhrajyoti Datta [mailto:omaplinuxker...@gmail.com]
> Sent: Monday, June 15, 2015 8:35 PM
> To: Punnaiah Choudary Kalluri
> Cc: robh...@kernel.org; pawel.m...@arm.com; mark.rutl...@arm.com;
> ijc+devicet...@hellion.org.uk; Kumar Gala; M
Device-tree binding documentation for Xilinx zynqmp dma engine used in
Zynq UltraScale+ MPSoC.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v2:
- None
---
.../devicetree/bindings/dma/xilinx/zynqmp_dma.txt | 61
1 files changed, 61 insertions(+), 0 deletions
Added the basic driver for zynqmp dma engine used in Zynq
UltraScale+ MPSoC. The initial release of this driver supports
only memory to memory transfers.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v2:
- Corrected the function header documentation
- Framework expects bus-width value
Ping.
Regards,
Punnaiah
On Mon, Jun 8, 2015 at 11:38 PM, Punnaiah Choudary Kalluri
wrote:
> Add driver for arm pl353 static memory controller nand interface with
> HW ECC support. This controller is used in xilinx zynq soc for interfacing
> the nand flash memory.
>
> Signed-o
Ping.
Regards,
Punnaiah
On Mon, Jun 8, 2015 at 11:37 PM, Punnaiah Choudary Kalluri
wrote:
> Add driver for arm pl353 static memory controller. This controller is
> used in xilinx zynq soc for interfacing the nand and nor/sram memory
> devices.
>
> Signed-off-by: Punnaiah C
Ping.
Regards,
Punnaiah
On Fri, May 22, 2015 at 11:49 PM, Punnaiah Choudary Kalluri
wrote:
> Added the basic driver for Arasan Nand Flash Controller used in
> Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
> correction.
>
> Signed-off-by: Punnaiah C
On Mon, Jun 8, 2015 at 10:27 PM, Punnaiah Choudary Kalluri
wrote:
> Added the basic driver for zynqmp dma engine used in Zynq
> UltraScale+ MPSoC. The initial release of this driver supports
> only memory to memory transfers.
>
> Signed-off-by: Punnaiah Choudary Kalluri
>
Add pl353 static memory controller devicetree binding information.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v7:
- Corrected clocks description
- prefixed '#' for address and size cells
Changes in v6:
- None
Changes in v5:
- Removed timing properties
Changes in v
Add driver for arm pl353 static memory controller. This controller is
used in xilinx zynq soc for interfacing the nand and nor/sram memory
devices.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v7:
- Corrected the kconfig to use tristate selection
- Corrected the GPL licence ident
Added notes about the controller and driver
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v7:
- None
Changes in v6:
- None
Changes in v5:
- Fixed the review comments
Changes in v4:
- None
---
Documentation/mtd/nand/pl353-nand.txt | 92 +
1 files
Add driver for arm pl353 static memory controller nand interface with
HW ECC support. This controller is used in xilinx zynq soc for interfacing
the nand flash memory.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v7:
- Currently not implemented the memclk rate adjustments. I will
://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
ARM pl353 smc TRM link:
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0380g/
DDI0380G_smc_pl350_series_r2p1_trm.pdf
Punnaiah Choudary Kalluri (3):
nand: pl353: Add basic driver for arm pl353 smc nand interface
nand
Added software ecc support.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v7:
- None
Changes in v6:
- None
Changes in v5:
- None
Changes in v4:
- Updated the driver to sync with pl353_smc driver APIs
---
drivers/mtd/nand/pl353_nand.c | 164 +
1
://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
ARM pl353 smc TRM link:
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0380g/
DDI0380G_smc_pl350_series_r2p1_trm.pdf
Punnaiah Choudary Kalluri (2):
Devicetree: Add pl353 smc controller devicetree binding information
Added the basic driver for zynqmp dma engine used in Zynq
UltraScale+ MPSoC. The initial release of this driver supports
only memory to memory transfers.
Signed-off-by: Punnaiah Choudary Kalluri
---
drivers/dma/Kconfig |6 +
drivers/dma/xilinx/Makefile |1 +
drivers/dma
Device-tree binding documentation for Xilinx zynqmp dma engine used in
Zynq UltraScale+ MPSoC.
Signed-off-by: Punnaiah Choudary Kalluri
---
.../devicetree/bindings/dma/xilinx/zynqmp_dma.txt | 61
1 files changed, 61 insertions(+), 0 deletions(-)
create mode 100644
k; Soren Brinkmann;
> devicet...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux-
> ker...@vger.kernel.org; linux-spi; Punnaiah Choudary Kalluri;
> ran27...@gmail.com
> Subject: Re: [RFC PATCH 2/2] spi: Add support for Zynq Ultrascale+ MPSoC
> GQSPI controller
>
> O
Added the basic driver for Arasan Nand Flash Controller used in
Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
correction.
Signed-off-by: Punnaiah Choudary Kalluri
---
Chnages in v3:
- Removed unused variables
- Avoided busy loop and used jifies based implementation
- Fixed
This patch adds the dts binding document for arasan nand flash
controller.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v3:
- None
Changes in v2:
- None
---
.../devicetree/bindings/mtd/arasan_nfc.txt | 27
1 files changed, 27 insertions(+), 0 deletions
On Thu, May 21, 2015 at 2:19 AM, Brian Norris
wrote:
> On Tue, May 19, 2015 at 07:19:17PM +0530, Punnaiah Choudary Kalluri wrote:
>> Added the basic driver for Arasan Nand Flash Controller used in
>> Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
>> correction
Added the basic driver for Arasan Nand Flash Controller used in
Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
correction.
Signed-off-by: Punnaiah Choudary Kalluri
Tested-by: Michal Simek
---
Changes in v2:
- Added missing of.h to avoid kbuild system report error
---
drivers
This patch adds the dts binding document for arasan nand flash
controller.
Signed-off-by: Punnaiah Choudary Kalluri
---
Changes in v2:
- None.
---
.../devicetree/bindings/mtd/arasan_nfc.txt | 27
1 files changed, 27 insertions(+), 0 deletions(-)
create mode
From: Punnaiah Choudary Kalluri
Under heavy Rx load, observed that the Hw is updating the USED bit
and it is not updating the received frame status to the BD control
field. This could be lack of resources for processing the BDs at high
data rates. Driver drops the frame associated with this BD
On Tue, Apr 28, 2015 at 9:08 PM, Ben Shelton wrote:
> Hi Punnaiah,
>
> On 04/13, Punnaiah Choudary Kalluri wrote:
>> Add driver for arm pl353 static memory controller nand interface with
>> HW ECC support. This controller is used in xilinx zynq soc for interfacing
>
On Tue, Apr 28, 2015 at 7:33 PM, Josh Cartwright wrote:
> On Tue, Apr 28, 2015 at 09:14:26AM +0530, punnaiah choudary kalluri wrote:
>> On Tue, Apr 28, 2015 at 8:52 AM, Brian Norris
>> wrote:
>> > On Tue, Apr 28, 2015 at 08:18:12AM +0530, punnaiah choudary kalluri wro
Hi Ben,
I will take care of the boundary conditions for both lower and upper
limits and update the patches accordingly.
Thanks,
Punnaiah
On Tue, Apr 28, 2015 at 8:41 PM, Ben Shelton wrote:
> Hi Punnaiah,
>
>> +/**
>> + * pl353_smc_set_cycles - Set memory timing parameters
>> + * @dev: Poi
On Tue, Apr 28, 2015 at 8:52 AM, Brian Norris
wrote:
> On Tue, Apr 28, 2015 at 08:18:12AM +0530, punnaiah choudary kalluri wrote:
>> On Tue, Apr 28, 2015 at 4:53 AM, Brian Norris
>> wrote:
>> > On Tue, Apr 28, 2015 at 12:19:16AM +0200, Richard Weinberger wrote:
>>
On Wed, Mar 25, 2015 at 7:32 PM, Richard Weinberger wrote:
> Some Micron NAND chips offer an on-die ECC (AKA internal ECC)
> feature. It is useful when the host-platform does not offer
> multi-bit ECC and software ECC is not feasible.
>
> Based on original work by David Mosberger
>
> Signed-off-b
On Tue, Apr 28, 2015 at 4:53 AM, Brian Norris
wrote:
> On Tue, Apr 28, 2015 at 12:19:16AM +0200, Richard Weinberger wrote:
>> Am 27.04.2015 um 23:35 schrieb Ben Shelton:
>> > I tested this against the latest version of the PL353 NAND driver that
>> > Punnaiah
>> > has been working to upstream (co
Hi Josh,
> -Original Message-
> From: Josh Cartwright [mailto:jo...@ni.com]
> Sent: Friday, April 24, 2015 1:21 AM
> To: Punnaiah Choudary Kalluri
> Cc: robh...@kernel.org; pawel.m...@arm.com; mark.rutl...@arm.com;
> ijc+devicet...@hellion.org.uk; ga...@codeaurora.org
On Thu, Apr 23, 2015 at 6:19 PM, Michal Simek wrote:
> On 04/16/2015 03:56 PM, Punnaiah Choudary Kalluri wrote:
>> Added the basic driver for Arasan Nand Flash Controller used in
>> Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
>> correction.
>>
Added the basic driver for Arasan Nand Flash Controller used in
Zynq UltraScale+ MPSoC. It supports only Hw Ecc and upto 24bit
correction.
Signed-off-by: Punnaiah Choudary Kalluri
---
drivers/mtd/nand/Kconfig |7 +
drivers/mtd/nand/Makefile |1 +
drivers/mtd/nand/arasan_nfc.c
This patch adds the dts binding document for arasan nand flash
controller.
Signed-off-by: Punnaiah Choudary Kalluri
---
.../devicetree/bindings/mtd/arasan_nfc.txt | 27
1 files changed, 27 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree
Hi Paul Bolle
On Tue, Apr 14, 2015 at 12:19 AM, Paul Bolle wrote:
> On Mon, 2015-04-13 at 21:41 +0530, Punnaiah Choudary Kalluri wrote:
>> --- a/drivers/memory/Kconfig
>> +++ b/drivers/memory/Kconfig
>
>> +config PL353_SMC
>> + bool "ARM PL353 St
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