The of_get_gpio() may return error, so check it immediately. The old
code might fail with EPROBE_DEFER which was masked by the
folowing gpio_is_valid() and returned EINVAL.
Signed-off-by: Radim Pavlik
---
drivers/input/touchscreen/auo-pixcir-ts.c | 4
1 file changed, 4 insertions(+)
diff
The of_get_gpio() may return error, so check it immediately. The old
code might fail with EPROBE_DEFER which was masked by the
folowing gpio_is_valid() and returned EINVAL.
Signed-off-by: Radim Pavlik
---
drivers/input/touchscreen/auo-pixcir-ts.c | 4
1 file changed, 4 insertions(+)
diff
ints remain because they don't need to be
protected by CREATE_TRACE_POINTS and moving them closer would be
unsightly.
Tested-by: Jirka Hladký
Tested-by: Jiří Vozár
Signed-off-by: Radim Krčmář
---
include/trace/events/sched.h | 22 ++
kernel/sched/core.c
Zijlstra
Cc: Thomas Gleixner
Cc: Borislav Petkov
Cc: Dave Hansen
Cc: Steven Rostedt
Cc: "H. Peter Anvin"
Cc: Andy Lutomirski
Cc: Jirka Hladký
Cc: Jiří Vozár
Cc: x...@kernel.org
Radim Krčmář (2):
x86/mm/tlb: include tracepoints from tlb.c instead of mmu_context.h
sched/
asm/mmu_context.h is a tree-wide include that will unnecessarily break
the build if CREATE_TRACE_POINTS is defined when including it.
Signed-off-by: Radim Krčmář
---
arch/x86/include/asm/mmu_context.h | 2 --
arch/x86/mm/tlb.c | 2 ++
2 files changed, 2 insertions(+), 2
event infinitely looping emulation of a failing syscall while single
stepping.
- Do not crash the host when nesting is disabled.
Alexey Kardashevskiy (1):
KVM: PPC: Book3S: Fix incorrect guest-to-user-translation error handling
2019-08-27 18:04+0200, Vitaly Kuznetsov:
> If kvm_intel is loaded with nested=0 parameter an attempt to perform
> KVM_GET_SUPPORTED_HV_CPUID results in OOPS as nested_get_evmcs_version hook
> in kvm_x86_ops is NULL (we assign it in nested_vmx_hardware_setup() and
> this only happens in case nested
2019-08-23 13:55-0700, Sean Christopherson:
> Don't advance RIP or inject a single-step #DB if emulation signals a
> fault. This logic applies to all state updates that are conditional on
> clean retirement of the emulation instruction, e.g. updating RFLAGS was
> previously handled by commit 38827
2019-08-15 12:03+0800, Wanpeng Li:
> From: Wanpeng Li
>
> Even if for realtime CPUs, cache line bounces, frequency scaling, presence
> of higher-priority RT tasks, etc can still cause different response. These
> interferences should be considered and periodically revaluate whether
> or not the
2019-06-17 19:24+0800, Wanpeng Li:
> From: Wanpeng Li
>
> Wait before calling posted-interrupt deliver function directly to add
> advance timer support to pi_inject_timer.
>
> Cc: Paolo Bonzini
> Cc: Radim Krčmář
> Cc: Marcelo Tosatti
> Signed-off-by: Wanpeng L
er_async_pf, this patch
> commonizes the code that chooses whether to deliver an async page fault
> (kvm_arch_async_page_not_present) and the code that chooses whether a
> page fault should be handled synchronously (kvm_can_do_async_pf).
>
> Signed-off-by: Paolo Bonzini
> ---
Reviewed-by: Radim Krčmář
2019-06-13 19:03+0200, Paolo Bonzini:
> From: Sean Christopherson
>
> ... as a malicious userspace can run a toy guest to generate invalid
> virtual-APIC page addresses in L1, i.e. flood the kernel log with error
> messages.
>
> Fixes: 690908104e39d ("KVM: nVMX: allow tests to use bad virtual-AP
2019-06-17 14:31+0800, Xiaoyao Li:
> On 6/17/2019 11:32 AM, Xiaoyao Li wrote:
> > On 6/16/2019 5:55 PM, Tao Xu wrote:
> > > + if (vmx->msr_ia32_umwait_control != host_umwait_control)
> > > + add_atomic_switch_msr(vmx, MSR_IA32_UMWAIT_CONTROL,
> > > + vmx->msr_ia32_umw
2019-06-13 13:03+0200, Paolo Bonzini:
> Even when asynchronous page fault is disabled, KVM does not want to pause
> the host if a guest triggers a page fault; instead it will put it into
> an artificial HLT state that allows running other host processes while
> allowing interrupt delivery into the
m_exit_controls/pin_based_vm_exec_control/secondary_vm_exec_control
> are covered by CONTROL_GRP1.
>
> Fixes: 945679e301ea0 ("KVM: nVMX: add enlightened VMCS state")
> Signed-off-by: Vitaly Kuznetsov
> ---
Reviewed-by: Radim Krčmář
2019-06-12 21:22+0200, Radim Krčmář:
> 2019-06-12 08:14-0700, Sean Christopherson:
> > On Wed, Jun 12, 2019 at 05:40:18PM +0800, Wanpeng Li wrote:
> > > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> > > @@ -145,6 +145,12 @@ module_param(tsc_tolerance_ppm, uin
2019-06-12 08:14-0700, Sean Christopherson:
> On Wed, Jun 12, 2019 at 05:40:18PM +0800, Wanpeng Li wrote:
> > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> > @@ -145,6 +145,12 @@ module_param(tsc_tolerance_ppm, uint, S_IRUGO |
> > S_IWUSR);
> > static int __read_mostly lapic_timer_advanc
2019-06-12 09:48+0800, Wanpeng Li:
> On Wed, 12 Jun 2019 at 04:39, Marcelo Tosatti wrote:
> > On Tue, Jun 11, 2019 at 08:17:07PM +0800, Wanpeng Li wrote:
> > > From: Wanpeng Li
> > > diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> > > @@ -133,6 +133,12 @@ inline bool
> > > posted_inte
_full cover the pCPUs which vCPUs resident, several pCPUs
> surplus for housekeeping, disable mwait/hlt/pause vmexits to occupy
> the pCPUs, fortunately preemption timer is disabled after mwait is
> exposed to guest which makes emulated timer offload can be possible.
>
> C
2019-06-06 13:31+0800, Wanpeng Li:
> From: Wanpeng Li
>
> Dedicated instances are currently disturbed by unnecessary jitter due
> to the emulated lapic timers fire on the same pCPUs which vCPUs resident.
> There is no hardware virtual timer on Intel for guest like ARM. Both
> programming timer
2019-05-30 09:05+0800, Wanpeng Li:
> The idea is from Xen, when sending a call-function IPI-many to vCPUs,
> yield if any of the IPI target vCPUs was preempted. 17% performance
> increasement of ebizzy benchmark can be observed in an over-subscribe
> environment. (w/ kvm-pv-tlb disabled, testing
> over-subscribe environment. (w/ kvm-pv-tlb disabled, testing TLB flush
> call-function IPI-many since call-function is not easy to be trigged
> by userspace workload).
>
> Cc: Paolo Bonzini
> Cc: Radim Krčmář
> Cc: Liran Alon
> Signed-off-by: Wanpeng Li
> ---
> di
2019-05-26 21:30+0800, Like Xu:
> Add support to expose Intel V2 Extended Topology Enumeration Leaf for
> some new systems with multiple software-visible die within each package.
>
> Per Intel's SDM, when CPUID executes with EAX set to 1FH, the processor
> returns information about extended topolo
2019-05-12 13:53+0200, Marc Haber:
> since updating my home desktop machine to kernel 5.1.1, KVM guests
> started on that machine segfault after booting:
[...]
> Any idea short of bisecting?
It has also been spotted by Borislav and the fix [1] should land in the
next kernel update, thanks for the
2019-05-13 17:46+0800, Wanpeng Li:
> From: Wanpeng Li
>
> MSR IA32_MSIC_ENABLE bit 18, according to SDM:
>
> | When this bit is set to 0, the MONITOR feature flag is not set
> (CPUID.01H:ECX[bit 3] = 0).
> | This indicates that MONITOR/MWAIT are not supported.
> |
> | Software attempts to
This reverts commit 919f6cd8bb2fe7151f8aecebc3b3d1ca2567396e.
The patch was applied twice.
The first commit is eca6be566d47029f945a5f8e1c94d374e31df2ca.
Reported-by: Cornelia Huck
Signed-off-by: Radim Krčmář
---
Documentation/virtual/kvm/api.txt | 17 -
1 file changed, 17
Linus,
The following changes since commit bfeffd155283772bbe78c6a05dec7c0128ee500c:
Linux 5.0-rc1 (2019-01-06 17:08:20 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/virt/kvm/kvm tags/for-linus
for you to fetch changes up to 826c1362e79abcd36f99092acd083b5a2d57
2019-01-04 10:29-0600, Gustavo A. R. Silva:
> One of the more common cases of allocation size calculations is finding
> the size of a structure that has a zero-sized array at the end, along
> with memory for some number of elements for that array. For example:
>
> struct foo {
> int stuff;
>
2019-01-04 15:20+0800, lantianyu1...@gmail.com:
> From: Lan Tianyu
>
> The "ret" is initialized to be ENOTSUPP. The return value of
> __hv_remote_flush_tlb_with_range() will be Or with "ret" when ept
> table potiners are mismatched. This will cause return ENOTSUPP even if
> flush tlb successfully
2019-01-02 12:56-0800, David Rientjes:
> By code inspection, it was found that multiple calls to KVM_SEV_INIT
> could deplete asid bits and overwrite kvm_sev_info's regions_list.
>
> Multiple calls to KVM_SVM_INIT is not likely to occur with QEMU, but this
> should likely be fixed anyway.
>
> Thi
2019-01-08 17:28+0100, Tomas Bortoli:
> Hi Paolo,
>
> On 1/7/19 11:42 PM, Paolo Bonzini wrote:
> > On 02/01/19 18:29, Tomas Bortoli wrote:
> >>n = kvm_dirty_bitmap_bytes(memslot);
> >> +
> >> + if (n << 3 < log->num_pages || log->first_page > log->num_pages)
> >> + return -EINVAL;
>
2018-12-27 14:22+0800, Peng Hao:
> Conversion to bool is not needed in ioeventfd_in_range.
>
> Signed-off-by: Peng Hao
> ---
Fixed the typo in subject and queued, thanks.
2018-12-26 14:40-0600, Gustavo A. R. Silva:
> ctl_bitmask in pt_desc is of type u64. When an integer like 0xf is
> being left shifted more than 32 bits, the behavior is undefined.
>
> Fix this by adding suffix ULL to integer 0xf.
>
> Addresses-Coverity-ID: 1476095 ("Bad bit shift operation")
> Fi
2018-12-24 20:00+0800, Peng Hao:
> When handling ept misconfig exit, it will call emulate instruction
> with insn_len = 0. The decode instruction function may return a fetch
> fault and should propagate to guest.
>
> The problem will result to emulation fail.
> KVM internal error. Suberror: 1
> em
2018-11-02 17:05+0800, Peng Hao:
> Update the verbose license text with the matching SPDX
> license identifier.
>
> Signed-off-by: Peng Hao
> ---
> arch/x86/kernel/kvmclock.c | 15 +--
> 1 files changed, 1 insertions(+), 14 deletions(-)
>
> diff --git a/arch/x86/kernel/kvmclock.c b
2018-12-19 12:15+0100, Vitaly Kuznetsov:
> When we get a report like
>
> Test Assertion Failure
> x86_64/state_test.c:157: run->exit_reason == KVM_EXIT_IO
> pid=955 tid=955 - Success
> 10x00401350: main at state_test.c:154
> 20x7fc31c9e9412: ?? ?
2018-12-19 12:06+0100, Vitaly Kuznetsov:
> AMD doesn't seem to implement MSR_IA32_MCG_EXT_CTL and svm code in kvm
> knows nothing about it, however, this MSR is among emulated_msrs and
> thus returned with KVM_GET_MSR_INDEX_LIST. The consequent KVM_GET_MSRS,
> of course, fails.
>
> Report the MSR
worker thread to zap collapsible sptes in order to lazy
> collapse
> small sptes into large sptes during roll-back after live migration fails.
>
> Cc: Paolo Bonzini
> Cc: Radim Krčmář
> Signed-off-by: Wanpeng Li
> ---
> @@ -5679,14 +5679,41 @@ static bool kvm_
map has been
> deleted.
>
> Signed-off-by: Peng Hao
> ---
Reviewed-by: Radim Krčmář
he address to be page aligned.
> >
> > Only validate that the address does not cross the maximum physical address
> > without enforcing a page alignment.
> >
> > Cc: Paolo Bonzini
> > Cc: Radim Krčmář
> > Cc: Thomas Gleixner
> > Cc: Ingo Molnar
>
YCB on host FORMAT-2
KVM: s390: vsie: allow guest FORMAT-0 CRYCB on host FORMAT-2
KVM: s390: Tracing APCB changes
s390: vfio-ap: setup APCB mask using KVM dedicated function
Punit Agrawal (1):
KVM: arm/arm64: Ensure only THP is candidate for adjustment
Radim Krčmář (1):
index in xlate function
Pierre Morel (1):
KVM: s390: vsie: copy wrapping keys to right place
Radim Krčmář (3):
Merge tag 'kvm-ppc-fixes-4.19-1' of
git://git.kernel.org/.../paulus/powerpc
Merge tag 'kvm-s390-master-4.19-1' of
git://git.kernel.org/.../kvms390/li
apic_id to 255 to reserve enough space for any xAPIC
> ID.
>
> Reported-by: Dan Carpenter
> Reviewed-by: Liran Alon
> Cc: Paolo Bonzini
> Cc: Radim Krčmář
> Cc: Liran Alon
> Cc: Dan Carpenter
> Signed-off-by: Wanpeng Li
> ---
> v1 -> v2:
> * add min &g
2018-08-29 13:29+0300, Dan Carpenter:
> On Wed, Aug 29, 2018 at 06:23:08PM +0800, Wanpeng Li wrote:
> > On Wed, 29 Aug 2018 at 18:18, Dan Carpenter
> > wrote:
> > >
> > > On Wed, Aug 29, 2018 at 01:12:05PM +0300, Dan Carpenter wrote:
> > > > On Wed, Aug 29, 2018 at 12:05:06PM +0300, Liran Alon wr
2018-08-24 19:20+0800, Peng Hao:
> Signed-off-by: Peng Hao
> ---
> include/uapi/linux/kvm.h | 5 +++--
> virt/kvm/coalesced_mmio.c | 8 +---
> virt/kvm/kvm_main.c | 2 ++
> 3 files changed, 10 insertions(+), 5 deletions(-)
>
> diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux
2018-08-29 15:55+0200, Radim Krcmar:
> 2018-08-29 13:43+0300, Liran Alon:
> > Why is “min” defined as “int” instead of “unsigned int”?
> > It represents the lowest APIC ID in bitmap so it can’t be negative…
>
> Right,
>
> I think the code would look better as something
2018-08-29 13:43+0300, Liran Alon:
> Why is “min” defined as “int” instead of “unsigned int”?
> It represents the lowest APIC ID in bitmap so it can’t be negative…
Right,
I think the code would look better as something like (untested):
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
ind
2018-07-20 10:04+0200, Paolo Bonzini:
> On 20/07/2018 05:53, Wanpeng Li wrote:
> >>> - ret = kvm_hypercall3(KVM_HC_SEND_IPI, ipi_bitmap_low,
> >>> ipi_bitmap_high, vector);
> >>> + switch (vector) {
> >>> + default:
> >>> + icr = APIC_DM_FIXED | vector;
> >>> +
2018-07-20 11:45+0800, Wanpeng Li:
> On Fri, 20 Jul 2018 at 07:05, David Matlack wrote:
> >
> > On Mon, Jul 2, 2018 at 11:23 PM Wanpeng Li wrote:
> > >
> > > From: Wanpeng Li
> > >
> > > Implement paravirtual apic hooks to enable PV IPIs.
> >
> > Very cool. Thanks for working on this!
>
> Thank
2018-07-20 11:33+0800, Wanpeng Li:
> On Fri, 20 Jul 2018 at 00:28, Radim Krčmář wrote:
> > 2018-07-03 14:21+0800, Wanpeng Li:
> > But because it is very similar to x2apic, I'd really need some real
> > performance data to see if this benefits a real workload.
>
&g
2018-07-19 18:47+0200, Paolo Bonzini:
> On 19/07/2018 18:28, Radim Krčmář wrote:
> >> +
> >> + kvm_hypercall3(KVM_HC_SEND_IPI, ipi_bitmap_low, ipi_bitmap_high,
> >> vector);
> > and
> >
> > kvm_hypercall3(KVM_HC_SEND_IPI, ipi_bitmap[0],
2018-07-03 14:21+0800, Wanpeng Li:
> From: Wanpeng Li
>
> The NMI delivery mode of ICR is used to deliver an NMI to the processor,
> and the vector information is ignored.
>
> Cc: Paolo Bonzini
> Cc: Radim Krčmář
> Cc: Vitaly Kuznetsov
> Signed-off-by: Wanpeng Li
l 128 vCPUs VM, it is big enough for cloud
> environment currently, supporting more vCPUs needs to introduce more
> complex logic, in the future this might be extended if needed.
>
> Cc: Paolo Bonzini
> Cc: Radim Krčmář
> Cc: Vitaly Kuznetsov
> Signed-off-by: Wanpeng Li
>
ving and restoring a VM
> that is in VMX operation.
>
> Cc: Paolo Bonzini
> Cc: Radim Krčmář
> Cc: Thomas Gleixner
> Cc: Ingo Molnar
> Cc: H. Peter Anvin
> Cc: x...@kernel.org
> Cc: k...@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> Signed-off-by: Jim Mat
; already ran out of space for x86 due to the hard-coded check.
>
> The only exception here is ARM32 as it is still 32-bits.
What do you mean?
I think we're just going to slow down kvm_request_pending() on 32 bit
architectures.
> Cc: Paolo Bonzini
> Cc: Radim Krčmář
> Cc: k
45.42%42.08% 6.37us ( +- 20.37% )
>
> Cc: Paolo Bonzini
> Cc: Radim Krčmář
> Cc: Eduardo Habkost
> Cc: Peng Hao
> Signed-off-by: Peng Hao
> Signed-off-by: Wanpeng Li
> ---
> v1 -> v2:
> * add the original author
>
> Documentation/virtual/kvm/0
2018-06-26 20:59+0800, LiuYang:
> GCC 5.4.0 enables raw strings by default and they have higher priority
> than macros, thus R is interpreted incorrectly.
> Fix it by putting a space between macro R and a string literal.
>
> Signed-off-by: LiuYang
> ---
This got fixed in 2012 by b188c81f2e1a ("K
KVM: arm64: Prevent KVM_COMPAT from being selected
Mark Rutland (1):
arm64: Introduce sysreg_clear_set()
Radim Krčmář (1):
Merge tag 'kvmarm-fixes-for-4.18-1' of
git://git.kernel.org/.../kvmarm/kvmarm
Vitaly Kuznetsov (1):
KVM: fix KVM_CAP_HYPERV_TLBFLUSH paragraph nu
2018-06-22 21:09+0200, Borislav Petkov:
> On Fri, Jun 22, 2018 at 08:52:38PM +0200, Radim Krčmář wrote:
> > msr_info->host_initiated is always going to return true, so it would be
> > better to put it outside of __set_mci_status.
> >
> > Maybe we could just write the
2018-06-22 16:56+0200, Vitaly Kuznetsov:
> Using hypercall for sending IPIs is faster because this allows to specify
> any number of vCPUs (even > 64 with sparse CPU set), the whole procedure
> will take only one VMEXIT.
>
> Current Hyper-V TLFS (v5.0b) claims that HvCallSendSyntheticClusterIpi
>
2018-06-22 11:51+0200, Borislav Petkov:
> From: Borislav Petkov
>
> The hardware configuration register has some useful bits which can be
> used by guests. Implement McStatusWrEn which can be used by guests when
> injecting MCEs with the in-kernel mce-inject module.
>
> For that, we need to set
2018-06-22 20:24+0200, Borislav Petkov:
> On Fri, Jun 22, 2018 at 08:16:04PM +0200, Radim Krčmář wrote:
> > 2018-06-22 11:51+0200, Borislav Petkov:
> > > From: Borislav Petkov
> > >
> > > Extend the range of MCA banks which get passed to set/get_msr_mce()
2018-06-22 11:51+0200, Borislav Petkov:
> From: Borislav Petkov
>
> Extend the range of MCA banks which get passed to set/get_msr_mce() to
> include all the MSRs of the last bank too.
>
> Signed-off-by: Borislav Petkov
> ---
> arch/x86/kvm/x86.c | 5 +++--
> 1 file changed, 3 insertions(+), 2
2018-06-22 16:56+0200, Vitaly Kuznetsov:
> KVM_CAP_HYPERV_TLBFLUSH collided with KVM_CAP_S390_PSW-BPB, its paragraph
> number should now be 8.18.
>
> Signed-off-by: Vitaly Kuznetsov
> ---
> Documentation/virtual/kvm/api.txt | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
2018-05-29 16:23+0200, Radim Krčmář:
> 2018-05-29 14:53+0800, Wanpeng Li:
> > From: Wanpeng Li
> >
> > 'Commit d0659d946be0 ("KVM: x86: add option to advance tscdeadline
> > hrtimer expiration")' advances the tscdeadline (the timer is emulate
~63% latency (~4450 cycles to ~1660 cycles on
> a haswell desktop) for kvm-unit-tests/tscdeadline_latency when testing
> busy waits.
>
> Cc: Paolo Bonzini
> Cc: Radim Krčmář
> Signed-off-by: Wanpeng Li
> ---
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> @@
ook3S HV: Snapshot timebase offset on guest entry
KVM: PPC: Book 3S HV: Do ptesync in radix guest exit path
Radim Krčmář (2):
Merge tag 'kvm-ppc-fixes-4.17-1' of
git://git.kernel.org/.../paulus/powerpc
KVM: x86: fix #UD address of failed Hyper-V hypercalls
Wei Huang (1):
2018-05-16 17:21+0200, Vitaly Kuznetsov:
> Hyper-V style PV TLB flush hypercalls inmplementation will use this API.
> To avoid memory allocation in CONFIG_CPUMASK_OFFSTACK case add
> cpumask_var_t argument.
>
> Signed-off-by: Vitaly Kuznetsov
> ---
> diff --git a/virt/kvm/kvm_main.c b/virt/kvm/kv
2018-05-16 17:21+0200, Vitaly Kuznetsov:
> Changes since v3 [Radim Krcmar]:
> - PATCH2 fixing 'HV_GENERIC_SET_SPARCE_4K' typo added.
> - PATCH5 introducing kvm_make_vcpus_request_mask() API added.
> - Fix undefined behavior for hv->vp_index >= 64.
>
2018-05-21 10:52-0500, Brijesh Singh:
> On 05/19/2018 01:01 AM, Dan Carpenter wrote:
> > This is a fix from reviewing the code, but it looks like it might be
> > able to lead to an Oops. It affects 32bit systems.
> >
>
> Please note that SEV is not available on 32bit systems.
Added this note an
2018-05-25 17:36+0200, Arnd Bergmann:
> The global ms_hyperv variable is part of the hyperv support, so
> we get a link error from accessing it in kernels that have this
> turned off:
>
> arch/x86/kvm/vmx.o: In function `alloc_loaded_vmcs':
> vmx.c:(.text+0x1654a): undefined reference to `ms_hyper
2018-05-25 13:16-0400, Waiman Long:
> As the SSBD bit in kvm_cpuid_7_0_edx_x86_features has been renamed to
> SPEC_CTRL_SSBD in the commit 52817587e706 ("x86/cpufeatures: Disentangle
> SSBD enumeration"). The corresponding name change needed to be made in
> the KVM code as well.
>
> Fixes: 5281758
2018-04-16 13:08+0200, Vitaly Kuznetsov:
> Implement HvFlushVirtualAddress{List,Space}Ex hypercalls in a simplistic
> way: do full TLB flush with KVM_REQ_TLB_FLUSH and kick vCPUs which are
> currently IN_GUEST_MODE.
>
> Signed-off-by: Vitaly Kuznetsov
> ---
> diff --git a/arch/x86/kvm/hyperv.c b/
2018-04-16 13:08+0200, Vitaly Kuznetsov:
> Implement HvFlushVirtualAddress{List,Space} hypercalls in a simplistic way:
> do full TLB flush with KVM_REQ_TLB_FLUSH and kick vCPUs which are currently
> IN_GUEST_MODE.
>
> Signed-off-by: Vitaly Kuznetsov
> ---
> diff --git a/arch/x86/kvm/hyperv.c b/ar
2018-04-16 13:08+0200, Vitaly Kuznetsov:
> Hyper-V TLB flush hypercalls definitions will be required for KVM so move
> them hyperv-tlfs.h. Structures also need to be renamed as '_pcpu' suffix is
> invalid for a general-purpose definition.
>
> Signed-off-by: Vitaly Kuznetsov
> ---
> arch/x86/hype
of vcpu_write_sys_reg() arguments
arm64: vgic-v2: Fix proxying of cpuif access
Marc Zyngier (1):
KVM: arm/arm64: vgic: Fix source vcpu issues for GICv2 SGI
Radim Krčmář (1):
Merge tag 'kvmarm-fixes-for-4.17-2' of
git://git.kernel.org/.../kvmarm/kvmarm
Valentin Sc
e in use
KarimAllah Ahmed (1):
x86/headers/UAPI: Move DISABLE_EXITS KVM capability bits to the UAPI
Marc Zyngier (3):
KVM: arm/arm64: Close VMID generation race
arm64: KVM: Demote SVE and LORegion warnings to debug only
arm/arm64: KVM: Add PSCI version selection API
Radi
ource_read(vcpu_time);/* time since system
> boot */
> - delta += now.tv_sec * (u64)NSEC_PER_SEC + now.tv_nsec;
> + delta += now.tv_sec * NSEC_PER_SEC + now.tv_nsec;
>
> now.tv_nsec = do_div(delta, NSEC_PER_SEC);
> now.tv_sec = delta;
>
> - set_normalized_timespec(ts, now.tv_sec, now.tv_nsec);
> + set_normalized_timespec64(ts, now.tv_sec, now.tv_nsec);
> }
>
> void pvclock_set_pvti_cpu0_va(struct pvclock_vsyscall_time_info *pvti)
kvmclock and pvclock changes
Acked-by: Radim Krčmář
2018-04-23 10:04+0200, Arnd Bergmann:
> The hypercall was added using a struct timespec based implementation,
> but we should not use timespec in new code.
>
> This changes it to timespec64. There is no functional change
> here since the implementation is only used in 64-bit kernels
> that use the
rough.
>
> Signed-off-by: Christian Ehrhardt
> Signed-off-by: Stefan Fritsch
> ---
Nicely follows the implementation of aligned variants,
Reviewed-by: Radim Krčmář
gt;
> string[12] = 0;
> if (strncmp(string, "KVMKVMKVM\0\0\0", 12) == 0)
> printf("kvm guest\n");
> else
> printf("bare hardware\n");
> }
>
> Suggested-by: Andrew Cooper
> Reviewed-By: Liran
2018-04-02 18:10+0200, Vitaly Kuznetsov:
> Implement HvFlushVirtualAddress{List,Space} hypercalls in a simplistic way:
> do full TLB flush with KVM_REQ_TLB_FLUSH and rely on kvm_vcpu_kick()
> kicking only vCPUs which are currently IN_GUEST_MODE.
>
> Signed-off-by: Vitaly Kuznetsov
> ---
> arch/x
2018-03-16 00:57-1000, Joey Pabalinas:
> There doesn't seem to be any advantage to having a *completely*
> uninterruptible task here. For most users, allowing a task to respond
> to the SIGKILL interrupt signal (all other signals are ignored just like
> TASK_UNINTERRUPTIBLE) will not impact them at
> string[12] = 0;
> if (strncmp(string, "KVMKVMKVM\0\0\0", 12) == 0)
> printf("kvm guest\n");
> else
> printf("bare hardware\n");
> }
>
> Suggested-by: Andrew Cooper
>
Linus,
The following changes since commit daaf216c06fba4ee4dc3f62715667da929d68774:
KVM: x86: Fix device passthrough when SME is active (2018-03-16 14:32:23
+0100)
are available in the Git repository at:
git://git.kernel.org/pub/scm/virt/kvm/kvm tags/for-linus
for you to fetch changes up
2018-03-16 16:37-0400, Babu Moger:
> Bring the PLE(pause loop exit) logic to AMD svm driver.
>
> While testing, we found this helping in situations where numerous
> pauses are generated. Without these patches we could see continuos
> VMEXITS due to pause interceptions. Tested it on AMD EPYC server
2018-03-16 16:37-0400, Babu Moger:
> This patch brings some of the code from vmx to x86.h header file. Now, we
> can share this code between vmx and svm. Modified couple functions to make
> it common.
>
> Signed-off-by: Babu Moger
> ---
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> @@
2018-03-16 16:37-0400, Babu Moger:
> Get rid of ple_window_actual_max, because its benefits are really
> minuscule and the logic is complicated.
>
> The overflows(and underflow) are controlled in __ple_window_grow
> and _ple_window_shrink respectively.
>
> Suggested-by: R
st shows significant speedup (E5-2667 v4 @ 3.20GHz):
> > Before: 18890 cycles
> > After: 8304 cycles
> >
>
> Paolo, Radim,
>
> with Thomas' ACK on the series:
> https://www.spinics.net/lists/kvm/msg166309.html
>
> is there anything else needed for it to get merged (hoping for 4.17)?
Not from me; I've queued it, thanks.
t_spin_lock_key is set in kvm_spinlock_init() before
> jump_label_init()
> has been called, which will result in a WARN(). This patch fixes it by
> delaying
> the virt_spin_lock_key setup to .smp_prepare_cpus().
>
> Reported-by: Davidlohr Bueso
> Cc: Paolo Bonzini
> Cc: Radim Krčmář
> Cc: Davidlohr Bueso
> Signed-off-by: Wanpeng Li
> ---
Queued, thanks.
patch fixes it.
>
> Cc: Paolo Bonzini
> Cc: Radim Krčmář
> Signed-off-by: Wanpeng Li
> ---
I've modified the commit message and rebased it for kvm/master, thanks.
d to inspect them all.
>
> Tight CPUID loop test shows significant speedup:
> Before: 18890 cycles
> After: 8304 cycles
>
> Static key is being used to avoid performance penalty for non-Hyper-V
> deployments.
>
> Signed-off-by: Vitaly Kuznetsov
> ---
Looks good, thanks.
Reviewed-by: Radim Krčmář
2018-03-15 20:28+0100, Thomas Gleixner:
> On Thu, 15 Mar 2018, Radim Krčmář wrote:
> > 2018-03-15 16:19+0100, Vitaly Kuznetsov:
> > > This works. But hell, this is a crude hack :-) Not sure if there's a
> > > cleaner way to find what needs to be patched without
2018-03-15 18:02+0100, Radim Krčmář:
> We actually already have mov in the assembly:
>
> "cmp %%" _ASM_SP ", %c[host_rsp](%0) \n\t"
Oh hell, I didn't pay attention to this line before.
> "je 1f \n\t"
> "mov %%" _ASM_SP "
2018-03-15 16:19+0100, Vitaly Kuznetsov:
> Paolo Bonzini writes:
>
> > On 09/03/2018 15:02, Vitaly Kuznetsov wrote:
> >> Enlightened VMCS is just a structure in memory, the main benefit
> >> besides avoiding somewhat slower VMREAD/VMWRITE is using clean field
> >> mask: we tell the underlying hyp
2018-03-10 05:07+, Moger, Babu:
> Radim,
> Thanks for the comments. Taken care of most of the comments.
> I have few questions/comments. Please see inline.
>
> > -Original Message-----
> > From: Radim Krčmář
> > Sent: Friday, March 9, 2018 12:13 PM
e APIs it was easy to miss :-)
Indeed, I had no idea.
> Unfortunately, these APIs are only present if HAVE_JUMP_LABEL and
> (afaiu) we still care about KVM on !HAVE_JUMP_LABEL builds. It would be
> nice if we can make them behave the same way static_branch_likely() and
> friends do: comp
radix page fault
handler
KVM: PPC: Book3S HV: Fix VRMA initialization with 2MB or 1GB memory
backing
Radim Krčmář (2):
Merge tag 'kvm-ppc-fixes-4.16-1' of
git://git.kernel.org/.../paulus/powerpc
Merge tag 'kvm-s390-master-4.16-3' of
git://git.kernel.org/..
2018-03-02 11:17-0500, Babu Moger:
> Bring the PLE(pause loop exit) logic to AMD svm driver.
> We have noticed it help in situations where numerous pauses are generated
> due to spinlock or other scenarios. Tested it with idle=poll and noticed
> pause interceptions go down considerably.
>
> Signed
2018-03-09 16:21+0100, Vitaly Kuznetsov:
> Radim Krčmář writes:
> > This looks like it solves the problem when we get two SINTs with the
> > same vector back-to-back , but shouldn't these bits really be cleared on
> > EOI (either auto or manual)?
>
> Hmm,
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