On 12/9/20 12:39 PM, Catalin Marinas wrote:
>> I would have thought that the best way is to use TCO, so that we don't have
>> to
>> have dual mappings (and however many MB of extra page tables that might
>> imply).
>
> The problem appears when the VMM wants to use MTE itself (e.g. linked
>
On 12/9/20 9:27 AM, Catalin Marinas wrote:
> On Wed, Dec 09, 2020 at 01:25:18PM +, Marc Zyngier wrote:
>> Would this syscall operate on the guest address space? Or on the VMM's
>> own mapping?
...
> Whatever is easier for the VMM, I don't think it matters as long as the
> host kernel can get
On 9/10/20 3:24 AM, Steven Price wrote:
> It is a shame, however I suspect this is because to use those instructions you
> need to know the block size held in GMID_EL1. And at least in theory that
> could
> vary between CPUs.
Which is no different from having to read DCZID_EL0 in order to
On 9/4/20 9:00 AM, Steven Price wrote:
> 3. Doesn't provide any new methods for the VMM to access the tags on
> memory.
...
> (3) may be problematic and I'd welcome input from those familiar with
> VMMs. User space cannot access tags unless the memory is mapped with the
> PROT_MTE flag.
On 9/9/20 8:25 AM, Andrew Jones wrote:
>> * Provide a KVM-specific method to extract the tags from guest memory.
>>This might also have benefits in terms of providing an easy way to
>>read bulk tag data from guest memory (since the LDGM instruction
>>isn't available at EL0).
>
>
On 10/10/19 2:44 PM, Dave Martin wrote:
> #define PSR_IL_BIT (1 << 20)
> -#define PSR_BTYPE_CALL (2 << PSR_BTYPE_SHIFT)
> +
> +/* Convenience names for the values of PSTATE.BTYPE */
> +#define PSR_BTYPE_NONE (0b00 << PSR_BTYPE_SHIFT)
> +#define PSR_BTYPE_JC
On 10/11/19 11:10 AM, Mark Rutland wrote:
> On Thu, Oct 10, 2019 at 07:44:33PM +0100, Dave Martin wrote:
>> @@ -730,6 +730,11 @@ static void setup_return
>> regs->regs[29] = (unsigned long)>next_frame->fp;
>> regs->pc = (unsigned long)ka->sa.sa_handler;
>>
>> +if
On 12/10/18 2:12 PM, Kristina Martsenko wrote:
> The plan was to disable trapping, yes. However, after that thread there
> was a retrospective change applied to the architecture, such that the
> XPACLRI (and XPACD/XPACI) instructions are no longer trapped by
> HCR_EL2.API. (The public
On 12/10/18 6:03 AM, Catalin Marinas wrote:
>> However, it won't be too long before someone implements support for
>> ARMv8.2-LVA, at which point, without changes to mandatory pointer tagging, we
>> will only have 3 authentication bits: [54:52]. This seems useless and easily
>> brute-force-able.
On 12/7/18 12:39 PM, Kristina Martsenko wrote:
> When pointer authentication is in use, data/instruction pointers have a
> number of PAC bits inserted into them. The number and position of these
> bits depends on the configured TCR_ELx.TxSZ and whether tagging is
> enabled. ARMv8.3 allows tagging
+
> include/uapi/linux/elf.h | 1 +
> 4 files changed, 54 insertions(+)
Reviewed-by: Richard Henderson
r~
4/kernel/cpuinfo.c | 2 +
> arch/arm64/kernel/process.c | 4 ++
> 6 files changed, 100 insertions(+)
> create mode 100644 arch/arm64/include/asm/pointer_auth.h
Reviewed-by: Richard Henderson
r~
ture.c | 90
> +++++
> 3 files changed, 109 insertions(+), 1 deletion(-)
Reviewed-by: Richard Henderson
r~
gt; Acked-by: Christoffer Dall
> Cc: Catalin Marinas
> Cc: Marc Zyngier
> Cc: Will Deacon
> Cc: kvm...@lists.cs.columbia.edu
> ---
> arch/arm64/include/asm/kvm_arm.h | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
Reviewed-by: Richard Henderson
r~
On 12/7/18 12:39 PM, Kristina Martsenko wrote:
> From: Mark Rutland
>
> In subsequent patches we're going to expose ptrauth to the host kernel
> and userspace, but things are a bit trickier for guest kernels. For the
> time being, let's hide ptrauth from KVM guests.
>
> Regardless of how
c: kvm...@lists.cs.columbia.edu
> ---
> arch/arm64/include/asm/kvm_arm.h | 1 +
> arch/arm64/kernel/head.S | 5 ++---
> arch/arm64/kvm/hyp/switch.c | 2 +-
> 3 files changed, 4 insertions(+), 4 deletions(-)
Reviewed-by: Richard Henderson
r~
t; 1 file changed, 7 insertions(+), 7 deletions(-)
Reviewed-by: Richard Henderson
r~
On 12/7/18 12:39 PM, Kristina Martsenko wrote:
> #define SCTLR_ELx_DSSBS (1UL << 44)
> +#define SCTLR_ELx_ENIA (1 << 31)
1U or 1UL lest you produce signed -0x8000.
Otherwise,
Reviewed-by: Richard Henderson
r~
came across them, and asked Richard's permission
> to resurrect and resend the patch, with the changes Ingo asked for at
> the time.
>
> The important information about why we want these patch is in 1/2.
>
> Richard Henderson (2):
> x86: Use named address spaces in a
came across them, and asked Richard's permission
> to resurrect and resend the patch, with the changes Ingo asked for at
> the time.
>
> The important information about why we want these patch is in 1/2.
>
> Richard Henderson (2):
> x86: Use named address spaces in a
On 02/23/2018 10:19 AM, Al Viro wrote:
> For m68k,
> IIRC, qemu is mostly for coldfire and friends with aranym
> working for m68k/MMU testing.
Laurent Vivier is in the process of fixing that upstream, it won't all make
qemu 2.12. He has a branch with full support for a Mac Quadra 800:
On 02/23/2018 10:19 AM, Al Viro wrote:
> For m68k,
> IIRC, qemu is mostly for coldfire and friends with aranym
> working for m68k/MMU testing.
Laurent Vivier is in the process of fixing that upstream, it won't all make
qemu 2.12. He has a branch with full support for a Mac Quadra 800:
to be able to depend upon it.
v2: Added FPE_FIXME for alpha as Helge Deller<del...@gmx.de> pointed out
with his alternate patch one of the cases is SIGFPE not SIGTRAP.
Cc: Helge Deller<del...@gmx.de>
Cc: Richard Henderson<r...@twiddle.net>
Cc: Ivan Kokshaysky<i...@jurassic.
to be able to depend upon it.
v2: Added FPE_FIXME for alpha as Helge Deller pointed out
with his alternate patch one of the cases is SIGFPE not SIGTRAP.
Cc: Helge Deller
Cc: Richard Henderson
Cc: Ivan Kokshaysky
Cc: Matt Turner
Cc:linux-al...@vger.kernel.org
History Tree:https://git.kernel.org
On 06/24/2017 08:32 AM, Logan Gunthorpe wrote:
So, IMO, the Jensen inq and outq funtions in your patch, which I did
read, should probably just not be provided.
So you would prefer a function containing BUG?
Because I have to have *something* to put into the machvec function pointer.
r~
On 06/24/2017 08:32 AM, Logan Gunthorpe wrote:
So, IMO, the Jensen inq and outq funtions in your patch, which I did
read, should probably just not be provided.
So you would prefer a function containing BUG?
Because I have to have *something* to put into the machvec function pointer.
r~
On 06/24/2017 08:19 AM, Logan Gunthorpe wrote:
Hey,
On 24/06/17 09:13 AM, Richard Henderson wrote:
All Alpha hosts except for Jensen provide 64-bit I/O operations.
Jensen is EISA only, so there ought not be any devices that even
attempt such operations. But just in case, use 2 32-bit
On 06/24/2017 08:19 AM, Logan Gunthorpe wrote:
Hey,
On 24/06/17 09:13 AM, Richard Henderson wrote:
All Alpha hosts except for Jensen provide 64-bit I/O operations.
Jensen is EISA only, so there ought not be any devices that even
attempt such operations. But just in case, use 2 32-bit
su.ru>
Cc: Matt Turner <matts...@gmail.com>
Signed-off-by: Richard Henderson <r...@twiddle.net>
---
arch/alpha/include/asm/core_apecs.h | 16
arch/alpha/include/asm/core_cia.h| 16
arch/alpha/include/asm/core_lca.h| 16
All Alpha hosts except for Jensen provide 64-bit I/O operations.
Jensen is EISA only, so there ought not be any devices that even
attempt such operations. But just in case, use 2 32-bit operations.
Cc: Logan Gunthorpe
Cc: Ivan Kokshaysky
Cc: Matt Turner
Signed-off-by: Richard Henderson
ree<mc...@orcon.net.nz>
---
arch/alpha/kernel/module.c | 3 +++
1 file changed, 3 insertions(+)
Reviewed-by: Richard Henderson <r...@twiddle.net>
r~
| 3 +++
1 file changed, 3 insertions(+)
Reviewed-by: Richard Henderson
r~
1 +
Acked-by: Richard Henderson <r...@twiddle.net>
r~
that
an aarch64 defconfig still build setup-irq.o with the patch applied.
The intention is that this patch doesn't change the behavior of any
build.
Signed-off-by: Palmer Dabbelt
Reviewed-by: James Hogan
---
arch/alpha/Kconfig | 1 +
Acked-by: Richard Henderson
r~
Signed-off-by: Richard Henderson <r...@twiddle.net>
---
arch/alpha/include/asm/unistd.h | 2 +-
arch/alpha/include/uapi/asm/unistd.h | 14 ++
arch/alpha/kernel/systbls.S | 9 +
3 files changed, 24 insertions(+), 1 deletion(-)
diff --git a/arch/alpha/i
Signed-off-by: Richard Henderson
---
arch/alpha/include/asm/unistd.h | 2 +-
arch/alpha/include/uapi/asm/unistd.h | 14 ++
arch/alpha/kernel/systbls.S | 9 +
3 files changed, 24 insertions(+), 1 deletion(-)
diff --git a/arch/alpha/include/asm/unistd.h b/arch
(1) Wire up the new syscalls.
(2) Fix a build error causing ld to report out-of-range branches.
(3) Fix a build error for the EV6 assembler.
Suggestions on a better way to implement the second patch within
the Kbuild infrastructure are welcomed.
r~
Richard Henderson (3):
alpha: Update
There are direct branches between {str*cpy,str*cat} and stx*cpy.
Ensure the branches are within range by merging these objects.
Signed-off-by: Richard Henderson <r...@twiddle.net>
---
arch/alpha/lib/Makefile | 22 --
1 file changed, 16 insertions(+), 6 deletions(-)
There are direct branches between {str*cpy,str*cat} and stx*cpy.
Ensure the branches are within range by merging these objects.
Signed-off-by: Richard Henderson
---
arch/alpha/lib/Makefile | 22 --
1 file changed, 16 insertions(+), 6 deletions(-)
diff --git a/arch/alpha/lib
(1) Wire up the new syscalls.
(2) Fix a build error causing ld to report out-of-range branches.
(3) Fix a build error for the EV6 assembler.
Suggestions on a better way to implement the second patch within
the Kbuild infrastructure are welcomed.
r~
Richard Henderson (3):
alpha: Update
Patch 8525023121de4848b5f0a7d867ffeadbc44d introduced a typo.
That said, the identity AND insns added by that patch are more
clearly written as MOV. At the same time, re-schedule the ev6
version so that the first dispatch can execute in parallel.
Signed-off-by: Richard Henderson &l
Patch 8525023121de4848b5f0a7d867ffeadbc44d introduced a typo.
That said, the identity AND insns added by that patch are more
clearly written as MOV. At the same time, re-schedule the ev6
version so that the first dispatch can execute in parallel.
Signed-off-by: Richard Henderson
---
arch
On 06/22/2017 09:48 AM, Logan Gunthorpe wrote:
Alpha implements its own io operation and doesn't use the
common library. Thus to make ioread64 and iowrite64 globally
available we need to add implementations for alpha.
For this, we simply use calls that chain two 32-bit operations.
(mostly
On 06/22/2017 09:48 AM, Logan Gunthorpe wrote:
Alpha implements its own io operation and doesn't use the
common library. Thus to make ioread64 and iowrite64 globally
available we need to add implementations for alpha.
For this, we simply use calls that chain two 32-bit operations.
(mostly
On 06/01/2017 01:00 PM, Aleksa Sarai wrote:
--- a/arch/alpha/include/uapi/asm/ioctls.h
+++ b/arch/alpha/include/uapi/asm/ioctls.h
@@ -94,6 +94,7 @@
#define TIOCSRS485 _IOWR('T', 0x2F, struct serial_rs485)
#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of
pty-mux
On 06/01/2017 01:00 PM, Aleksa Sarai wrote:
--- a/arch/alpha/include/uapi/asm/ioctls.h
+++ b/arch/alpha/include/uapi/asm/ioctls.h
@@ -94,6 +94,7 @@
#define TIOCSRS485 _IOWR('T', 0x2F, struct serial_rs485)
#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of
pty-mux
On 02/23/2017 01:22 AM, Stafford Horne wrote:
static inline int __atomic_add_unless(atomic_t *v, int a, int u)
{
int old, tmp;
__asm__ __volatile__(
"1: l.lwa %0, 0(%2) \n"
" l.sfeq %0, %4 \n"
"
On 02/23/2017 01:22 AM, Stafford Horne wrote:
static inline int __atomic_add_unless(atomic_t *v, int a, int u)
{
int old, tmp;
__asm__ __volatile__(
"1: l.lwa %0, 0(%2) \n"
" l.sfeq %0, %4 \n"
"
On 02/23/2017 01:20 AM, Stafford Horne wrote:
On Wed, Feb 22, 2017 at 12:19:40PM +0100, Peter Zijlstra wrote:
On Wed, Feb 22, 2017 at 04:11:37AM +0900, Stafford Horne wrote:
+ __asm__ __volatile__(
+ "1:l.lwa %0, 0(%1) \n"
+ " l.sfeq %0, %2
On 02/23/2017 01:20 AM, Stafford Horne wrote:
On Wed, Feb 22, 2017 at 12:19:40PM +0100, Peter Zijlstra wrote:
On Wed, Feb 22, 2017 at 04:11:37AM +0900, Stafford Horne wrote:
+ __asm__ __volatile__(
+ "1:l.lwa %0, 0(%1) \n"
+ " l.sfeq %0, %2
I'm pleased to be able to announce an initial implementation of an (e)bpf
backend for systemtap. For the subset of systemtap probes that can use
kprobes, we can use a bpf filter instead of loading a kernel module.
As this implementation is young, there are a number of limitations. Neither
I'm pleased to be able to announce an initial implementation of an (e)bpf
backend for systemtap. For the subset of systemtap probes that can use
kprobes, we can use a bpf filter instead of loading a kernel module.
As this implementation is young, there are a number of limitations. Neither
On 04/22/2016 02:04 AM, Peter Zijlstra wrote:
> + "1: ldl_l %0,%1\n" \
> + " mov %0,%2\n"\
> + " " #asm_op " %0,%3,%0\n" \
> + " stl_c %0,%1\n"
On 04/22/2016 02:04 AM, Peter Zijlstra wrote:
> + "1: ldl_l %0,%1\n" \
> + " mov %0,%2\n"\
> + " " #asm_op " %0,%3,%0\n" \
> + " stl_c %0,%1\n"
On 03/26/2016 10:43 PM, zhaoxiu.zeng wrote:
From: Zeng Zhaoxiu <zhaoxiu.z...@gmail.com>
Signed-off-by: Zeng Zhaoxiu <zhaoxiu.z...@gmail.com>
---
arch/alpha/include/asm/bitops.h | 27 +++
1 file changed, 27 insertions(+)
Acked-by: Richard Henderson <r
On 03/26/2016 10:43 PM, zhaoxiu.zeng wrote:
From: Zeng Zhaoxiu
Signed-off-by: Zeng Zhaoxiu
---
arch/alpha/include/asm/bitops.h | 27 +++
1 file changed, 27 insertions(+)
Acked-by: Richard Henderson
r~
__uv_hub_info
...
+ movzbl 0x15(%rax,%r9,1),%ecx
...
+ or (%rax,%r9,1),%rdx
The final vmlinux text size is reduced by about 5k for a standard
Fedora configure.
Cc: Ingo Molnar
Cc: "H. Peter Anvin"
Signed-off-by: Richard Henderson
---
arch/x86/include/asm/perc
__uv_hub_info
...
+ movzbl 0x15(%rax,%r9,1),%ecx
...
+ or (%rax,%r9,1),%rdx
The final vmlinux text size is reduced by about 5k for a standard
Fedora configure.
Cc: Ingo Molnar <mi...@redhat.com>
Cc: "H. Peter Anvin" <h...@zytor.com>
Signed-off-by: Richard Hende
On 11/30/2015 01:29 PM, Rasmus Villemoes wrote:
./arch/alpha/boot/main.c:187:1-4: no-op delay loop
Not sure why this is there. The runkernel function that preceeds it cannot
return, having performed an indirect branch (not a call) to the kernel start.
I see no reason to actually change
On 11/30/2015 01:29 PM, Rasmus Villemoes wrote:
./arch/alpha/boot/main.c:187:1-4: no-op delay loop
Not sure why this is there. The runkernel function that preceeds it cannot
return, having performed an indirect branch (not a call) to the kernel start.
I see no reason to actually change
the other maintainers.
Ping again for the other-architecture maintainers (alpha, s390, sh,
sparc)
I thought I already gave an
Acked-by: Richard Henderson
for the alpha patches.
r~
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message
the other maintainers.
Ping again for the other-architecture maintainers (alpha, s390, sh,
sparc)
I thought I already gave an
Acked-by: Richard Henderson r...@twiddle.net
for the alpha patches.
r~
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message
On 05/04/2015 01:45 PM, Linus Torvalds wrote:
> On Mon, May 4, 2015 at 1:33 PM, Richard Henderson wrote:
>>
>> A fair point. Though honestly, I was hoping that this feature would mostly
>> be
>> used for conditions that are "weird" -- that is, not normall
On 05/04/2015 01:14 PM, H. Peter Anvin wrote:
> On 05/04/2015 12:33 PM, Richard Henderson wrote:
>>
>> (0) The C level output variable should be an integral type, from bool on up.
>>
>> The flags are a scarse resource, easily clobbered. We cannot allow user code
&
On 05/02/2015 05:39 AM, Peter Zijlstra wrote:
> static inline bool __test_and_clear_bit(long nr, volatile unsigned long *addr)
> {
> bool oldbit;
>
> asm volatile ("btr %2, %1"
> : "CF" (oldbit), "+m" (*addr)
> : "Ir" (nr));
>
> return
On 05/02/2015 05:39 AM, Peter Zijlstra wrote:
> On Fri, May 01, 2015 at 01:49:52PM -0700, Linus Torvalds wrote:
>> On Fri, May 1, 2015 at 12:02 PM, Vladimir Makarov
>> wrote:
>>>
>>> GCC RA is a major reason to prohibit output operands for asm goto.
>>
>> Hmm.. Thinking some more about it, I
On 05/02/2015 05:39 AM, Peter Zijlstra wrote:
On Fri, May 01, 2015 at 01:49:52PM -0700, Linus Torvalds wrote:
On Fri, May 1, 2015 at 12:02 PM, Vladimir Makarov vmaka...@redhat.com
wrote:
GCC RA is a major reason to prohibit output operands for asm goto.
Hmm.. Thinking some more about it,
On 05/02/2015 05:39 AM, Peter Zijlstra wrote:
static inline bool __test_and_clear_bit(long nr, volatile unsigned long *addr)
{
bool oldbit;
asm volatile (btr %2, %1
: CF (oldbit), +m (*addr)
: Ir (nr));
return oldbit;
}
Be
On 05/04/2015 01:14 PM, H. Peter Anvin wrote:
On 05/04/2015 12:33 PM, Richard Henderson wrote:
(0) The C level output variable should be an integral type, from bool on up.
The flags are a scarse resource, easily clobbered. We cannot allow user code
to keep data in the flags. While x86 does
On 05/04/2015 01:45 PM, Linus Torvalds wrote:
On Mon, May 4, 2015 at 1:33 PM, Richard Henderson r...@redhat.com wrote:
A fair point. Though honestly, I was hoping that this feature would mostly
be
used for conditions that are weird -- that is, not normally describable by
arithmetic at all
On 02/17/2015 06:24 AM, Michael Mueller wrote:
> +static inline uint64_t big_endian_bit(unsigned long nr)
> +{
> +return 1ul << (BITS_PER_LONG - (nr % BITS_PER_LONG));
> +};
This is buggy. NR=0 should map to 63, not 64.
> +return !!(*ptr & big_endian_bit(nr));
Personally I dislike !!
On 02/17/2015 06:24 AM, Michael Mueller wrote:
> +/**
> + * s390_test_facility - test if given facility bit is set facility list
> + * of given cpu class
> + * @class: address of cpu class to test
> + * @nr: bit number to test
> + *
> + * Returns: true in case it is set
> + *
On 02/17/2015 06:24 AM, Michael Mueller wrote:
+/**
+ * s390_test_facility - test if given facility bit is set facility list
+ * of given cpu class
+ * @class: address of cpu class to test
+ * @nr: bit number to test
+ *
+ * Returns: true in case it is set
+ *
On 02/17/2015 06:24 AM, Michael Mueller wrote:
+static inline uint64_t big_endian_bit(unsigned long nr)
+{
+return 1ul (BITS_PER_LONG - (nr % BITS_PER_LONG));
+};
This is buggy. NR=0 should map to 63, not 64.
+return !!(*ptr big_endian_bit(nr));
Personally I dislike !! as an
On 02/06/2015 06:50 AM, Kirill A. Shutemov wrote:
> We would want to use number of page table level to define mm_struct.
> Let's expose it as CONFIG_PGTABLE_LEVELS.
>
> Signed-off-by: Kirill A. Shutemov
> Cc: Richard Henderson
> Cc: Ivan Kokshaysky
> Cc: Matt Turner
>
On 02/06/2015 06:50 AM, Kirill A. Shutemov wrote:
We would want to use number of page table level to define mm_struct.
Let's expose it as CONFIG_PGTABLE_LEVELS.
Signed-off-by: Kirill A. Shutemov kirill.shute...@linux.intel.com
Cc: Richard Henderson r...@twiddle.net
Cc: Ivan Kokshaysky i
On 07/30/2014 12:04 PM, Måns Rullgård wrote:
> Richard Henderson writes:
>
>> The assignment to regs->r20 kills the original tls_val input
>> to the clone syscall, which means that clone can no longer be
>> restarted with the original inputs.
>>
>> We coul
On 07/30/2014 12:21 PM, Michael Cree wrote:
> On Wed, Jul 30, 2014 at 11:42:32AM -1000, Richard Henderson wrote:
>> Signed-off-by: Richard Henderson
>> ---
>> arch/alpha/include/asm/unistd.h | 2 +-
>> arch/alpha/include/uapi/asm/unistd.h | 3 +++
>> arch/al
Signed-off-by: Richard Henderson
---
arch/alpha/include/asm/unistd.h | 2 +-
arch/alpha/include/uapi/asm/unistd.h | 3 +++
arch/alpha/kernel/systbls.S | 3 +++
3 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/alpha/include/asm/unistd.h b/arch/alpha/include/asm
sed the r20 result value, instead always testing r0 vs 0 to
determine the child/parent status.
This failure can be seen in the glibc nptl/tst-eintr* tests.
Reported-by: Michael Cree
Signed-off-by: Richard Henderson
---
arch/alpha/kernel/process.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/a
The first patch should fix the clone bug that Michael Cree reported.
The second patch adds the three new syscalls since the last update.
The tree can be found at
git://github.com/rth7680/linux.git axp-next
r~
Richard Henderson (2):
alpha: Remove "strange" OSF/1 fork semanti
Ok, I think I've actually found it this time. It's here:
> 281 childregs->r20 = 1; /* OSF/1 has some strange fork()
> semantics. */
> 282 regs->r20 = 0;
We need to delay this r20 silliness until after restarts or something. Or just
kill it -- it's not like glibc uses
Ok, I think I've actually found it this time. It's here:
281 childregs-r20 = 1; /* OSF/1 has some strange fork()
semantics. */
282 regs-r20 = 0;
We need to delay this r20 silliness until after restarts or something. Or just
kill it -- it's not like glibc uses this
The first patch should fix the clone bug that Michael Cree reported.
The second patch adds the three new syscalls since the last update.
The tree can be found at
git://github.com/rth7680/linux.git axp-next
r~
Richard Henderson (2):
alpha: Remove strange OSF/1 fork semantics
alpha: Add
the r20 result value, instead always testing r0 vs 0 to
determine the child/parent status.
This failure can be seen in the glibc nptl/tst-eintr* tests.
Reported-by: Michael Cree mc...@orcon.net.nz
Signed-off-by: Richard Henderson r...@twiddle.net
---
arch/alpha/kernel/process.c | 2 --
1 file changed
Signed-off-by: Richard Henderson r...@twiddle.net
---
arch/alpha/include/asm/unistd.h | 2 +-
arch/alpha/include/uapi/asm/unistd.h | 3 +++
arch/alpha/kernel/systbls.S | 3 +++
3 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/alpha/include/asm/unistd.h b/arch/alpha
On 07/30/2014 12:21 PM, Michael Cree wrote:
On Wed, Jul 30, 2014 at 11:42:32AM -1000, Richard Henderson wrote:
Signed-off-by: Richard Henderson r...@twiddle.net
---
arch/alpha/include/asm/unistd.h | 2 +-
arch/alpha/include/uapi/asm/unistd.h | 3 +++
arch/alpha/kernel/systbls.S
On 07/30/2014 12:04 PM, Måns Rullgård wrote:
Richard Henderson r...@twiddle.net writes:
The assignment to regs-r20 kills the original tls_val input
to the clone syscall, which means that clone can no longer be
restarted with the original inputs.
We could, perhaps, retain this result
On 07/22/2014 10:52 PM, Michael Cree wrote:
> Running strace on nptl/tst-eintr3 reveals that the clone() syscall
> is retried by the kernel if an ERESTARTNOINTR error occurs. At
> $syscall_error in arch/alpha/kernel/entry.S the kernel handles the
> error and in doing that it writes to 72(sp)
On 07/22/2014 10:52 PM, Michael Cree wrote:
Running strace on nptl/tst-eintr3 reveals that the clone() syscall
is retried by the kernel if an ERESTARTNOINTR error occurs. At
$syscall_error in arch/alpha/kernel/entry.S the kernel handles the
error and in doing that it writes to 72(sp) which is
On 07/15/2014 06:54 AM, Peter Hurley wrote:
>
> Jonathan Corbet wrote a LWN article about this back in 2012:
> http://lwn.net/Articles/478657/
>
> I guess it's fixed in gcc 4.8, but too bad there's not a workaround for
> earlier compilers (akin to -fstrict_volatile_bitfields without requiring
>
On 07/15/2014 06:54 AM, Peter Hurley wrote:
Jonathan Corbet wrote a LWN article about this back in 2012:
http://lwn.net/Articles/478657/
I guess it's fixed in gcc 4.8, but too bad there's not a workaround for
earlier compilers (akin to -fstrict_volatile_bitfields without requiring
the
On 07/03/2014 10:21 AM, Nick Krause wrote:
> There seems to be a Fix Me message on line 892 due to info.si_addr = NULL.
> I am wondering what value I should declare this variable to instead of Null.
> Cheers Nick
>
The closest thing to compatibility with SIGFPE raised through normal arithmetic
On 07/03/2014 10:21 AM, Nick Krause wrote:
There seems to be a Fix Me message on line 892 due to info.si_addr = NULL.
I am wondering what value I should declare this variable to instead of Null.
Cheers Nick
The closest thing to compatibility with SIGFPE raised through normal arithmetic
would
n the same vein as
> the relaxed read macros, which are already implemented.
>
> Cc: Richard Henderson
> Cc: Ivan Kokshaysky
> Cc: Matt Turner
> Signed-off-by: Will Deacon
> ---
> arch/alpha/include/asm/io.h | 12
> 1 file changed, 8 insertions(+), 4 dele
as
the relaxed read macros, which are already implemented.
Cc: Richard Henderson r...@twiddle.net
Cc: Ivan Kokshaysky i...@jurassic.park.msu.ru
Cc: Matt Turner matts...@gmail.com
Signed-off-by: Will Deacon will.dea...@arm.com
---
arch/alpha/include/asm/io.h | 12
1 file changed, 8
s Gleixner
> Cc: Andy Lutomirski
> Cc: Richard Henderson
> Signed-off-by: Peter Zijlstra
> ---
> arch/alpha/include/asm/thread_info.h | 4 ++--
> 1 file changed, 2 inser
Acked-by: Richard Henderson
r~
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Lutomirski l...@amacapital.net
Cc: Richard Henderson r...@twiddle.net
Signed-off-by: Peter Zijlstra pet...@infradead.org
---
arch/alpha/include/asm/thread_info.h |4 ++--
1 file changed, 2 inser
Acked-by: Richard Henderson r...@twiddle.net
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es not change the init order, making the
> impact of this change zero. Should someone with real hardware
> for boot testing want to change it later to arch_initcall or
> console_initcall, they can do that at a later date.
>
> Cc: Richard Henderson
> Cc: Ivan Kokshaysky
> Cc: Ma
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