On Sun, Aug 27, 2017 at 3:30 PM, Linus Walleij wrote:
> On Fri, Aug 25, 2017 at 6:52 PM, Rick Altherr wrote:
>
>>> Incidentally, people are sending patches to expose the FTDI
>>> expanders as common GPIO chips under Linux, so we can
>>> internally in the kerne
On Fri, Aug 25, 2017 at 1:50 AM, Stuart Longland
wrote:
> [Note: dropping vad...@maellanox.com as SMTP server complained about the
> DNS server returning NXDOMAIN. Apologies.]
> On 25/08/17 18:32, Linus Walleij wrote:
>> Gnah!
>> Whoever writes a slot-in replacement making the character device
>>
On Fri, Aug 25, 2017 at 1:32 AM, Linus Walleij wrote:
> On Thu, Aug 24, 2017 at 11:37 PM, Rick Altherr wrote:
>> On Thu, Aug 24, 2017 at 2:07 PM, Linus Walleij
>> wrote:
>>> On Tue, Aug 22, 2017 at 6:10 PM, Oleksandr Shamray
>>> wrote:
>>>
>&g
On Thu, Aug 24, 2017 at 2:07 PM, Linus Walleij wrote:
> On Tue, Aug 22, 2017 at 6:10 PM, Oleksandr Shamray
> wrote:
>
>> SoC which are not equipped with JTAG master interface, can be built
>> on top of JTAG core driver infrastructure, by applying bit-banging of
>> TDI, TDO, TCK and TMS pins withi
Is clk_fractional_divider from include/linux/clk-provider.h appropriate here?
On Fri, Jul 28, 2017 at 1:57 PM, Rick Altherr wrote:
> Is clk_fractional_divider from include/linux/clk-provider.h appropriate
> here?
>
> On Fri, Jul 28, 2017 at 1:45 PM, Brendan Higgins
> wrote:
>&
Reviewed-by: Rick Altherr
On Sat, Jun 3, 2017 at 1:50 AM, Jonathan Cameron wrote:
> On Mon, 29 May 2017 13:12:12 +0530
> Arvind Yadav wrote:
>
>> clk_prepare_enable() can fail here and we must check its return value.
>>
>> Signed-off-by: Arvind Yadav
> Please mak
When a hw_random device's quality is non-zero, it will automatically be
used to fill the kernel's entropy pool. Since timeriomem_rng is used by
many different devices, the quality needs to be provided by platform
data or device tree.
Signed-off-by: Rick Altherr
---
Changes in v2
Signed-off-by: Rick Altherr
---
Changes in v2: None
Documentation/devicetree/bindings/rng/timeriomem_rng.txt | 7 +++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/rng/timeriomem_rng.txt
b/Documentation/devicetree/bindings/rng/timeriomem_rng.txt
index
Signed-off-by: Rick Altherr
---
Documentation/devicetree/bindings/rng/timeriomem_rng.txt | 7 +++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/rng/timeriomem_rng.txt
b/Documentation/devicetree/bindings/rng/timeriomem_rng.txt
index 6616d15866a3
When a hw_random device's quality is non-zero, it will automatically be
used to fill the kernel's entropy pool. Since timeriomem_rng is used by
many different devices, the quality needs to be provided by platform
data or device tree.
Signed-off-by: Rick Altherr
---
drivers/char
On Wed, Apr 5, 2017 at 6:10 PM, Stephen Boyd wrote:
> On 04/05, Rick Altherr wrote:
>> On Wed, Apr 5, 2017 at 1:27 PM, Stephen Boyd wrote:
>> > On 03/23, Rick Altherr wrote:
>> >> +
>> >> +static int aspeed_adc_probe(struct platform_device *pdev)
>
On Wed, Apr 5, 2017 at 1:27 PM, Stephen Boyd wrote:
> On 03/23, Rick Altherr wrote:
>> +
>> +static int aspeed_adc_probe(struct platform_device *pdev)
>> +{
>> + struct iio_dev *indio_dev;
>> + struct aspeed_adc_data *data;
>> + const s
Preserves the existing behavior of only returning 32-bits per call.
Signed-off-by: Rick Altherr
---
Changes in v2:
- Split API migration into separate patch
drivers/char/hw_random/timeriomem-rng.c | 60 -
1 file changed, 30 insertions(+), 30 deletions(-)
diff
No functional changes.
Signed-off-by: Rick Altherr
---
Changes in v2:
- Split type and variable renames into separate patch
drivers/char/hw_random/timeriomem-rng.c | 27 +--
1 file changed, 13 insertions(+), 14 deletions(-)
diff --git a/drivers/char/hw_random
migration into separate patch
- Split type and variable renames into separate patch
- Split performance improvements into separate patch
Rick Altherr (3):
hw_random: Migrate timeriomem_rng to new API
hw_random: timeriomem_rng: Shorten verbose type and variable names
hw_random: timeriomem_rng: Improve
: Rick Altherr
---
Changes in v2:
- Split performance improvements into separate patch
drivers/char/hw_random/timeriomem-rng.c | 86 +
1 file changed, 45 insertions(+), 41 deletions(-)
diff --git a/drivers/char/hw_random/timeriomem-rng.c
b/drivers/char/hw_random
new hw_random API while I in this driver.
Signed-off-by: Rick Altherr
---
drivers/char/hw_random/timeriomem-rng.c | 153
1 file changed, 75 insertions(+), 78 deletions(-)
diff --git a/drivers/char/hw_random/timeriomem-rng.c
b/drivers/char/hw_random/timeriomem
Aspeed BMC SoCs include a 16 channel, 10-bit ADC. Low and high threshold
interrupts are supported by the hardware but are not currently implemented.
Signed-off-by: Rick Altherr
---
Changes in v5:
- Return EINVAL for unimplemented read/write channel infos.
- Return EPERM for write attempts to
Signed-off-by: Rick Altherr
---
Changes in v5: None
Changes in v4: None
Changes in v3:
- Consistently write hex contstants with lowercase letters
- Drop model numbers from description as same IP is used in every generation
Changes in v2:
- Rewritten as an IIO ADC device
.../devicetree
On Sat, Mar 25, 2017 at 10:32 AM, Jonathan Cameron wrote:
> On 23/03/17 18:41, Rick Altherr wrote:
>> Aspeed BMC SoCs include a 16 channel, 10-bit ADC. Low and high threshold
>> interrupts are supported by the hardware but are not currently implemented.
>>
>> Signed-o
Aspeed BMC SoCs include a 16 channel, 10-bit ADC. Low and high threshold
interrupts are supported by the hardware but are not currently implemented.
Signed-off-by: Rick Altherr
---
Changes in v4:
- Avoid copying per-model data to per-instance data
Changes in v3:
- Drop model numbers from
Signed-off-by: Rick Altherr
---
Changes in v4: None
Changes in v3:
- Consistently write hex contstants with lowercase letters
- Drop model numbers from description as same IP is used in every generation
Changes in v2:
- Rewritten as an IIO ADC device
.../devicetree/bindings/iio/adc
On Thu, Mar 23, 2017 at 12:52 AM, Quentin Schulz
wrote:
> Hi,
>
> On 22/03/2017 21:46, Rick Altherr wrote:
>> On Wed, Mar 22, 2017 at 12:21 AM, Quentin Schulz
>> wrote:
>>> Hi,
>>>
>>> On 21/03/2017 21:48, Rick Altherr wrote:
>>>> Aspe
Restoring the list after an accidental direct reply.
On Wed, Mar 22, 2017 at 2:32 PM, Rick Altherr wrote:
> On Wed, Mar 22, 2017 at 2:47 AM, Joel Stanley wrote:
>> On Wed, Mar 22, 2017 at 7:18 AM, Rick Altherr wrote:
>>> Aspeed AST2400/AST2500 BMC SoCs include a 16 channe
Restoring the list after an accidental direct reply.
On Wed, Mar 22, 2017 at 1:30 PM, Rick Altherr wrote:
> On Tue, Mar 21, 2017 at 2:14 PM, Peter Meerwald-Stadler
> wrote:
>>
>>> Aspeed AST2400/AST2500 BMC SoCs include a 16 channel, 10-bit ADC. Low
>>> and
Signed-off-by: Rick Altherr
---
Changes in v3:
- Consistently write hex contstants with lowercase letters
- Drop model numbers from description as same IP is used in every generation
Changes in v2:
- Rewritten as an IIO ADC device
.../devicetree/bindings/iio/adc/aspeed_adc.txt | 20
Aspeed BMC SoCs include a 16 channel, 10-bit ADC. Low and high threshold
interrupts are supported by the hardware but are not currently implemented.
Signed-off-by: Rick Altherr
---
Changes in v3:
- Drop model numbers from description as same IP is used in every generation
- Remove unused macros
Aspeed AST2400/AST2500 BMC SoCs include a 16 channel, 10-bit ADC. Low
and high threshold interrupts are supported by the hardware but are not
currently implemented.
Signed-off-by: Rick Altherr
---
Changes in v2:
- Rewritten as an IIO device
- Renamed register macros to describe the register
Signed-off-by: Rick Altherr
---
Changes in v2:
- Rewritten as an IIO ADC device
.../devicetree/bindings/iio/adc/aspeed_adc.txt | 20
1 file changed, 20 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iio/adc/aspeed_adc.txt
diff --git a
On Sun, Mar 5, 2017 at 8:28 AM, Guenter Roeck wrote:
> On 03/01/2017 07:29 PM, Rick Altherr wrote:
>>
>> Resending in plain text.
>>
>> On Tue, Feb 28, 2017 at 7:45 PM, Guenter Roeck wrote:
>>>
>>> On 02/28/2017 04:49 PM, Joel Stanley wrote:
>&g
On Thu, Mar 2, 2017 at 10:21 PM, Rob Herring wrote:
> On Tue, Feb 28, 2017 at 12:14:03PM -0800, Rick Altherr wrote:
>> Signed-off-by: Rick Altherr
>> ---
>> .../devicetree/bindings/hwmon/aspeed_adc.txt | 48
>> ++
>
> ADCs should
Resending in plain text.
On Tue, Feb 28, 2017 at 7:45 PM, Guenter Roeck wrote:
> On 02/28/2017 04:49 PM, Joel Stanley wrote:
>>
>> On Wed, Mar 1, 2017 at 6:44 AM, Rick Altherr wrote:
>>>
>>> Aspeed AST2400/AST2500 BMC SoCs include a 16 channel, 10-bit ADC. This
Signed-off-by: Rick Altherr
---
.../devicetree/bindings/hwmon/aspeed_adc.txt | 48 ++
1 file changed, 48 insertions(+)
create mode 100644 Documentation/devicetree/bindings/hwmon/aspeed_adc.txt
diff --git a/Documentation/devicetree/bindings/hwmon/aspeed_adc.txt
b
-off-by: Rick Altherr
---
drivers/hwmon/Kconfig | 10 ++
drivers/hwmon/Makefile | 1 +
drivers/hwmon/aspeed_adc.c | 383 +
3 files changed, 394 insertions(+)
create mode 100644 drivers/hwmon/aspeed_adc.c
diff --git a/drivers/hwmon/Kconfig b
reason and they should
be treated as read-only. Only the two bits of the strap register related
to these loopback modes are allowed to be written and comments have been
added to explain why.
Signed-off-by: Rick Altherr
---
drivers/pinctrl/aspeed/pinctrl-aspeed.c | 14 --
1 file changed
reason and they should
be treated as read-only. Only the two bits of the strap register related
to these loopback modes are allowed to be written and comments have been
added to explain why.
Signed-off-by: Rick Altherr
---
drivers/pinctrl/aspeed/pinctrl-aspeed.c | 14 --
1 file changed
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