Add maintainers entry for the Qualcomm QCA807x PHY driver.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 667d03852191..48f32ef108d5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -14775,6
IPQ40xx, IPQ60xx and IPQ807x
boards.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
Changes in v2:
* Drop LED related code
* Fix ordering in KConfig and Makefile
* Add SFP module validation upon instert
* Rework IRQ code
* Convert values for PSGMII/QSGMII SerDes driver
into register values
Add DT bindings for Qualcomm QCA807x PHYs.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
Changes in v2:
* Drop LED properties
* Directly define PSGMII/QSGMII SerDes driver values
.../devicetree/bindings/net/qcom,qca807x.yaml | 70 +++
1 file changed, 70 insertions(+)
create
Add DT bindings for Qualcomm QCA807x PHY series.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
Changes in v2:
* Drop PSGMII/QSGMII TX driver defines
include/dt-bindings/net/qcom-qca807x.h | 30 ++
1 file changed, 30 insertions(+)
create mode 100644 include/dt
to driver generic LED-s controlled by
user space, so lets enable registering each PHY as GPIO controller and
add driver for it.
Robert Marko (4):
dt-bindings: net: Add QCA807x PHY
dt-bindings: net: Add bindings for Qualcomm QCA807x
net: phy: Add Qualcomm QCA807x driver
MAINTAINERS: Add
On Mon, Jan 25, 2021 at 5:50 PM Bjorn Andersson
wrote:
>
> On Mon 07 Sep 05:19 CDT 2020, Robert Marko wrote:
>
> > Since we now have driver for the SDHCI VQMMC LDO needed
> > for I/0 voltage levels lets introduce the necessary node for it.
> >
> > Signed-off-by:
On Fri, Jan 22, 2021 at 7:56 PM Bjorn Andersson
wrote:
>
> On Fri 02 Oct 12:41 CDT 2020, Robert Marko wrote:
>
> > On Wed, Sep 9, 2020 at 9:56 PM Robert Marko wrote:
> > >
> > > 8devices Habanero DVK is a dual-band SoM development kit based on Qualcomm
Add basic monitoring support as well as port on/off control for Texas
Instruments TPS23861 PoE PSE IC.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
Changes in v4:
* Add documentation
* Correct of_property_read_u32() return check
* Drop useless and incorrect debugfs return check
Changes in
Add maintainers entry for the Texas Instruments TPS23861 PoE PSE driver.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
Changes in v4:
* Add documentation file
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index f95e887e5d76..2a7f22587774
Document bindings for the Texas Instruments TPS23861 driver.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
Changes in v5:
* Drop uint32 reference
Changes in v4:
* Correct shunt binding
.../bindings/hwmon/ti,tps23861.yaml | 51 +++
1 file changed, 51 insertions
Add maintainers entry for the Texas Instruments TPS23861 PoE PSE driver.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
Changes in v4:
* Add documentation file
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 1feabab03fb2..527db97c42ec
Add basic monitoring support as well as port on/off control for Texas
Instruments TPS23861 PoE PSE IC.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
Changes in v4:
* Add documentation
* Correct of_property_read_u32() return check
* Drop useless and incorrect debugfs return check
Changes in
Document bindings for the Texas Instruments TPS23861 driver.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
Changes in v4:
* Correct shunt binding
.../bindings/hwmon/ti,tps23861.yaml | 52 +++
1 file changed, 52 insertions(+)
create mode 100644 Documentation
On Sun, Jan 3, 2021 at 6:00 PM Andrew Lunn wrote:
>
> > > > + qcom,tx-driver-strength:
> > > > +description: PSGMII/QSGMII TX driver strength control.
> > > > +$ref: /schemas/types.yaml#/definitions/uint32
> > > > +enum: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12]
> > >
> > > Please us
On Wed, Dec 23, 2020 at 1:56 AM Andrew Lunn wrote:
>
> > + gpio-controller: true
> > + "#gpio-cells":
> > +const: 2
> > +
> > + qcom,single-led-1000:
> > +description: |
> > + If present, then dedicated 1000 Mbit will light up for 1000Base-T.
> > + This is a workround for boar
Add maintainers entry for the Qualcomm QCA807x PHY driver.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 281de213ef47..a86731f86292 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -14546,6
IPQ40xx, IPQ60xx and IPQ807x
boards.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
drivers/net/phy/Kconfig | 10 +
drivers/net/phy/Makefile | 1 +
drivers/net/phy/qca807x.c | 811 ++
3 files changed, 822 insertions(+)
create mode 100644 drivers/net/phy
Add DT bindings for Qualcomm QCA807x PHYs.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
.../devicetree/bindings/net/qcom,qca807x.yaml | 88 +++
1 file changed, 88 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/qcom,qca807x.yaml
diff --git a
Add DT bindings for Qualcomm QCA807x PHY series.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
include/dt-bindings/net/qcom-qca807x.h | 45 ++
1 file changed, 45 insertions(+)
create mode 100644 include/dt-bindings/net/qcom-qca807x.h
diff --git a/include/dt-bindings
to driver generic LED-s controlled by
user space, so lets enable registering each PHY as GPIO controller and
add driver for it.
Robert Marko (4):
dt-bindings: net: Add QCA807x PHY
dt-bindings: net: Add bindings for Qualcomm QCA807x
net: phy: Add Qualcomm QCA807x driver
MAINTAINERS: Add
On Mon, Dec 21, 2020 at 5:26 PM Guenter Roeck wrote:
>
> On 12/19/20 11:11 AM, Robert Marko wrote:
> > Add basic monitoring support as well as port on/off control for Texas
> > Instruments TPS23861 PoE PSE IC.
> >
> > Signed-off-by: Robert Marko
> > Cc: Lu
Add maintainers entry for the Texas Instruments TPS23861 PoE PSE driver.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 830244166a7c..5441be7a5c26 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
Document bindings for the Texas Instruments TPS23861 driver.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
.../bindings/hwmon/ti,tps23861.yaml | 53 +++
1 file changed, 53 insertions(+)
create mode 100644 Documentation/devicetree/bindings/hwmon/ti,tps23861.yaml
Add basic monitoring support as well as port on/off control for Texas
Instruments TPS23861 PoE PSE IC.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
Changes in v3:
* Leave only standard values in hwmon hwmon
* Drop custom sysfs entries
* Use debugfs to provide non standard debug information
On Fri, Dec 18, 2020 at 3:50 PM Guenter Roeck wrote:
>
> On 12/18/20 5:03 AM, Robert Marko wrote:
> > Add basic monitoring support as well as port on/off control for Texas
> > Instruments TPS23861 PoE PSE IC.
> >
> > Signed-off-by: Robert Marko
> > Cc: Luk
Add maintainers entry for the Texas Instruments TPS23861 PoE PSE driver.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 830244166a7c..5441be7a5c26 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
Add basic monitoring support as well as port on/off control for Texas
Instruments TPS23861 PoE PSE IC.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
Changes in v2:
* Convert to devm_hwmon_device_register_with_info()
* Change license
drivers/hwmon/Kconfig| 11 +
drivers/hwmon/Makefile
Document bindings for the Texas Instruments TPS23861 driver.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
.../bindings/hwmon/ti,tps23861.yaml | 53 +++
1 file changed, 53 insertions(+)
create mode 100644 Documentation/devicetree/bindings/hwmon/ti,tps23861.yaml
Add maintainers entry for the Texas Instruments TPS23861 PoE PSE driver.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 830244166a7c..5441be7a5c26 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
Document bindings for the Texas Instruments TPS23861 driver.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
.../bindings/hwmon/ti,tps23861.yaml | 53 +++
1 file changed, 53 insertions(+)
create mode 100644 Documentation/devicetree/bindings/hwmon/ti,tps23861.yaml
Add basic monitoring support as well as port on/off control for Texas
Instruments TPS23861 PoE PSE IC.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
drivers/hwmon/Kconfig| 11 ++
drivers/hwmon/Makefile | 1 +
drivers/hwmon/tps23861.c | 398 +++
3
On Mon, Nov 2, 2020 at 6:19 AM Kathiravan T wrote:
>
>
> On 11/2/2020 10:33 AM, Guenter Roeck wrote:
> > On 11/1/20 7:58 PM, Kathiravan T wrote:
> >> On 10/31/2020 7:38 PM, Guenter Roeck wrote:
> >>> On 10/31/20 5:11 AM, Robert Marko wrote:
> >>&
On Wed, Sep 9, 2020 at 6:38 PM Robert Marko wrote:
>
> From: John Crispin
>
> Since we now have driver for the USB PHY, and USB controller is already
> supported by the DWC3 driver lets add the necessary nodes to DTSI.
>
> Signed-off-by: John Crispin
> Signed-off-by:
On Fri, Oct 30, 2020 at 6:21 AM wrote:
>
> On 2020-10-28 17:16, Robert Marko wrote:
> > If the watchdog hardware is enabled/running during boot, e.g.
> > due to a boot loader configuring it, we must tell the
> > watchdog framework about this fact so that it can pin
exactly
that use-case.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
Changes in v4:
* Use QCOM_WDT_ENABLE macro
Changes in v3:
* Drop call to stop as start already does it
* Update commit message
Changes in v2:
* Correct authorship
drivers/watchdog/qcom-wdt.c | 18 ++
1 file
exactly
that use-case.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
Changes in v3:
* Drop call to stop as start already does it
* Update commit message
Changes in v2:
* Correct authorship
drivers/watchdog/qcom-wdt.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a
From: Robert Marko
If the watchdog hardware is enabled/running during boot, e.g.
due to a boot loader configuring it, we must tell the
watchdog framework about this fact so that it can ping the
watchdog until userspace opens the device and takes over
control.
Do so using the WDOG_HW_RUNNING
exactly
that use-case.
Given the watchdog driver core doesn't know what timeout was
originally set by whoever started the watchdog (boot loader),
we make sure to update the timeout in the hardware according
to what the watchdog core thinks it is.
Signed-off-by: Robert Marko
Cc: Luka P
Add maintainers entry for the Qualcomm IPQ4019 USB PHY driver.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 867157311dc8..bc05bea8dda0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
Add maintainers entry for the Qualcomm IPQ4019 VQMMC regulator driver.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index bc05bea8dda0..064908d7b39c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
On Wed, Sep 9, 2020 at 9:56 PM Robert Marko wrote:
>
> 8devices Habanero DVK is a dual-band SoM development kit based on Qualcomm
> IPQ4019 + QCA8075 platform.
>
> Specs are:
> CPU: QCA IPQ4019
> RAM: DDR3L 512MB
> Storage: 32MB SPI-NOR and optional Parallel SLC NAND(
On Wed, Sep 9, 2020 at 9:56 PM Robert Marko wrote:
>
> 8devices Jalapeno is a dual-band SoM, based on Qualcomm
> IPQ4018 + QCA8072 platform.
>
> Specification:
> QCA IPQ4018, Quad core ARM v7 Cortex A7 717MHz
> 256 MB of DDR3 RAM
> 8 MB of SPI NOR flash
> 128 MB of Win
On Wed, Sep 9, 2020 at 9:56 PM Robert Marko wrote:
>
> ALFA Network AP120C-AC is a dual-band ceiling AP, based on Qualcomm
> IPQ4018 + QCA8075 platform.
>
> Specification:
>
> - Qualcomm IPQ4018 (717 MHz)
> - 256 MB of RAM (DDR3)
> - 16 MB (SPI NOR) + 128 or 512 MB (SPI
On Wed, Sep 9, 2020 at 9:56 PM Robert Marko wrote:
>
> Lets add labels to more commonly used nodes for easier modification in board
> DTS files.
>
> Signed-off-by: Robert Marko
> Cc: Luka Perkov
> ---
> Changes since v1:
> * Drop include that does not exist
>
>
On Wed, Sep 9, 2020 at 6:38 PM Robert Marko wrote:
>
> From: John Crispin
>
> Since we now have driver for the USB PHY, and USB controller is already
> supported by the DWC3 driver lets add the necessary nodes to DTSI.
>
> Signed-off-by: John Crispin
> Signed-off-by:
On Mon, Sep 7, 2020 at 12:19 PM Robert Marko wrote:
>
> Since we now have driver for the SDHCI VQMMC LDO needed
> for I/0 voltage levels lets introduce the necessary node for it.
>
> Signed-off-by: Robert Marko
> Cc: Luka Perkov
> ---
> arch/arm/boot/dts/qcom-ipq4019.d
On Fri, Sep 25, 2020 at 1:27 PM Vignesh Raghavendra wrote:
>
> Hi,
>
> On 9/15/20 3:36 PM, Robert Marko wrote:
> > According to the mx25l12805d datasheet it supports using 4K or 64K sectors.
> > So lets add the SECT_4K to enable 4K sector usage.
> >
> > Dat
While up-streaming the IPQ4019 driver it was thought that the controller had no
Clause 45 support,
but it actually does and its activated by writing a bit to the mode register.
So lets add it as newer SoC-s use the same controller and Clause 45 compliant
PHY-s.
Signed-off-by: Robert Marko
Cc
In the commit adding the IPQ4019 MDIO driver, defines for timeout and sleep
partially used lower case.
Lets change it to upper case in line with the rest of driver defines.
Signed-off-by: Robert Marko
Cc: Luka Perkov
Reviewed-by: Andrew Lunn
Reviewed-by: Florian Fainelli
---
Changes since v4
On Mon, Sep 21, 2020 at 11:48 PM David Miller wrote:
>
> From: Robert Marko
> Date: Sun, 20 Sep 2020 16:16:51 +0200
>
> > This patch series adds support for Clause 45 to the driver.
> >
> > While at it also change some defines to upper case to match rest of the
>
configuration has been found
Robert Marko (2):
net: mdio-ipq4019: change defines to upper case
net: mdio-ipq4019: add Clause 45 support
drivers/net/mdio/mdio-ipq4019.c | 109 +++-
1 file changed, 92 insertions(+), 17 deletions(-)
--
2.26.2
On Sun, Sep 20, 2020 at 2:19 AM Andrew Lunn wrote:
>
> > +
> > +/* 0 = Clause 22, 1 = Clause 45 */
> > +#define MDIO_MODE_BITBIT(8)
>
> How about calling this MDIO_MODE_C45
Good idea, will rename it.
>
> > + /* Enter Clause 45 mode */
> > +
This patch series adds support for Clause 45 to the driver.
While at it also change some defines to upper case to match rest of the driver.
Changes since v1:
* Drop clock patches, these need further investigation and
no user for non default configuration has been found
Robert Marko (2):
net
In the commit adding the IPQ4019 MDIO driver, defines for timeout and sleep
partially used lower case.
Lets change it to upper case in line with the rest of driver defines.
Signed-off-by: Robert Marko
Cc: Luka Perkov
Reviewed-by: Andrew Lunn
Reviewed-by: Florian Fainelli
---
drivers/net/phy
While up-streaming the IPQ4019 driver it was thought that the controller had no
Clause 45 support,
but it actually does and its activated by writing a bit to the mode register.
So lets add it as newer SoC-s use the same controller and Clause 45 compliant
PHY-s.
Signed-off-by: Robert Marko
Cc
While up-streaming the IPQ4019 driver it was thought that the controller had no
Clause 45 support,
but it actually does and its activated by writing a bit to the mode register.
So lets add it as newer SoC-s use the same controller and Clause 45 compliant
PHY-s.
Signed-off-by: Robert Marko
Cc
In the commit adding the IPQ4019 MDIO driver, defines for timeout and sleep
partially used lower case.
Lets change it to upper case in line with the rest of driver defines.
Signed-off-by: Robert Marko
Cc: Luka Perkov
Reviewed-by: Andrew Lunn
Reviewed-by: Florian Fainelli
---
drivers/net/phy
This patch series adds support for Clause 45 to the driver.
While at it also change some defines to upper case to match rest of the driver.
Changes since v1:
* Drop clock patches, these need further investigation and
no user for non default configuration has been found
Robert Marko (2):
net
In the commit adding the IPQ4019 MDIO driver, defines for timeout and sleep
partially used lower case.
Lets change it to upper case in line with the rest of driver defines.
Signed-off-by: Robert Marko
Cc: Luka Perkov
Reviewed-by: Andrew Lunn
Reviewed-by: Florian Fainelli
---
drivers/net/phy
While up-streaming the IPQ4019 driver it was thought that the controller had no
Clause 45 support,
but it actually does and its activated by writing a bit to the mode register.
So lets add it as newer SoC-s use the same controller and Clause 45 compliant
PHY-s.
Signed-off-by: Robert Marko
Cc
This patch series adds support for Clause 45 to the driver.
While at it also change some defines to upper case to match rest of the driver.
Changes since v1:
* Drop clock patches, these need further investigation and
no user for non default configuration has been found
Robert Marko (2):
net
According to the mx25l12805d datasheet it supports using 4K or 64K sectors.
So lets add the SECT_4K to enable 4K sector usage.
Datasheet:
https://www.mxic.com.tw/Lists/Datasheet/Attachments/7321/MX25L12805D,%203V,%20128Mb,%20v1.2.pdf
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
drivers
Atheros QCA4018 5GHz 802.11a/n/ac 2:2x2
ETH: Qualcomm Atheros QCA8072 Gigabit Switch (1 x LAN, 1 x WAN)
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
Changes since v1:
* Drop include that does not exist
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts
: Robert Marko
Cc: Luka Perkov
---
Changes since v1:
* Drop include that does not exist
arch/arm/boot/dts/Makefile| 1 +
.../boot/dts/qcom-ipq4019-habanero-dvk.dts| 304 ++
2 files changed, 305 insertions(+)
create mode 100644 arch/arm/boot/dts/qcom
)
- UART header available on PCB (2.0 mm pitch)
This adds DTS for both the generic and custom Bit edition for Sartura.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
Changes since v1:
* Drop include that does not exist
arch/arm/boot/dts/Makefile| 2 +
.../boot/dts/qcom-ipq4018
This patch series adds support for some popular IPQ4019 based
boards.
This patch series depends on:
https://patchwork.kernel.org/patch/11765789/
https://patchwork.kernel.org/patch/11760437/
Signed-off-by: Robert Marko
Cc: Luka Perkov
Robert Marko (4):
arm: dts: qcom: ipq4019: add more
Lets add labels to more commonly used nodes for easier modification in board
DTS files.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
Changes since v1:
* Drop include that does not exist
arch/arm/boot/dts/qcom-ipq4019.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff
Lets add labels to more commonly used nodes for easier modification in board
DTS files.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi
b/arch/arm
This patch series adds support for some popular IPQ4019 based
boards.
This patch series depends on:
https://patchwork.kernel.org/patch/11765789/
https://patchwork.kernel.org/patch/11760437/
Signed-off-by: Robert Marko
Cc: Luka Perkov
Robert Marko (4):
arm: dts: qcom: ipq4019: add more
Atheros QCA4018 5GHz 802.11a/n/ac 2:2x2
ETH: Qualcomm Atheros QCA8072 Gigabit Switch (1 x LAN, 1 x WAN)
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts | 215
2 files changed, 216
: Robert Marko
Cc: Luka Perkov
---
arch/arm/boot/dts/Makefile| 1 +
.../boot/dts/qcom-ipq4019-habanero-dvk.dts| 305 ++
2 files changed, 306 insertions(+)
create mode 100644 arch/arm/boot/dts/qcom-ipq4019-habanero-dvk.dts
diff --git a/arch/arm/boot/dts
)
- UART header available on PCB (2.0 mm pitch)
This adds DTS for both the generic and custom Bit edition for Sartura.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
arch/arm/boot/dts/Makefile| 2 +
.../boot/dts/qcom-ipq4018-ap120c-ac-bit.dts | 28 ++
arch/arm/boot/dts/qcom
From: John Crispin
Since we now have driver for the USB PHY, and USB controller is already
supported by the DWC3 driver lets add the necessary nodes to DTSI.
Signed-off-by: John Crispin
Signed-off-by: Robert Marko
Cc: Luka Perkov
Reviewed-by: Vinod Koul
---
Changes from v7 to v8:
* Add
Since we now have driver for the USB PHY, lets add the necessary nodes to DTSI.
Signed-off-by: John Crispin
Signed-off-by: Robert Marko
Cc: Luka Perkov
Reviewed-by: Vinod Koul
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 74 +
1 file changed, 74 insertions(+)
diff
Since we now have driver for the SDHCI VQMMC LDO needed
for I/0 voltage levels lets introduce the necessary node for it.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/qcom
On Tue, Jun 9, 2020 at 6:19 PM Vinod Koul wrote:
>
> Hi Robert,
>
> On 09-06-20, 16:45, Robert Marko wrote:
> > HI,
> > Vinod can you maybe pick this?
>
> Sorry can't do.. this needs to go thru Bjorn..
>
> We are in merge window so it is too late for that.
IPQ6018 uses the same NAND and controller as IPQ8074 which
is supported by the Qualcomm NANDC driver.
So lets add the NAND node as well as node for the BAM DMA
controller that is supported by the BAM DMA driver.
Signed-off-by: Robert Marko
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 27
On Thu, Jul 2, 2020 at 9:59 PM Florian Fainelli wrote:
>
>
>
> On 7/2/2020 3:29 AM, Robert Marko wrote:
> > Some newer SoC-s have a separate MDIO clock that needs to be enabled.
> > So lets add support for handling the clocks to the driver.
> >
&
On Thu, Jul 2, 2020 at 10:04 PM Florian Fainelli wrote:
>
>
>
> On 7/2/2020 12:18 PM, Robert Marko wrote:
> > On Thu, Jul 2, 2020 at 3:38 PM Andrew Lunn wrote:
> >>
> >>> + clock-frequency:
> >>> +default: 1
> >>
> >
On Thu, Jul 2, 2020 at 3:38 PM Andrew Lunn wrote:
>
> > + clock-frequency:
> > +default: 1
>
> IEEE 802.3 says the default should be 2.5MHz. Some PHYs will go
> faster, but 100MHz seems unlikely!
This MDIO controller has an internal divider, by default its set for
100MHz clock.
In IPQ
This adds the necessary bindings for SoC-s that have a separate MDIO clock.
Signed-off-by: Robert Marko
---
.../devicetree/bindings/net/qcom,ipq4019-mdio.yaml| 11 +++
1 file changed, 11 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml
b
This patch series adds support for Clause 45 and clock handling support to
the driver.
While at it also change some defines to upper case to match rest of the driver.
Robert Marko (4):
net: mdio-ipq4019: change defines to upper case
net: mdio-ipq4019: add clock support
net: mdio-ipq4019
While up-streaming the IPQ4019 driver it was thought that the controller had no
Clause 45 support,
but it actually does and its activated by writing a bit to the mode register.
So lets add it as newer SoC-s use the same controller and Clause 45 compliant
PHY-s.
Signed-off-by: Robert Marko
In the commit adding the IPQ4019 MDIO driver, defines for timeout and sleep
partially used lower case.
Lets change it to upper case in line with the rest of driver defines.
Signed-off-by: Robert Marko
---
drivers/net/phy/mdio-ipq4019.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions
Some newer SoC-s have a separate MDIO clock that needs to be enabled.
So lets add support for handling the clocks to the driver.
Signed-off-by: Robert Marko
---
drivers/net/phy/mdio-ipq4019.c | 28 +++-
1 file changed, 27 insertions(+), 1 deletion(-)
diff --git a
HI,
Vinod can you maybe pick this?
It would be great to have nodes in 5.8 along the driver
Thank
Robert
On Fri, May 29, 2020 at 11:36 AM Robert Marko wrote:
>
> On Mon, May 4, 2020 at 9:39 AM Vinod Koul wrote:
> >
> > On 03-05-20, 22:18, Robert Marko wrote:
> &
y: Christian Lamparter
Signed-off-by: John Crispin
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
Changes from v1 to v2:
* Resolve warnings discovered by the kbot
* Return the return of regmap_update_bits instead of not using it at all
drivers/clk/qcom/gcc-ipq4019.c | 36
On Mon, Jun 8, 2020 at 11:07 AM Nathan Chancellor
wrote:
>
> On Mon, Jun 08, 2020 at 10:54:34AM +0200, Robert Marko wrote:
> > On Thu, Jun 4, 2020 at 10:25 PM kernel test robot wrote:
> > >
> > > Hi Robert,
> > >
> > > I love your patch! Perhaps so
37406982]
>
> url:
> https://github.com/0day-ci/linux/commits/Robert-Marko/clk-qcom-ipq4019-fix-apss-cpu-overclocking/20200605-002859
> base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
> config: x86_64-allyesconfig (attached as .config)
> compile
y: Christian Lamparter
Signed-off-by: John Crispin
Tested-by: Robert Marko
Cc: Luka Perkov
---
drivers/clk/qcom/gcc-ipq4019.c | 34 +++---
1 file changed, 31 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/qcom/gcc-ipq4019.c b/drivers/clk/qcom/gc
On Mon, May 4, 2020 at 9:39 AM Vinod Koul wrote:
>
> On 03-05-20, 22:18, Robert Marko wrote:
> > From: John Crispin
> >
> > Since we now have driver for the USB PHY, lets add the necessary nodes to
> > DTSI.
>
> Reviewed-by: Vinod Koul
>
> Bjorn, I hav
From: John Crispin
Since we now have driver for the USB PHY, lets add the necessary nodes to DTSI.
Signed-off-by: John Crispin
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
Changes from v6 to v7:
* Remove changes to qcom-ipq4019-ap.dk01.1.dtsi
It has slipped in unwanted, we only want to
This patch adds the binding documentation for the HS/SS USB PHY found
inside Qualcom Dakota SoCs.
Signed-off-by: John Crispin
Signed-off-by: Robert Marko
Reviewed-by: Rob Herring
Cc: Luka Perkov
---
Changes from v5 to v6:
* Add missing include for reset defines in example
* Fix warning for
Add a driver to setup the USB PHY-s on Qualcom m IPQ40xx series SoCs.
The driver sets up HS and SS phys.
Signed-off-by: John Crispin
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
Changes from v6 to v7:
* Use of_device_get_match_data() instead of of_match_device()
and then passing that to
This patch adds the binding document for the IPQ40xx MDIO driver.
Signed-off-by: Robert Marko
Reviewed-by: Andrew Lunn
Reviewed-by: Florian Fainelli
Cc: Luka Perkov
---
Changes from v3 to v4:
* Change compatible to IPQ4019
Changes from v2 to v3:
* Remove status from example
.../bindings
This patch adds the driver for the MDIO interface
inside of Qualcomm IPQ40xx series SoC-s.
Signed-off-by: Christian Lamparter
Signed-off-by: Robert Marko
Reviewed-by: Andrew Lunn
Reviewed-by: Florian Fainelli
Cc: Luka Perkov
---
Changes from v3 to v4:
* Change compatible and references
This patch adds the necessary MDIO interface node
to the Qualcomm IPQ4019 DTSI.
Built-in QCA8337N switch is managed using it,
and since we have a driver for it lets add it.
Signed-off-by: Christian Lamparter
Signed-off-by: Robert Marko
Reviewed-by: Andrew Lunn
Reviewed-by: Florian Fainelli
This patch series provides support for the IPQ40xx built-in MDIO interface.
Included are driver, devicetree bindings for it and devicetree node.
Robert Marko (3):
net: phy: mdio: add IPQ4019 MDIO driver
dt-bindings: add Qualcomm IPQ4019 MDIO bindings
ARM: dts: qcom: ipq4019: add MDIO node
On Wed, Apr 29, 2020 at 8:59 PM David Miller wrote:
>
> From: Robert Marko
> Date: Wed, 29 Apr 2020 13:07:24 +0200
>
> > This patch series provides support for the IPQ40xx built-in MDIO interface.
> > Included are driver, devicetree bindings for it and devicetree node.
This patch series provides support for the IPQ40xx built-in MDIO interface.
Included are driver, devicetree bindings for it and devicetree node.
Robert Marko (3):
net: phy: mdio: add IPQ4019 MDIO driver
dt-bindings: add Qualcomm IPQ4019 MDIO bindings
ARM: dts: qcom: ipq4019: add MDIO node
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