involved
with Dove than Sebastian is now? Sebastian?
Uhm, yeah, please change the MAINTAINERS entry.
I haven't been able to follow neither Dove nor mvebu discussion
lately.
If you want to take over, feel free to add my
Acked-by: Sebastian Hesselbarth <sebastian.hesselba...@gmail.com>
Sebastian
involved
with Dove than Sebastian is now? Sebastian?
Uhm, yeah, please change the MAINTAINERS entry.
I haven't been able to follow neither Dove nor mvebu discussion
lately.
If you want to take over, feel free to add my
Acked-by: Sebastian Hesselbarth
Sebastian
On 19.01.2017 22:12, Chris Packham wrote:
> On 14/01/17 20:50, Chris Packham wrote:
>> On 13/01/17 22:54, Sebastian Hesselbarth wrote:
>>> On 13.01.2017 10:12, Chris Packham wrote:
>>>> From: Kalyan Kinthada <kalyan.kinth...@alliedtelesis.co.nz>
>>>>
On 19.01.2017 22:12, Chris Packham wrote:
> On 14/01/17 20:50, Chris Packham wrote:
>> On 13/01/17 22:54, Sebastian Hesselbarth wrote:
>>> On 13.01.2017 10:12, Chris Packham wrote:
>>>> From: Kalyan Kinthada
>>>>
>>>> This pinctrl driver suppo
hris Packham <chris.pack...@alliedtelesis.co.nz>
Acked-by: Rob Herring <r...@kernel.org>
Acked-by: Sebastian Hesselbarth <sebastian.hesselba...@gmail.com>
---
Notes:
Changes in v2:
- include sdio support for the 98DX4251
Changes in v3:
- None
Changes in v4:
- Corr
On 13.01.2017 10:12, Chris Packham wrote:
From: Kalyan Kinthada
This pinctrl driver supports the 98DX3236, 98DX3336 and 98DX4251 SoCs
from Marvell.
Signed-off-by: Kalyan Kinthada
Signed-off-by: Chris Packham
Acked-by: Rob Herring
Acked-by: Sebastian Hesselbarth
---
Notes:
Changes
driver "dev","we0" differ.
- MPP_MODE21 through MPP_MODE30 binding "gpio" and driver "gpo" differ.
- remove spaces before "0, 0" in mv98dx3236_mpp_gpio_ranges.
Most of it is cosmetic stuff, so if you fix it feel free to add my
Acked-by: Sebastian Hesselbarth <sebastian.hesselba...@gmail.com>
Sebastian
ot.
- MPP_MODE20 binding "gpio" and driver "gpo" differ.
- MPP_MODE20 binding "dev","we" and driver "dev","we0" differ.
- MPP_MODE21 through MPP_MODE30 binding "gpio" and driver "gpo" differ.
- remove spaces before "0, 0" in mv98dx3236_mpp_gpio_ranges.
Most of it is cosmetic stuff, so if you fix it feel free to add my
Acked-by: Sebastian Hesselbarth
Sebastian
is.brezil...@free-electrons.com>
Cc: Ezequiel Garcia <ezequiel.gar...@free-electrons.com>
Cc: Paul Bolle <pebo...@tiscali.nl>
Cc: Rafał Miłecki <zaj...@gmail.com>
Cc: Sebastian Hesselbarth <sebastian.hesselba...@gmail.com>
Feel free to add my
Acked-by: Sebastian Hesselba
Cc: Rafał Miłecki
Cc: Sebastian Hesselbarth
Feel free to add my
Acked-by: Sebastian Hesselbarth
for Patches 23, 25, 27, 29, 30, 31, 32, 33, 35, 36, i.e. all I
have been in Cc.
Sebastian
Cc: Stefan Roese
Cc: Thomas Petazzoni
Signed-off-by: Alexandre Belloni
---
arch/arm/boot/dts
of the E-mails below should represent that.
Thanks for taking over and if you reword the Patch, feel free to
add my
Acked-by: Sebastian Hesselbarth <sebastian.hesselba...@gmail.com>
Sebastian
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
---
MAINTAINERS | 1 +
1 file changed,
of the E-mails below should represent that.
Thanks for taking over and if you reword the Patch, feel free to
add my
Acked-by: Sebastian Hesselbarth
Sebastian
Signed-off-by: Jisheng Zhang
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index b003d0c
On 06.09.2016 10:40, Jisheng Zhang wrote:
This is a clean up series to fix berlin arm platforms dtc warnings.
Firstly we remove skeleton.dtsi inclusion. Then add missing unit name
of /soc node and /memory node. Lastly, we fix regulators' name
Jisheng Zhang (10):
ARM: dts: berlin2q: Remove
On 06.09.2016 10:40, Jisheng Zhang wrote:
This is a clean up series to fix berlin arm platforms dtc warnings.
Firstly we remove skeleton.dtsi inclusion. Then add missing unit name
of /soc node and /memory node. Lastly, we fix regulators' name
Jisheng Zhang (10):
ARM: dts: berlin2q: Remove
On 30.08.2016 10:24, Philipp Zabel wrote:
Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.
Cc: Antoine Tenart <antoine.ten...@free-electrons.com>
Cc: Sebastian Hesselbarth <sebastian.hesselba...@gmail.com>
Reviewed-by: Masahiro Yamada &
On 30.08.2016 10:24, Philipp Zabel wrote:
Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.
Cc: Antoine Tenart
Cc: Sebastian Hesselbarth
Reviewed-by: Masahiro Yamada
Signed-off-by: Philipp Zabel
Sorry for the late reply, FWIW
Acked-by: Sebastian
in header files as they're useless and we're in the
area.
Cc: Jisheng Zhang <jszh...@marvell.com>
Cc: Alexandre Belloni <alexandre.bell...@free-electrons.com>
Cc: Sebastian Hesselbarth <sebastian.hesselba...@gmail.com>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org&
in header files as they're useless and we're in the
area.
Cc: Jisheng Zhang
Cc: Alexandre Belloni
Cc: Sebastian Hesselbarth
Signed-off-by: Stephen Boyd
---
Changes from v1:
* Fixed alignment
* Added note about dropping __init in commit text
drivers/clk/berlin/berlin2-avpll.c | 12
On July 23, 2016 12:45:23 AM Andreas Klinger <a...@it-klinger.de> wrote:
Sebastian Hesselbarth <sebastian.hesselba...@gmail.com> schrieb am Fri, 22.
Jul 18:59:
On 16.07.2016 17:07, Andreas Klinger wrote:
>On Marvell mv88f6180 with pin control driver one can not use multi
&
On July 23, 2016 12:45:23 AM Andreas Klinger wrote:
Sebastian Hesselbarth schrieb am Fri, 22.
Jul 18:59:
On 16.07.2016 17:07, Andreas Klinger wrote:
>On Marvell mv88f6180 with pin control driver one can not use multi
>purpose pins 35 through 44.
>I'm using this controller on an
viewed-by: Sebastian Hesselbarth <sebastian.hesselba...@gmail.com>
And we should probably have a Fixes: tag + stable.
Sebastian
---
drivers/pinctrl/mvebu/pinctrl-kirkwood.c | 85
1 file changed, 43 insertions(+), 42 deletions(-)
diff --git a/drivers/pinctrl/m
uses MPP[19:0] and MPP[44:35], i.e. there is a hole
in the middle.
So, looking at your patch, you basically move MPP[n] to MPP[n+15]
starting with MPP[20] to match the HW spec.
That's fine with me, if it works on 6180 Kirkwood.
Signed-off-by: Andreas Klinger
Reviewed-by: Sebastian Hesselbarth
On 07.07.2016 07:48, Jisheng Zhang wrote:
> On Wed, 6 Jul 2016 19:49:01 +0200 Sebastian Hesselbarth wrote:
>> On 16.06.2016 10:40, Jisheng Zhang wrote:
>>> This patch adds the L2 cache topology for berlin4ct which has 1MB L2
>>> cache.
>>>
>>> Sign
On 07.07.2016 07:48, Jisheng Zhang wrote:
> On Wed, 6 Jul 2016 19:49:01 +0200 Sebastian Hesselbarth wrote:
>> On 16.06.2016 10:40, Jisheng Zhang wrote:
>>> This patch adds the L2 cache topology for berlin4ct which has 1MB L2
>>> cache.
>>>
>>> Signed-o
On 16.12.2015 21:30, Sebastian Hesselbarth wrote:
> On 15.12.2015 15:57, Jisheng Zhang wrote:
>> Commit ac82d1277215 ("arm64: perf: add Cortex-A53 support") adds the
>> cortex A53 PMU support, thus instead of using the generic armv8-pmuv3
>> compatibility u
On 16.12.2015 21:30, Sebastian Hesselbarth wrote:
> On 15.12.2015 15:57, Jisheng Zhang wrote:
>> Commit ac82d1277215 ("arm64: perf: add Cortex-A53 support") adds the
>> cortex A53 PMU support, thus instead of using the generic armv8-pmuv3
>> compatibility u
On 06.07.2016 08:41, Jisheng Zhang wrote:
> When we add watchdog dt nodes into berlin dtsi, the dw_wdt driver can't
> support multiple variants, so we have to keep one enabled and others
> disabled. After commit f29a72c24ad4 ("watchdog: dw_wdt: Convert to use
> watchdog infrastructure"), the
On 06.07.2016 08:41, Jisheng Zhang wrote:
> When we add watchdog dt nodes into berlin dtsi, the dw_wdt driver can't
> support multiple variants, so we have to keep one enabled and others
> disabled. After commit f29a72c24ad4 ("watchdog: dw_wdt: Convert to use
> watchdog infrastructure"), the
On 16.06.2016 10:40, Jisheng Zhang wrote:
> This patch adds the L2 cache topology for berlin4ct which has 1MB L2
> cache.
>
> Signed-off-by: Jisheng Zhang
> ---
> arch/arm64/boot/dts/marvell/berlin4ct.dtsi | 8
> 1 file changed, 8 insertions(+)
>
> diff --git
On 16.06.2016 10:40, Jisheng Zhang wrote:
> This patch adds the L2 cache topology for berlin4ct which has 1MB L2
> cache.
>
> Signed-off-by: Jisheng Zhang
> ---
> arch/arm64/boot/dts/marvell/berlin4ct.dtsi | 8
> 1 file changed, 8 insertions(+)
>
> diff --git
On 15.12.2015 15:57, Jisheng Zhang wrote:
> Commit ac82d1277215 ("arm64: perf: add Cortex-A53 support") adds the
> cortex A53 PMU support, thus instead of using the generic armv8-pmuv3
> compatibility use the more specific Cortex A53 compatibility.
>
> Signed-off-by: Jisheng Zhang
> ---
> Since
On 15.12.2015 15:57, Jisheng Zhang wrote:
> Commit ac82d1277215 ("arm64: perf: add Cortex-A53 support") adds the
> cortex A53 PMU support, thus instead of using the generic armv8-pmuv3
> compatibility use the more specific Cortex A53 compatibility.
>
> Signed-off-by: Jisheng Zhang
:arch/arm/mach-berlin/
F:arch/arm/boot/dts/berlin*
+F: arch/arm64/boot/dts/marvell/berlin*
For Berlin,
Acked-by: Sebastian Hesselbarth
Thanks!
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kerne
s)
S:Maintained
F:arch/arm/mach-berlin/
F:arch/arm/boot/dts/berlin*
+F: arch/arm64/boot/dts/marvell/berlin*
For Berlin,
Acked-by: Sebastian Hesselbarth <sebastian.hesselba...@gmail.com>
Thanks!
--
To unsubscribe from this list: send the line "unsubscribe linux-ke
On 07.12.2015 14:09, Jisheng Zhang wrote:
> CLKID_SDIO is used as the 2nd optional clk for all sdhci hosts in BG2Q.
> We removed CLK_IGNORE_UNUSED from CLKID_SDIO's flag. These two patches
> fixes this clk issue.
>
> Jisheng Zhang (2):
> ARM: dts: berlin: correct BG2Q's sdhci2 2nd clock
>
On 07.12.2015 14:09, Jisheng Zhang wrote:
> CLKID_SDIO is used as the 2nd optional clk for all sdhci hosts in BG2Q.
> We removed CLK_IGNORE_UNUSED from CLKID_SDIO's flag. These two patches
> fixes this clk issue.
>
> Jisheng Zhang (2):
> ARM: dts: berlin: correct BG2Q's sdhci2 2nd clock
>
On 19.11.2015 21:31, Sebastian Hesselbarth wrote:
> On 16.11.2015 11:56, Jisheng Zhang wrote:
>> Add or fix the optional clock property, then remove the CLK_IGNORE_UNUSED
>> flag for sdio clk(s).
>>
>> This is a partialy resend of
>> http://lists.infradead.or
On 30.11.2015 14:41, Jisheng Zhang wrote:
> This patch adds an idle-states node to describe the berlin4ct idle
> states and also adds references to the idle-states node in all CPU
> nodes. After this patch cpuidle is enabled.
>
> Signed-off-by: Jisheng Zhang
Applied to berlin64/dt with
On 30.11.2015 14:54, Jisheng Zhang wrote:
> The sdhci1 on Marvell BG2Q DMP board is used as sdcard interface, we
> have gpios for card detection, write-protect, vqmmc and vmmc.
>
> This patch adds pinmux for this sdcard interface, then adds regulators
> for vmmc and vqmmc, lastly adds cd-gpios,
On 19.11.2015 21:31, Sebastian Hesselbarth wrote:
> On 16.11.2015 11:56, Jisheng Zhang wrote:
>> Add or fix the optional clock property, then remove the CLK_IGNORE_UNUSED
>> flag for sdio clk(s).
>>
>> This is a partialy resend of
>> http://lists.infradead.or
On 30.11.2015 14:54, Jisheng Zhang wrote:
> The sdhci1 on Marvell BG2Q DMP board is used as sdcard interface, we
> have gpios for card detection, write-protect, vqmmc and vmmc.
>
> This patch adds pinmux for this sdcard interface, then adds regulators
> for vmmc and vqmmc, lastly adds cd-gpios,
On 30.11.2015 14:41, Jisheng Zhang wrote:
> This patch adds an idle-states node to describe the berlin4ct idle
> states and also adds references to the idle-states node in all CPU
> nodes. After this patch cpuidle is enabled.
>
> Signed-off-by: Jisheng Zhang
Applied to
On 29.11.2015 15:35, Thomas Petazzoni wrote:
Adding Ezequiel Garcia in Cc.
On Sat, 28 Nov 2015 12:14:08 +0100, Sebastian Hesselbarth wrote:
The NAND device found on Lenovo ix4-300d uses 4-bit BCH ECC protection.
Add the corresponding properties to the NAND node.
If the ONFI information from
On 29.11.2015 15:35, Thomas Petazzoni wrote:
Adding Ezequiel Garcia in Cc.
On Sat, 28 Nov 2015 12:14:08 +0100, Sebastian Hesselbarth wrote:
The NAND device found on Lenovo ix4-300d uses 4-bit BCH ECC protection.
Add the corresponding properties to the NAND node.
If the ONFI information from
On 28.11.2015 18:00, Andrew Lunn wrote:
> On Sat, Nov 28, 2015 at 12:14:06PM +0100, Sebastian Hesselbarth wrote:
>> NAND flash partitions should be part of a partitions sub-node
>> not the flash node itself. Move the partitions which will also
>> allow different bootloaders
On 28.11.2015 17:52, Andrew Lunn wrote:
> On Sat, Nov 28, 2015 at 12:14:05PM +0100, Sebastian Hesselbarth wrote:
>> Current NAND node has an additional flash partition for the whole
>> flash overlapping with real partitions. Remove this partition as
>> the whole flash i
On 23.11.2015 05:59, Jisheng Zhang wrote:
> On Fri, 20 Nov 2015 21:19:46 +0100
> Sebastian Hesselbarth wrote:
>> On 20.11.2015 04:34, Jisheng Zhang wrote:
>>> On Thu, 19 Nov 2015 21:47:05 +0100
>>> Sebastian Hesselbarth wrote:
>>>> On 16.11.2015 12:09
Yamada
>
> I'm not maintainers, but this patch looks good to me. So if you need,
>
> Acked-by: Jisheng Zhang
And here comes the maintainer's
Acked-by: Sebastian Hesselbarth
Thanks!
>> ---
>>
>> drivers/pinctrl/Makefile| 2 +-
>> drivers/pinctrl/ber
On 26.11.2015 14:13, Jisheng Zhang wrote:
> The sdhci1 on Marvell BG2Q DMP board is used as sdcard interface, we
> have gpios for card detection, write-protect, vqmmc and vmmc.
>
> This patch adds pinmux for this sdcard interface, then adds regulators
> for vmmc and vqmmc, lastly adds cd-gpios,
The NAND device found on Lenovo ix4-300d uses 4-bit BCH ECC protection.
Add the corresponding properties to the NAND node.
Signed-off-by: Sebastian Hesselbarth
---
Cc: Jason Cooper
Cc: Andrew Lunn
Cc: Gregory Clement
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
.
Patch 4 finally adds ECC properties for 4-bit BCH ECC used by the ix4-300d
flash.
Sebastian
Sebastian Hesselbarth (4):
ARM: dt: mvebu: ix4-300d: remove whole flash partition
ARM: dt: mvebu: ix4-300d: move partitions to partition sub-node
ARM: dt: mvebu: ix4-300d: Cleanup NAND partition
NAND flash partitions should be part of a partitions sub-node
not the flash node itself. Move the partitions which will also
allow different bootloaders get rid of the stock partitions
easily by removing the partitions node.
Signed-off-by: Sebastian Hesselbarth
---
Cc: Jason Cooper
Cc: Andrew
Prefix all partition reg properties to 32-bit to ease readability.
While at it, also remove a stale x in front of boot partition
offset and make some upper-case hex numbers lower-case.
Signed-off-by: Sebastian Hesselbarth
---
Cc: Jason Cooper
Cc: Andrew Lunn
Cc: Gregory Clement
Cc: Rob
Current NAND node has an additional flash partition for the whole
flash overlapping with real partitions. Remove this partition as
the whole flash is already represented by the NAND device itself.
Signed-off-by: Sebastian Hesselbarth
---
Cc: Jason Cooper
Cc: Andrew Lunn
Cc: Gregory Clement
Cc
setting. Also, if
there is no supported setting for this variant, do not complain at
all.
Signed-off-by: Sebastian Hesselbarth
Reported-by: Linus Walleij
---
Changelog:
v1->v2:
- modify settings loop to allow to check for !num_settings
Cc: Linus Walleij
Cc: Simon Guinot
Cc: Thomas Petazz
On 28.11.2015 11:14, Sebastian Hesselbarth wrote:
> Common MVEBU pinctrl driver core gets an array of controls to modify
> a specific set of registers and an array of modes for each pingroup
> from each of the different SoC families of MVEBU.
>
> Some SoC families comprise dif
mode setting. Also, if
there is no supported setting for this variant, do not complain at
all.
Signed-off-by: Sebastian Hesselbarth
Reported-by: Linus Walleij
---
Cc: Linus Walleij
Cc: Simon Guinot
Cc: Thomas Petazzoni
Cc: Jason Cooper
Cc: Andrew Lunn
Cc: Gregory Clement
Cc: linux-g
Prefix all partition reg properties to 32-bit to ease readability.
While at it, also remove a stale x in front of boot partition
offset and make some upper-case hex numbers lower-case.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselba...@gmail.com>
---
Cc: Jason Coop
Current NAND node has an additional flash partition for the whole
flash overlapping with real partitions. Remove this partition as
the whole flash is already represented by the NAND device itself.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselba...@gmail.com>
---
Cc: Jason Coop
mode setting. Also, if
there is no supported setting for this variant, do not complain at
all.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselba...@gmail.com>
Reported-by: Linus Walleij <linus.wall...@linaro.org>
---
Cc: Linus Walleij <linus.wall...@linaro.org>
Cc: Simon
setting. Also, if
there is no supported setting for this variant, do not complain at
all.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselba...@gmail.com>
Reported-by: Linus Walleij <linus.wall...@linaro.org>
---
Changelog:
v1->v2:
- modify settings loop to allow to check fo
da <yamada.masah...@socionext.com>
>
> I'm not maintainers, but this patch looks good to me. So if you need,
>
> Acked-by: Jisheng Zhang <jszh...@marvell.com>
And here comes the maintainer's
Acked-by: Sebastian Hesselbarth <sebastian.hesselba...@gmail.com>
Thanks!
&
The NAND device found on Lenovo ix4-300d uses 4-bit BCH ECC protection.
Add the corresponding properties to the NAND node.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselba...@gmail.com>
---
Cc: Jason Cooper <ja...@lakedaemon.net>
Cc: Andrew Lunn <and...@lunn.ch>
C
.
Patch 4 finally adds ECC properties for 4-bit BCH ECC used by the ix4-300d
flash.
Sebastian
Sebastian Hesselbarth (4):
ARM: dt: mvebu: ix4-300d: remove whole flash partition
ARM: dt: mvebu: ix4-300d: move partitions to partition sub-node
ARM: dt: mvebu: ix4-300d: Cleanup NAND partition
NAND flash partitions should be part of a partitions sub-node
not the flash node itself. Move the partitions which will also
allow different bootloaders get rid of the stock partitions
easily by removing the partitions node.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselba...@gmail.
On 26.11.2015 14:13, Jisheng Zhang wrote:
> The sdhci1 on Marvell BG2Q DMP board is used as sdcard interface, we
> have gpios for card detection, write-protect, vqmmc and vmmc.
>
> This patch adds pinmux for this sdcard interface, then adds regulators
> for vmmc and vqmmc, lastly adds cd-gpios,
On 28.11.2015 11:14, Sebastian Hesselbarth wrote:
> Common MVEBU pinctrl driver core gets an array of controls to modify
> a specific set of registers and an array of modes for each pingroup
> from each of the different SoC families of MVEBU.
>
> Some SoC families comprise dif
On 23.11.2015 05:59, Jisheng Zhang wrote:
> On Fri, 20 Nov 2015 21:19:46 +0100
> Sebastian Hesselbarth wrote:
>> On 20.11.2015 04:34, Jisheng Zhang wrote:
>>> On Thu, 19 Nov 2015 21:47:05 +0100
>>> Sebastian Hesselbarth wrote:
>>>> On 16.11.2015 12:09
On 28.11.2015 18:00, Andrew Lunn wrote:
> On Sat, Nov 28, 2015 at 12:14:06PM +0100, Sebastian Hesselbarth wrote:
>> NAND flash partitions should be part of a partitions sub-node
>> not the flash node itself. Move the partitions which will also
>> allow different bootloaders
On 28.11.2015 17:52, Andrew Lunn wrote:
> On Sat, Nov 28, 2015 at 12:14:05PM +0100, Sebastian Hesselbarth wrote:
>> Current NAND node has an additional flash partition for the whole
>> flash overlapping with real partitions. Remove this partition as
>> the whole flash i
On 24.11.2015 03:35, Jisheng Zhang wrote:
On Mon, 23 Nov 2015 16:54:44 +0800
Jisheng Zhang wrote:
On Mon, 23 Nov 2015 09:30:42 +0100
Sebastian Hesselbarth wrote:
On 23.11.2015 08:21, Jisheng Zhang wrote:
On Fri, 20 Nov 2015 22:06:59 +0100
Sebastian Hesselbarth wrote:
On 20.11.2015 09:42
On 24.11.2015 03:35, Jisheng Zhang wrote:
On Mon, 23 Nov 2015 16:54:44 +0800
Jisheng Zhang wrote:
On Mon, 23 Nov 2015 09:30:42 +0100
Sebastian Hesselbarth wrote:
On 23.11.2015 08:21, Jisheng Zhang wrote:
On Fri, 20 Nov 2015 22:06:59 +0100
Sebastian Hesselbarth wrote:
On 20.11.2015 09:42
On 23.11.2015 08:21, Jisheng Zhang wrote:
On Fri, 20 Nov 2015 22:06:59 +0100
Sebastian Hesselbarth wrote:
On 20.11.2015 09:42, Jisheng Zhang wrote:
Add syspll, mempll, cpupll, gateclk and berlin-clk nodes.
Signed-off-by: Jisheng Zhang
---
[...]
+ syspll: syspll
On 23.11.2015 03:49, Jisheng Zhang wrote:
On Fri, 20 Nov 2015 22:19:32 +0100
Sebastian Hesselbarth wrote:
On 20.11.2015 10:47, Jisheng Zhang wrote:
Enable all i2c nodes for the Marvell berlin BG4CT STB board.
Signed-off-by: Jisheng Zhang
---
arch/arm64/boot/dts/marvell/berlin4ct-stb.dts
On 23.11.2015 03:49, Jisheng Zhang wrote:
On Fri, 20 Nov 2015 22:19:32 +0100
Sebastian Hesselbarth wrote:
On 20.11.2015 10:47, Jisheng Zhang wrote:
Enable all i2c nodes for the Marvell berlin BG4CT STB board.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
---
arch/arm64/boot/dts/m
On 23.11.2015 08:21, Jisheng Zhang wrote:
On Fri, 20 Nov 2015 22:06:59 +0100
Sebastian Hesselbarth wrote:
On 20.11.2015 09:42, Jisheng Zhang wrote:
Add syspll, mempll, cpupll, gateclk and berlin-clk nodes.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
---
[...]
+
On 20.11.2015 10:47, Jisheng Zhang wrote:
> The Marvell Berlin BG4CT SoC has 4 TWSI which are compatible with the
> Synopsys DesignWare I2C driver. Add the corresponding nodes.
>
> Signed-off-by: Jisheng Zhang
> ---
> arch/arm64/boot/dts/marvell/berlin4ct.dtsi | 52
>
On 20.11.2015 10:47, Jisheng Zhang wrote:
> Enable all i2c nodes for the Marvell berlin BG4CT STB board.
>
> Signed-off-by: Jisheng Zhang
> ---
> arch/arm64/boot/dts/marvell/berlin4ct-stb.dts | 50
> +++
> 1 file changed, 50 insertions(+)
>
> diff --git
On 20.11.2015 09:42, Jisheng Zhang wrote:
> Add syspll, mempll, cpupll, gateclk and berlin-clk nodes.
>
> Signed-off-by: Jisheng Zhang
> ---
> arch/arm64/boot/dts/marvell/berlin4ct.dtsi | 38
> ++
> 1 file changed, 38 insertions(+)
>
> diff --git
On 20.11.2015 09:42, Jisheng Zhang wrote:
> This patch supports the gateclk and berlin-clk in berlin4ct SoC.
>
> Signed-off-by: Jisheng Zhang
> ---
> drivers/clk/berlin/Makefile| 2 +-
> drivers/clk/berlin/clk-berlin4ct.c | 97
> ++
> 2 files
On 20.11.2015 09:42, Jisheng Zhang wrote:
> Add common clk driver for Marvell SoCs newer than BG2, BG2CD, BG2Q.
> berlin_clk_setup() is provided to setup and register such kind of clks.
>
> Signed-off-by: Jisheng Zhang
> ---
> drivers/clk/berlin/Makefile | 2 +-
> drivers/clk/berlin/clk.c
On 20.11.2015 09:42, Jisheng Zhang wrote:
> Add pll driver for Marvell SoCs newer than BG2, BG2CD, BG2Q.
>
> Signed-off-by: Jisheng Zhang
> ---
> drivers/clk/berlin/Makefile | 1 +
> drivers/clk/berlin/pll.c| 133
>
> 2 files changed, 134
On 20.11.2015 04:34, Jisheng Zhang wrote:
> On Thu, 19 Nov 2015 21:47:05 +0100
> Sebastian Hesselbarth wrote:
>> On 16.11.2015 12:09, Jisheng Zhang wrote:
>>> The Marvell Berlin BG2Q has 3 watchdogs which are compatible with the
>>> snps,dw-wdt driver sit in the
get
* all outputs running.
*/
After you fixed the style issue, you can add my
Acked-by: Sebastian Hesselbarth
Thanks!
+ si5351_reg_write(hwdata->drvdata, SI5351_PLL_RESET,
+SI5351_PLL_RESET_A | SI5351_PLL_RESET_B);
+
dev_dbg(>drvdata->client->de
usually is:
/*
* Do a PLL soft reset on both PLLs required to get
* all outputs running.
*/
After you fixed the style issue, you can add my
Acked-by: Sebastian Hesselbarth <sebastian.hesselba...@gmail.com>
Thanks!
+ si5351_reg_write(hwdata->drvdata, SI5351_PLL_RES
On 20.11.2015 09:42, Jisheng Zhang wrote:
> Add pll driver for Marvell SoCs newer than BG2, BG2CD, BG2Q.
>
> Signed-off-by: Jisheng Zhang
> ---
> drivers/clk/berlin/Makefile | 1 +
> drivers/clk/berlin/pll.c| 133
>
> 2
On 20.11.2015 04:34, Jisheng Zhang wrote:
> On Thu, 19 Nov 2015 21:47:05 +0100
> Sebastian Hesselbarth wrote:
>> On 16.11.2015 12:09, Jisheng Zhang wrote:
>>> The Marvell Berlin BG2Q has 3 watchdogs which are compatible with the
>>> snps,dw-wdt driver sit in the
On 20.11.2015 09:42, Jisheng Zhang wrote:
> Add common clk driver for Marvell SoCs newer than BG2, BG2CD, BG2Q.
> berlin_clk_setup() is provided to setup and register such kind of clks.
>
> Signed-off-by: Jisheng Zhang
> ---
> drivers/clk/berlin/Makefile | 2 +-
>
On 20.11.2015 09:42, Jisheng Zhang wrote:
> This patch supports the gateclk and berlin-clk in berlin4ct SoC.
>
> Signed-off-by: Jisheng Zhang
> ---
> drivers/clk/berlin/Makefile| 2 +-
> drivers/clk/berlin/clk-berlin4ct.c | 97
>
On 20.11.2015 09:42, Jisheng Zhang wrote:
> Add syspll, mempll, cpupll, gateclk and berlin-clk nodes.
>
> Signed-off-by: Jisheng Zhang
> ---
> arch/arm64/boot/dts/marvell/berlin4ct.dtsi | 38
> ++
> 1 file changed, 38 insertions(+)
>
> diff
On 20.11.2015 10:47, Jisheng Zhang wrote:
> Enable all i2c nodes for the Marvell berlin BG4CT STB board.
>
> Signed-off-by: Jisheng Zhang
> ---
> arch/arm64/boot/dts/marvell/berlin4ct-stb.dts | 50
> +++
> 1 file changed, 50 insertions(+)
>
> diff
On 20.11.2015 10:47, Jisheng Zhang wrote:
> The Marvell Berlin BG4CT SoC has 4 TWSI which are compatible with the
> Synopsys DesignWare I2C driver. Add the corresponding nodes.
>
> Signed-off-by: Jisheng Zhang
> ---
> arch/arm64/boot/dts/marvell/berlin4ct.dtsi | 52
>
On 19.11.2015 14:40, Jacob Siverskog wrote:
> This is according to figure 12 ("I2C Programming Procedure") in
> "Si5351A/B/C Data Sheet"
> (https://www.silabs.com/Support%20Documents/TechnicalDocs/Si5351-B.pdf).
>
> Without the PLL soft reset, we were unable to get three outputs
> working at the
On 16.11.2015 12:37, Jisheng Zhang wrote:
> The firmware can support PSCI-1.0 in fact. This change also enables
> suspend to ram on Marvell berlin arm64 SoC.
>
> Signed-off-by: Jisheng Zhang
Appled to berlin64/dt.
Thanks!
> ---
> arch/arm64/boot/dts/marvell/berlin4ct.dtsi | 2 +-
> 1 file
> ...
> }
> //
>
> Signed-off-by: Julia Lawall
Acked-by: Sebastian Hesselbarth
Thanks!
> ---
> drivers/phy/phy-berlin-sata.c | 20 ++--
> 1 file changed, 14 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/phy/phy-berlin-sata.c b/dr
On 16.11.2015 12:09, Jisheng Zhang wrote:
> The Marvell Berlin BG2Q has 3 watchdogs which are compatible with the
> snps,dw-wdt driver sit in the sysmgr domain. This patch adds the
> corresponding device tree nodes.
>
> Signed-off-by: Jisheng Zhang
> ---
> arch/arm/boot/dts/berlin2q.dtsi | 24
On 16.11.2015 11:56, Jisheng Zhang wrote:
> Add or fix the optional clock property, then remove the CLK_IGNORE_UNUSED
> flag for sdio clk(s).
>
> This is a partialy resend of
> http://lists.infradead.org/pipermail/linux-arm-kernel/2015-October/379457.html
>
> patch3, patch4 has been merged.
On 16.11.2015 11:46, Jisheng Zhang wrote:
> The default interrupt-parent has been set in the upper layer, apb@e8
> and apb@fc for example. So if the interrupt-parent isn't changed, we
> don't need to set it again. This patch removes the dumplicated
> interrupt-parent settings.
>
>
On 16.11.2015 11:43, Jisheng Zhang wrote:
> The eMMC is non-removable so is marked with the non-removable DT
> property to avoid having to redetect it after a suspend/resume.
>
> But it also has the broken-cd property which is wrong since only
> one of the DT properties for card detection should
for 2/3) to berlin/doc that
I can send a PR for to Jonathan.
If Jonathan prefers to pick-up the patches himself, feel free
to add my
Acked-by: Sebastian Hesselbarth
Sebastian
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