Display information in probe regarding PHY configuration parameters like
single link or multilink protocol information along with number of lanes
used for each protocol link.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 32 +--
1 file
Add multilink support for DP. This needs changes in functions
configuring default single link DP with master lane 0 to support
non-zero master lane values and associated PLL configurations.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 498
Add PHY input reference clock frequency as a new dimension to select proper
register configuration.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 830 +++---
1 file changed, 422 insertions(+), 408 deletions(-)
diff --git a/drivers/phy/cadence
Add PHY registers for single link DP in array format to simplify
code and to improve readability.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 450 +-
1 file changed, 274 insertions(+), 176 deletions(-)
diff --git a/drivers/phy/cadence/phy
PIPE PHY status is used to communicate the completion of several PHY
functions. Check if PHY is ready for operation while configured for
PIPE mode during startup.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 60 +++
1 file changed, 60
Torrent PHY supports different input reference clock frequencies.
Register configurations will be different based on reference clock value.
Prepare driver to support register configs for multiple reference clocks.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 51
Reorder some functions to avoid function declarations. Also, remove
unnecessary line breaks while moving. No functional change.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 305 +-
1 file changed, 121 insertions(+), 184 deletions(-)
diff
Reorder some functions to avoid function declarations.
No functional change.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 250 +++---
1 file changed, 123 insertions(+), 127 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b
Reorder some functions to avoid function declarations.
No functional change.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 474 +++---
1 file changed, 229 insertions(+), 245 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b
This patch series enables Torrent PHY driver to support different input
reference clock frequencies. It also adds support for multilink
multiprotocol DisplayPort configuration. Currently, PCIe + DP multilink
register sequences are added.
Swapnil Jakhade (14):
phy: cadence-torrent: Remove use of
Add PHY configuration registers for DP with 100MHz ref clock and NO_SSC.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 162 ++
1 file changed, 162 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence
Torrent PHY driver currently supports single link DP configuration.
Prepare driver to support multilink DP configurations by adding
separate functions for common initialization sequence.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 53 +++
1
-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 32 +++
1 file changed, 32 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence-torrent.c
index e4dd8d1711a6..44e28ea8ffa7 100644
--- a/drivers/phy/cadence/phy
Add PCIe + DP no SSC multilink configuration sequences.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 131 ++
1 file changed, 131 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence
Script checkpatch with --strict option gives message:
CHECK: Avoid CamelCase:
CHECK: Avoid CamelCase:
Fix this by removing CamelCase usage. No functional change.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 24 +++
1 file changed, 12
/20210222112314.10772-1-kis...@ti.com/
Kishon Vijay Abraham I (2):
phy: ti: j721e-wiz: Add support for configuring QSGMII
phy: cadence-torrent: Update SGMII/QSGMII configuration specific to TI
Swapnil Jakhade (2):
phy: cadence-torrent: Update PCIe + QSGMII config for correct PLL1
clock
Update PCIe + USB register sequences for correct PLL1 clock configuration.
Also, update sequences for other USB configurations with dependent changes.
Signed-off-by: Swapnil Jakhade
Signed-off-by: Kishon Vijay Abraham I
---
drivers/phy/cadence/phy-cadence-torrent.c | 47
From: Kishon Vijay Abraham I
Update SGMII/QSGMII configuration specific to TI.
Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 58 +--
1 file changed, 44 insertions(+), 14 deletions(-)
diff --git a
From: Kishon Vijay Abraham I
Configure MAC clock dividers required for QSGMII to be functional.
Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Swapnil Jakhade
---
drivers/phy/ti/phy-j721e-wiz.c | 64 --
1 file changed, 62 insertions(+), 2 deletions
-by: Swapnil Jakhade
Signed-off-by: Kishon Vijay Abraham I
---
drivers/phy/cadence/phy-cadence-torrent.c | 77 ++-
1 file changed, 49 insertions(+), 28 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence-torrent.c
index
Add Cadence Sierra PHY bindings in YAML format.
Signed-off-by: Swapnil Jakhade
---
.../bindings/phy/phy-cadence-sierra.txt | 70
.../bindings/phy/phy-cadence-sierra.yaml | 152 ++
2 files changed, 152 insertions(+), 70 deletions(-)
delete mode 100644
ty in YAML.
- Remove cdns_mhdp_link_probe function to remove
duplication of reading dpcd capabilities.
Swapnil Jakhade (2):
drm: bridge: Add support for Cadence MHDP8546 DPI/DP bridge
drm: bridge: cdns-mhdp8546: Add TI J721E wrapper
Yuti Amonkar (1):
dt-bindings: drm/bridge: Docume
From: Yuti Amonkar
Document the bindings used for the Cadence MHDP8546 DPI/DP bridge in
yaml format.
Signed-off-by: Yuti Amonkar
Signed-off-by: Swapnil Jakhade
Reviewed-by: Rob Herring
Reviewed-by: Laurent Pinchart
---
.../display/bridge/cdns,mhdp8546.yaml | 169
: Swapnil Jakhade
Reviewed-by: Laurent Pinchart
---
drivers/gpu/drm/bridge/Kconfig|2 +
drivers/gpu/drm/bridge/Makefile |1 +
drivers/gpu/drm/bridge/cadence/Kconfig| 11 +
drivers/gpu/drm/bridge/cadence/Makefile |3 +
.../drm/bridge/cadence/cdns
Add J721E wrapper for mhdp, which sets up the clock and data muxes.
Signed-off-by: Jyri Sarha
Signed-off-by: Yuti Amonkar
Signed-off-by: Swapnil Jakhade
Reviewed-by: Tomi Valkeinen
Reviewed-by: Laurent Pinchart
---
drivers/gpu/drm/bridge/cadence/Kconfig| 13
drivers/gpu/drm
Add definition for QSGMII phy type.
Signed-off-by: Swapnil Jakhade
Acked-by: Rob Herring
---
include/dt-bindings/phy/phy.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/phy/phy.h b/include/dt-bindings/phy/phy.h
index 36e8c241cf48..887a31b250a8 100644
--- a/include/dt
Add support for PHY APB reset and make it optional.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence-torrent.c
index
Add USB + SGMII/QSGMII multilink configuration sequences.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 254 ++
1 file changed, 254 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence
Include PHY_PLL_CFG as a first register value to configure in
link_cmn_vals array values.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 22 ++
1 file changed, 18 insertions(+), 4 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence
Add support for single link SGMII/QSGMII configuration.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 89 +++
1 file changed, 89 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence
Add support to configure link_cmn_vals and xcvr_diag_vals in case of single
link PHY configuration.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 44 +++
1 file changed, 44 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
Check if cmn_ready is set after both PLL0 and PLL1 are locked.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 31 ++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy
For multilink configuration, deassert PHY and link reset after PHY
registers are configured in probe and only check link status in
power_on callback.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 28 +--
1 file changed, 21 insertions(+), 7
Add PCIe + USB Unique SSC multilink configuration sequences.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 216 ++
1 file changed, 216 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence
Prepare and enable clock in probe instead of phy_init.
Also, remove phy_exit callback.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 41 ++-
1 file changed, 17 insertions(+), 24 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence
Add single link PCIe register sequences in Torrent PHY driver.
Also, add support for getting SSC type from DT.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 296 +++---
1 file changed, 266 insertions(+), 30 deletions(-)
diff --git a/drivers/phy
should be applied on
top of this.
[1] https://lkml.org/lkml/2020/9/16/668
Version History:
v3:
- Rebased on latest PHY next and new PHY patch series [1]
v2:
- Rebased on latest PHY next and new PHY patch series [1] and [2]
Swapnil Jakhade (13):
phy: cadence-torrent: Add single link
Add support for single link USB configuration.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 260 +-
1 file changed, 259 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence
+ SGMII/QSGMII Unique SSC PHY multilink
configurations are added.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 783 +-
1 file changed, 757 insertions(+), 26 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence
Enable support for multiple subnodes in torrent PHY to
include multi-link combinations.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 15 ---
1 file changed, 15 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy
Add binding to specify Spread Spectrum Clocking mode used.
Signed-off-by: Swapnil Jakhade
Reviewed-by: Rob Herring
---
.../bindings/phy/phy-cadence-torrent.yaml | 9 +
include/dt-bindings/phy/phy-cadence-torrent.h | 13 +
2 files changed, 22 insertions
Use devm_platform_ioremap_resource() to get register addresses instead of
boilerplate code.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b
Added separate functions for regmap initialization of torrent PHY
generic registers and DP specific registers.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 99 +++
1 file changed, 66 insertions(+), 33 deletions(-)
diff --git a/drivers/phy
patch series.
Version History:
v3:
- Rebased on latest PHY next
- Fixed v2 review comments for DT patch 7/7
v2:
- Rebased on latest PHY next and new PHY attributes patch series [1]
Swapnil Jakhade (7):
phy: cadence-torrent: Use of_device_get_match_data() to get driver
data
Add checking if total number of lanes for all subnodes is not greater than
number of lanes supported by PHY.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 19 +++
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/drivers/phy/cadence
Use of_device_get_match_data() to get driver data instead of boilerplate
code.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy
Torrent PHY can be used in different multi-link multi-protocol
configurations including protocols other than DisplayPort also,
such as PCIe, USB, SGMII, QSGMII etc. Update the bindings to have
support for these configurations.
Signed-off-by: Swapnil Jakhade
---
.../bindings/phy/phy-cadence
Add J721E wrapper for mhdp, which sets up the clock and data muxes.
Signed-off-by: Jyri Sarha
Signed-off-by: Yuti Amonkar
Signed-off-by: Swapnil Jakhade
Reviewed-by: Tomi Valkeinen
Reviewed-by: Laurent Pinchart
---
drivers/gpu/drm/bridge/cadence/Kconfig| 13
drivers/gpu/drm
ty strings to cdns,num-lanes
and cdns,max-bit-rate.
v2:
- Use enum in compatible property of YAML file.
- Add reg-names property to YAML file
- Add minItems and maxItems to reg property in YAML.
- Remove cdns_mhdp_link_probe function to remove
duplication of reading dpcd capabilities.
Swapnil
From: Yuti Amonkar
Document the bindings used for the Cadence MHDP8546 DPI/DP bridge in
yaml format.
Signed-off-by: Yuti Amonkar
Signed-off-by: Swapnil Jakhade
Reviewed-by: Rob Herring
Reviewed-by: Laurent Pinchart
---
.../display/bridge/cdns,mhdp8546.yaml | 154
: Swapnil Jakhade
Reviewed-by: Laurent Pinchart
---
drivers/gpu/drm/bridge/Kconfig|2 +
drivers/gpu/drm/bridge/Makefile |1 +
drivers/gpu/drm/bridge/cadence/Kconfig| 11 +
drivers/gpu/drm/bridge/cadence/Makefile |3 +
.../drm/bridge/cadence/cdns
Add new PHY attribute max_link_rate to struct phy_attrs. This indicates
maximum link rate supported by PHY (in Mbps).
Signed-off-by: Yuti Amonkar
Signed-off-by: Swapnil Jakhade
Acked-by: Kishon Vijay Abraham I
---
include/linux/phy/phy.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a
:
- Implemented single pair of functions to get/set all PHY attributes
Swapnil Jakhade (2):
phy: Add new PHY attribute max_link_rate
phy: cadence-torrent: Set Torrent PHY attributes
drivers/phy/cadence/phy-cadence-torrent.c | 4
include/linux/phy/phy.h | 2 ++
2 files changed
Set Torrent PHY attributes bus_width, max_link_rate and mode
for DisplayPort.
Signed-off-by: Swapnil Jakhade
Acked-by: Kishon Vijay Abraham I
---
drivers/phy/cadence/phy-cadence-torrent.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b
From: Yuti Amonkar
Document the bindings used for the Cadence MHDP8546 DPI/DP bridge in
yaml format.
Signed-off-by: Yuti Amonkar
Signed-off-by: Swapnil Jakhade
Reviewed-by: Rob Herring
Reviewed-by: Laurent Pinchart
---
.../display/bridge/cdns,mhdp8546.yaml | 154
Add J721E wrapper for mhdp, which sets up the clock and data muxes.
Signed-off-by: Jyri Sarha
Signed-off-by: Yuti Amonkar
Signed-off-by: Swapnil Jakhade
Reviewed-by: Tomi Valkeinen
Reviewed-by: Laurent Pinchart
---
drivers/gpu/drm/bridge/cadence/Kconfig| 13
drivers/gpu/drm
: Swapnil Jakhade
---
drivers/gpu/drm/bridge/Kconfig|2 +
drivers/gpu/drm/bridge/Makefile |1 +
drivers/gpu/drm/bridge/cadence/Kconfig| 11 +
drivers/gpu/drm/bridge/cadence/Makefile |3 +
.../drm/bridge/cadence/cdns-mhdp8546-core.c | 2548
nItems and maxItems to reg property in YAML.
- Remove cdns_mhdp_link_probe function to remove
duplication of reading dpcd capabilities.
Swapnil Jakhade (2):
drm: bridge: Add support for Cadence MHDP8546 DPI/DP bridge
drm: bridge: cdns-mhdp8546: Add TI J721E wrapper
Yuti Amonkar (1):
dt-bindings:
Add support to configure link_cmn_vals and xcvr_diag_vals in case of single
link PHY configuration.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 44 +++
1 file changed, 44 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
Include PHY_PLL_CFG as a first register value to configure in
link_cmn_vals array values.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 22 ++
1 file changed, 18 insertions(+), 4 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence
Prepare and enable clock in probe instead of phy_init.
Also, remove phy_exit callback.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 41 ++-
1 file changed, 17 insertions(+), 24 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence
Add PCIe + USB Unique SSC multilink configuration sequences.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 216 ++
1 file changed, 216 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence
Add USB + SGMII/QSGMII multilink configuration sequences.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 254 ++
1 file changed, 254 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence
Add support for single link USB configuration.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 260 +-
1 file changed, 259 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence
[2] and should be applied on
top of these.
[1] https://lkml.org/lkml/2020/8/24/1586
[2] https://lkml.org/lkml/2020/8/27/667
Version History:
v2:
- Rebased on latest PHY next and new PHY patch series [1] and [2]
Swapnil Jakhade (13):
phy: cadence-torrent: Add single link PCIe support
phy
Check if cmn_ready is set after both PLL0 and PLL1 are locked.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 31 ++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy
Add support for single link SGMII/QSGMII configuration.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 89 +++
1 file changed, 89 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence
Add single link PCIe register sequences in Torrent PHY driver.
Also, add support for getting SSC type from DT.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 296 +++---
1 file changed, 266 insertions(+), 30 deletions(-)
diff --git a/drivers/phy
For multilink configuration, deassert PHY and link reset after PHY
registers are configured in probe and only check link status in
power_on callback.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 28 +--
1 file changed, 21 insertions(+), 7
+ SGMII/QSGMII Unique SSC PHY multilink
configurations are added.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 783 +-
1 file changed, 757 insertions(+), 26 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence
Add definition for QSGMII phy type.
Signed-off-by: Swapnil Jakhade
Acked-by: Rob Herring
---
include/dt-bindings/phy/phy.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/phy/phy.h b/include/dt-bindings/phy/phy.h
index 36e8c241cf48..887a31b250a8 100644
--- a/include/dt
Add support for PHY APB reset and make it optional.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence-torrent.c
index
Use of_device_get_match_data() to get driver data instead of boilerplate
code.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy
Add binding to specify Spread Spectrum Clocking mode used.
Signed-off-by: Swapnil Jakhade
Reviewed-by: Rob Herring
---
.../bindings/phy/phy-cadence-torrent.yaml | 9 +
include/dt-bindings/phy/phy-cadence-torrent.h | 13 +
2 files changed, 22 insertions
Use devm_platform_ioremap_resource() to get register addresses instead of
boilerplate code.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b
Enable support for multiple subnodes in torrent PHY to
include multi-link combinations.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 15 ---
1 file changed, 15 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy
Add checking if total number of lanes for all subnodes is not greater than
number of lanes supported by PHY.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 19 +++
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/drivers/phy/cadence
patch series.
This patch series is dependent on PHY attributes patch series [1].
[1] https://lkml.org/lkml/2020/8/24/1586
Version History:
v2:
- Rebased on latest PHY next and new PHY attributes patch series [1]
Swapnil Jakhade (7):
phy: cadence-torrent: Use of_device_get_match_data() t
Added separate functions for regmap initialization of torrent PHY
generic registers and DP specific registers.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 99 +++
1 file changed, 66 insertions(+), 33 deletions(-)
diff --git a/drivers/phy
Torrent PHY can be used in different multi-link multi-protocol
configurations including protocols other than DisplayPort also,
such as PCIe, USB, SGMII, QSGMII etc. Update the bindings to have
support for these configurations.
Signed-off-by: Swapnil Jakhade
---
.../bindings/phy/phy-cadence
- Change commit log a bit
v2:
- Implemented single pair of functions to get/set all PHY attributes
Swapnil Jakhade (2):
phy: Add new PHY attribute max_link_rate and APIs to get/set PHY
attributes
phy: cadence-torrent: Use kernel PHY API to set PHY attributes
drivers/phy/cadence
Add new PHY attribute max_link_rate to struct phy_attrs.
Add a pair of PHY APIs to get/set all the PHY attributes.
Use phy_get_attrs() to get attribute values and phy_set_attrs()
to set attribute values.
Signed-off-by: Yuti Amonkar
Signed-off-by: Swapnil Jakhade
Acked-by: Kishon Vijay Abraham I
Use generic PHY framework function phy_set_attrs() to set number
of lanes and maximum link rate supported by PHY.
Signed-off-by: Swapnil Jakhade
Acked-by: Kishon Vijay Abraham I
---
drivers/phy/cadence/phy-cadence-torrent.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/phy
+ SGMII/QSGMII Unique SSC PHY multilink
configurations are added.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 783 +-
1 file changed, 757 insertions(+), 26 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence
Prepare and enable clock in probe instead of phy_init.
Also, remove phy_exit callback.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 41 ++-
1 file changed, 17 insertions(+), 24 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence
Include PHY_PLL_CFG as a first register value to configure in
link_cmn_vals array values.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 22 ++
1 file changed, 18 insertions(+), 4 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence
Add support for single link SGMII/QSGMII configuration.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 89 +++
1 file changed, 89 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence
Add support for PHY APB reset and make it optional.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence-torrent.c
index
Add PCIe + USB Unique SSC multilink configuration sequences.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 216 ++
1 file changed, 216 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence
[2] and should be applied on
top of these.
[1] https://lkml.org/lkml/2020/7/17/158
[2] https://lkml.org/lkml/2020/8/7/338
Swapnil Jakhade (13):
phy: cadence-torrent: Add single link PCIe support
phy: cadence-torrent: Check cmn_ready assertion during PHY power on
phy: cadence-torrent: Add
Add USB + SGMII/QSGMII multilink configuration sequences.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 254 ++
1 file changed, 254 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence
For multilink configuration, deassert PHY and link reset after PHY
registers are configured in probe and only check link status in
power_on callback.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 28 +--
1 file changed, 21 insertions(+), 7
Add support for single link USB configuration.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 260 +-
1 file changed, 259 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence
Check if cmn_ready is set after both PLL0 and PLL1 are locked.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 31 ++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy
Add support to configure link_cmn_vals and xcvr_diag_vals in case of single
link PHY configuration.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 44 +++
1 file changed, 44 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
Add definition for QSGMII phy type.
Signed-off-by: Swapnil Jakhade
---
include/dt-bindings/phy/phy.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/phy/phy.h b/include/dt-bindings/phy/phy.h
index 36e8c241cf48..887a31b250a8 100644
--- a/include/dt-bindings/phy/phy.h
Add single link PCIe register sequences in Torrent PHY driver.
Also, add support for getting SSC type from DT.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 296 +++---
1 file changed, 266 insertions(+), 30 deletions(-)
diff --git a/drivers/phy
Use of_device_get_match_data() to get driver data instead of boilerplate
code.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy
Torrent PHY can be used in different multi-link multi-protocol
configurations including protocols other than DisplayPort also,
such as PCIe, USB, SGMII, QSGMII etc. Update the bindings to have
support for these configurations.
Signed-off-by: Swapnil Jakhade
---
.../bindings/phy/phy-cadence
supported. It also updates DT bindings accordingly.
Support for different multilink configurations with register sequences for
protocols above will be added in a separate patch series.
This patch series is dependent on PHY patch series [1].
[1] https://lkml.org/lkml/2020/7/17/158
Swapnil Jakhade
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