runtime calls]
Signed-off-by: Vivek Gautam
---
drivers/iommu/arm-smmu.c | 96
1 file changed, 88 insertions(+), 8 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index c8b16f53f597..3d6a1875431f 100644
--- a/drivers/iommu
On Fri, Feb 23, 2018 at 9:10 PM, Jordan Crouse wrote:
> On Fri, Feb 23, 2018 at 04:06:39PM +0530, Vivek Gautam wrote:
>> On Fri, Feb 23, 2018 at 5:22 AM, Jordan Crouse
>> wrote:
>> > On Wed, Feb 07, 2018 at 04:01:19PM +0530, Vivek Gautam wrote:
>> >> Fro
On Fri, Feb 23, 2018 at 5:22 AM, Jordan Crouse wrote:
> On Wed, Feb 07, 2018 at 04:01:19PM +0530, Vivek Gautam wrote:
>> From: Sricharan R
>>
>> The smmu device probe/remove and add/remove master device callbacks
>> gets called when the smmu is not linked to its mas
Hi,
On Thu, Feb 22, 2018 at 7:42 PM, Tomasz Figa wrote:
> On Thu, Feb 22, 2018 at 10:45 PM, Robin Murphy wrote:
>> [sorry, I had intended to reply sooner but clearly forgot]
>>
>>
>> On 16/02/18 00:13, Tomasz Figa wrote:
>>>
>>> On Fri, Feb 16, 2018 at 2:14 AM, Robin Murphy
>>> wrote:
On Wed, Feb 14, 2018 at 2:46 PM, Tomasz Figa wrote:
Adding Jordan to this thread as well.
> On Wed, Feb 14, 2018 at 6:13 PM, Vivek Gautam
> wrote:
>> Hi Tomasz,
>>
>> On Wed, Feb 14, 2018 at 11:08 AM, Tomasz Figa wrote:
>>> On Wed, Feb 14, 2018 at 1:17 PM,
On 1/24/2018 7:19 PM, Robin Murphy wrote:
On 24/01/18 10:35, Jeffy Chen wrote:
From: Tomasz Figa
Current code relies on master driver enabling necessary clocks before
IOMMU is accessed, however there are cases when the IOMMU should be
accessed while the master is not running yet, for example
Hi Tomasz,
On Wed, Feb 14, 2018 at 11:08 AM, Tomasz Figa wrote:
> On Wed, Feb 14, 2018 at 1:17 PM, Vivek Gautam
> wrote:
>> Hi Tomasz,
>>
>> On Wed, Feb 14, 2018 at 8:31 AM, Tomasz Figa wrote:
>>> On Wed, Feb 14, 2018 at 11:13 AM, Rob Clark wrote:
>>>
Hi Tomasz,
On Tue, Feb 13, 2018 at 1:54 PM, Tomasz Figa wrote:
> Hi Vivek,
>
> Thanks for the patch. Please see my comments inline.
>
> On Wed, Feb 7, 2018 at 7:31 PM, Vivek Gautam
> wrote:
>> From: Sricharan R
>>
>> The smmu device probe/remove and add/re
On Tue, Feb 13, 2018 at 7:22 PM, Tomasz Figa wrote:
> On Tue, Feb 13, 2018 at 9:57 PM, Robin Murphy wrote:
>> On 13/02/18 08:24, Tomasz Figa wrote:
>>>
>>> Hi Vivek,
>>>
>>> Thanks for the patch. Please see my comments inline.
>>>
>&
, Tomasz Figa wrote:
>>>>> Hi Vivek,
>>>>>
>>>>> Thanks for the patch. Please see my comments inline.
>>>>>
>>>>> On Wed, Feb 7, 2018 at 7:31 PM, Vivek Gautam
>>>>> wrote:
>>>>>> While
Hi Tomasz,
Please find my response inline below.
On Tue, Feb 13, 2018 at 1:33 PM, Tomasz Figa wrote:
> Hi Vivek,
>
> Thanks for the patch. Please see some comments inline.
>
> On Wed, Feb 7, 2018 at 7:31 PM, Vivek Gautam
> wrote:
>> From: Sricharan R
>>
>
Hi Tomasz,
On Tue, Feb 13, 2018 at 2:01 PM, Tomasz Figa wrote:
> Hi Vivek,
>
> Thanks for the patch. Please see my comments inline.
Thanks for reviewing the patch series.
>
> On Wed, Feb 7, 2018 at 7:31 PM, Vivek Gautam
> wrote:
>> From: Sricharan R
>>
>>
qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
clock and power requirements. This smmu core is used with
multiple masters on msm8996, viz. mdss, video, etc.
Add bindings for the same.
Signed-off-by: Vivek Gautam
Reviewed-by: Rob Herring
---
Changes in v8:
- Added the missing
-off-by: Vivek Gautam
---
drivers/iommu/arm-smmu.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index c024f69c1682..c7e924d553bd 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -215,6 +215,9
qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
clock and power requirements. This smmu core is used with
multiple masters on msm8996, viz. mdss, video, etc.
Add bindings for the same.
Signed-off-by: Vivek Gautam
Reviewed-by: Rob Herring
---
.../devicetree/bindings/iommu/arm
() calls, to power-up
the connected iommu through the device link interface.
In case the device link is not setup these get/put_suppliers()
calls will be a no-op, and the iommu driver should take care of
powering on its devices accordingly.
Signed-off-by: Vivek Gautam
---
drivers/gpu/drm/msm
runtime calls]
Signed-off-by: Vivek Gautam
---
drivers/iommu/arm-smmu.c | 42 ++
1 file changed, 38 insertions(+), 4 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 9e2f917e16c2..c024f69c1682 100644
--- a/drivers/iommu/arm
bulk of clocks]
Signed-off-by: Vivek Gautam
---
drivers/iommu/arm-smmu.c | 56 ++--
1 file changed, 54 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 69e7c60792a8..9e2f917e16c2 100644
--- a/drivers/
https://patchwork.kernel.org/patch/9827825/
Signed-off-by: Vivek Gautam
Acked-by: Rafael J. Wysocki
---
drivers/base/power/runtime.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c
index 8bef3cb2424d..5b8226c8af19 100644
--- a/drivers
atch/10102445/
[5] https://lkml.org/lkml/2018/1/19/217
Sricharan R (3):
iommu/arm-smmu: Add pm_runtime/sleep ops
iommu/arm-smmu: Invoke pm_runtime during probe, add/remove device
iommu/arm-smmu: Add the device_link between masters and smmu
Vivek Gautam (3):
base: power: runtime: Export pm_r
Hi Robin,
On Tue, Feb 6, 2018 at 5:22 PM, Robin Murphy wrote:
> Hi Vivek,
>
> On 06/02/18 10:16, Vivek Gautam wrote:
>>
>> SMMU_CBn_FSYNR0 definition from SMMU v2 architecture document
>> says that, the S1CBNDX[23:16] field is only valid if SMMU_IDR0.NTS==1.
>>
his patch -
arm-smmu 1500.apps-smmu: Unhandled context fault:
fsr=0x402, iova=0x9e0aa000, fsynr=0x20, cb=0
Signed-off-by: Vivek Gautam
Cc: Robin Murphy
---
Hi Robin,
Does it make sense to mask fsynr like this?
Would it still be confusing for CB==0?
Tagging the patch as RFC
Hi Robin,
On 2/5/2018 11:38 PM, Robin Murphy wrote:
On 05/02/18 17:59, Vivek Gautam wrote:
Unmap returns a size_t all throughout the IOMMU framework.
Make io-pgtable match this convention.
Moreover, there isn't a need to have a signed int return type
as we return 0 in case of failures.
Unmap returns a size_t all throughout the IOMMU framework.
Make io-pgtable match this convention.
Moreover, there isn't a need to have a signed int return type
as we return 0 in case of failures.
Signed-off-by: Vivek Gautam
---
drivers/iommu/io-pgtable-arm-v7s.c
On 2/1/2018 5:03 PM, Sricharan R wrote:
Hi Robin,
On 1/31/2018 6:36 PM, Robin Murphy wrote:
On 19/01/18 11:43, Vivek Gautam wrote:
From: Sricharan R
The smmu device probe/remove and add/remove master device callbacks
gets called when the smmu is not linked to its master, that is without
Hi,
On 1/31/2018 6:39 PM, Robin Murphy wrote:
On 19/01/18 11:43, Vivek Gautam wrote:
From: Sricharan R
Finally add the device link between the master device and
smmu, so that the smmu gets runtime enabled/disabled only when the
master needs it. This is done from add_device callback which
On 1/31/2018 5:53 PM, Robin Murphy wrote:
On 19/01/18 11:43, Vivek Gautam wrote:
From: Sricharan R
The smmu needs to be functional only when the respective
master's using it are active. The device_link feature
helps to track such functional dependencies, so that the
iommu gets powered
On 1/30/2018 1:12 AM, Rob Herring wrote:
On Fri, Jan 19, 2018 at 05:13:42PM +0530, Vivek Gautam wrote:
qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
clock and power requirements. This smmu core is used with
multiple masters on msm8996, viz. mdss, video, etc.
Add bindings for the
Hi Asutosh,
On 1/30/2018 10:11 AM, Asutosh Das wrote:
From: Subhash Jadavani
UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION is only applicable for QCOM UFS host
controller version 2.x.y and this has been fixed from version 3.x.y
onwards, hence this change removes this quirk for version 3.x.y onwards.
S
() calls, to power-up
the connected iommu through the device link interface.
In case the device link is not setup these get/put_suppliers()
calls will be a no-op, and the iommu driver should take care of
powering on its devices accordingly.
Signed-off-by: Vivek Gautam
---
drivers/gpu/drm/msm
qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
clock and power requirements. This smmu core is used with
multiple masters on msm8996, viz. mdss, video, etc.
Add bindings for the same.
Signed-off-by: Vivek Gautam
---
.../devicetree/bindings/iommu/arm,smmu.txt | 43
bulk of clocks]
Signed-off-by: Vivek Gautam
---
drivers/iommu/arm-smmu.c | 55 ++--
1 file changed, 53 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 78d4c6b8f1ba..21acffe91a1c 100644
--- a/drivers/
runtime calls]
Signed-off-by: Vivek Gautam
---
drivers/iommu/arm-smmu.c | 45 +
1 file changed, 41 insertions(+), 4 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 21acffe91a1c..95478bfb182c 100644
--- a/drivers/iommu/arm
https://patchwork.kernel.org/patch/9827825/
Signed-off-by: Vivek Gautam
Acked-by: Rafael J. Wysocki
---
drivers/base/power/runtime.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c
index 6e89b51ea3d9..06a2a88fe866 100644
--- a/drivers
From: Sricharan R
Finally add the device link between the master device and
smmu, so that the smmu gets runtime enabled/disabled only when the
master needs it. This is done from add_device callback which gets
called once when the master is added to the smmu.
Signed-off-by: Sricharan R
---
driv
Invoke pm_runtime during probe, add/remove device
iommu/arm-smmu: Add the device_link between masters and smmu
Vivek Gautam (3):
base: power: runtime: Export pm_runtime_get/put_suppliers
iommu/arm-smmu: Add support for qcom,smmu-v2 variant
drm/msm: iommu: Replace runtime calls with runtime s
TRL2 0x224
> +#defineQUSB2PHY_CHG_CTRL2 0x23c
nit: Replace these tabs with simple spaces.
Rest all look good.
Reviewed-by: Vivek Gautam
Thanks
Vivek
> +
> struct qusb2_phy_init_tbl {
> unsigned int offset;
> un
On Wed, Jan 3, 2018 at 4:58 PM, Manu Gautam wrote:
> New version of QUSB2 PHY has some registers offset changed.
> Add support to have register layout for a target and update
> the same in phy_configuration.
>
> Signed-off-by: Manu Gautam
> ---
LGTM.
Reviewed-by: Vivek Gauta
On Fri, Jan 12, 2018 at 2:16 PM, Manu Gautam wrote:
> Hi Vivek,
>
>
> On 1/12/2018 2:14 PM, Vivek Gautam wrote:
>> On Wed, Jan 3, 2018 at 4:58 PM, Manu Gautam wrote:
>>> PHY block or asynchronous reset requires signal
>>> to be asserted before de-asserting. Dr
t_list[i]);
> + goto err_rst_assert;
> + }
> }
>
> - for (i = 0; i < cfg->num_resets; i++) {
> + for (i = cfg->num_resets - 1; i >= 0; i--) {
Do we a dependency on the order in which these resets are
applied?
If
on and init for QUSB2 PHY
> need to be executed together always, hence remove
> poweron callback from phy_ops and explicitly perform
> this from init, similar changes needed for poweroff.
>
> Signed-off-by: Manu Gautam
> ---
Looks good.
Reviewed-by: Vivek Gautam
Thanks
Vivek
On Wed, Jan 3, 2018 at 4:58 PM, Manu Gautam wrote:
> PHY regulators which are enabled from power_on() must be ON
> before turning-on clocks and initializing it as part of init().
> As most of the core drivers perform power_on() after init(), move
> PHY regulators enable to com_init() and use power
Hi Manu,
On Wed, Jan 3, 2018 at 4:58 PM, Manu Gautam wrote:
> New revision (v3) of QMP PHY uses different offsets
> for almost all of the registers. Hence, move these
> definitions to header file so that updated offsets
> can be added for QMP v3.
>
> Signed-off-by: Manu Gautam
> ---
> drivers/p
On 01/12/2018 04:23 AM, Rafael J. Wysocki wrote:
On Tue, Jan 9, 2018 at 11:01 AM, Vivek Gautam
wrote:
The device link allows the pm framework to tie the supplier and
consumer. So, whenever the consumer is powered-on the supplier
is powered-on first.
There are however cases in which the
Hi Rob,
On 01/12/2018 03:53 AM, Rob Herring wrote:
On Tue, Jan 09, 2018 at 03:31:48PM +0530, Vivek Gautam wrote:
qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
clock and power requirements. This smmu core is used with
multiple masters on msm8996, viz. mdss, video, etc.
Add
On 01/09/2018 04:53 PM, Rafael J. Wysocki wrote:
On Tuesday, January 9, 2018 11:01:43 AM CET Vivek Gautam wrote:
This series provides the support for turning on the arm-smmu's
clocks/power domains using runtime pm. This is done using the
recently introduced device links patches, which
/patch/9827825/
[5] https://patchwork.kernel.org/patch/10102445/
Sricharan R (3):
iommu/arm-smmu: Add pm_runtime/sleep ops
iommu/arm-smmu: Invoke pm_runtime during probe, add/remove device
iommu/arm-smmu: Add the device_link between masters and smmu
Vivek Gautam (3):
base: power: runtime: Ex
() calls, to power-up
the connected iommu through the device link interface.
In case the device link is not setup these get/put_suppliers()
calls will be a no-op, and the iommu driver should take care of
powering on its devices accordingly.
Signed-off-by: Vivek Gautam
---
* New patch added in
From: Sricharan R
Finally add the device link between the master device and
smmu, so that the smmu gets runtime enabled/disabled only when the
master needs it. This is done from add_device callback which gets
called once when the master is added to the smmu.
Signed-off-by: Sricharan R
---
driv
qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
clock and power requirements. This smmu core is used with
multiple masters on msm8996, viz. mdss, video, etc.
Add bindings for the same.
Signed-off-by: Vivek Gautam
---
* Major change in this patch -
Changed compatible string from
bulk of clocks]
Signed-off-by: Vivek Gautam
---
drivers/iommu/arm-smmu.c | 55 ++--
1 file changed, 53 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 78d4c6b8f1ba..21acffe91a1c 100644
--- a/drivers/
runtime calls]
Signed-off-by: Vivek Gautam
---
drivers/iommu/arm-smmu.c | 45 +
1 file changed, 41 insertions(+), 4 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 21acffe91a1c..95478bfb182c 100644
--- a/drivers/iommu/arm
https://patchwork.kernel.org/patch/9827825/
Signed-off-by: Vivek Gautam
---
* This is v2 of the patch [1]. Adding it to this patch series.
[1] https://patchwork.kernel.org/patch/10102447/
drivers/base/power/runtime.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/base/power/runtim
Hi Rafael,
On Wed, Jan 3, 2018 at 5:31 PM, Rafael J. Wysocki wrote:
> On Friday, December 8, 2017 6:03:37 PM CET Vivek Gautam wrote:
>> On Fri, Dec 8, 2017 at 7:37 PM, Rafael J. Wysocki wrote:
>> > On Fri, Dec 8, 2017 at 2:39 PM, Vivek Gautam
>> > wrote:
>> >
Hi Manu,
On Tue, Nov 21, 2017 at 2:53 PM, Manu Gautam wrote:
> From: Vivek Gautam
>
> Move from using array of clocks to clk_bulk_* APIs that
> are available now.
>
> Signed-off-by: Vivek Gautam
> Signed-off-by: Manu Gautam
> ---
> drivers/phy/q
On Fri, Dec 8, 2017 at 7:37 PM, Rafael J. Wysocki wrote:
> On Fri, Dec 8, 2017 at 2:39 PM, Vivek Gautam
> wrote:
>> Hi Greg,
>>
>>
>> On Fri, Dec 8, 2017 at 6:51 PM, Greg KH wrote:
>>> On Fri, Dec 08, 2017 at 06:00:47PM +0530, Vivek Gautam wrote:
>>
Hi Greg,
On Fri, Dec 8, 2017 at 6:51 PM, Greg KH wrote:
> On Fri, Dec 08, 2017 at 06:00:47PM +0530, Vivek Gautam wrote:
>> The device link allows the pm framework to tie the supplier and
>> consumer. So, whenever the consumer is powered-on, the supplier
>> is powered-on f
.
[1] https://patchwork.kernel.org/patch/9827825/
Signed-off-by: Vivek Gautam
---
drivers/base/power/runtime.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c
index 027d159ac381..af169304ca13 100644
--- a/drivers/base/power/runtime.c
On 11/21/2017 02:53 PM, Manu Gautam wrote:
New version of QUSB2 PHY has some registers offset changed.
Add support to have register layout for a target and update
the same in phy_configuration.
Signed-off-by: Manu Gautam
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 131 ++
On 11/28/2017 05:13 AM, Rob Clark wrote:
On Mon, Nov 27, 2017 at 5:22 PM, Stephen Boyd wrote:
On 11/15, Vivek Gautam wrote:
Hi,
On Mon, Aug 7, 2017 at 5:59 PM, Rob Clark wrote:
On Mon, Aug 7, 2017 at 4:27 AM, Vivek Gautam
wrote:
On Thu, Jul 13, 2017 at 5:20 PM, Rob Clark wrote:
On
Hi,
On Mon, Aug 7, 2017 at 5:59 PM, Rob Clark wrote:
> On Mon, Aug 7, 2017 at 4:27 AM, Vivek Gautam
> wrote:
>> On Thu, Jul 13, 2017 at 5:20 PM, Rob Clark wrote:
>>> On Thu, Jul 13, 2017 at 1:35 AM, Sricharan R
>>> wrote:
>>>> Hi Vivek,
>>&
Set the phy mode based on the UFS HS PA mode. This lets the
controller let phy know the mode in which the PHY Adapter is
running and set the phy rates accordingly.
Signed-off-by: Vivek Gautam
Reviewed-by: Subhash Jadavani
---
Changes since v1:
- none.
drivers/scsi/ufs/ufs-qcom.c | 3 +++
1
Adding support to set desired UFS phy mode that can be set
from the host controller.
Signed-off-by: Vivek Gautam
---
Changes since v1:
- none.
drivers/phy/qualcomm/phy-qcom-ufs-i.h| 2 ++
drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.c | 14 ++
drivers/phy/qualcomm/phy-qcom
Refactor ufs_qcom_power_up_sequence() to get rid of ugly
exported phy APIs and use the phy_init() and phy_power_on()
to do the phy initialization.
Signed-off-by: Vivek Gautam
---
Changes since v1:
- The UFS phy retain state in low power mode. The phy can
enter the low power state and come
UFS phy has two modes for each High speed generation.
These modes are identified by two rates of operations -
Rate A, and Rate B.
Add these UFS phy modes to phy framework.
Signed-off-by: Vivek Gautam
---
Changes since v1:
- Rebased on linux-phy/next.
include/linux/phy/phy.h | 2 ++
1 file
Add definition for UFS phy type.
Signed-off-by: Vivek Gautam
---
Changes since v1:
- none.
include/dt-bindings/phy/phy.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/phy/phy.h b/include/dt-bindings/phy/phy.h
index 6c901930eb3e..d16e8755f6a9 100644
--- a/include/dt
for
the last patch if you find it good.
[1] https://lkml.org/lkml/2017/8/10/958
Vivek Gautam (5):
dt-bindings: phy: Add PHY_TYPE_UFS definition
phy: Add UFS PHY modes
phy: qcom-ufs: Add support to set phy mode
scsi/ufs: qcom: Set phy mode based on the controllers HS MODE
ufs/phy: qcom:
On 10/08/2017 06:06 PM, Anand Moon wrote:
Hi Krzysztof,
On 6 October 2017 at 12:08, Krzysztof Kozlowski wrote:
On Fri, Oct 6, 2017 at 6:36 AM, Anand Moon wrote:
update the usbdrd link control and phy contol clks.
The commit title and especially commit message should explain why you
are do
Hi Rob,
On 09/19/2017 07:40 PM, Rob Herring wrote:
Thanks for reviewing the patch.
On Tue, Sep 12, 2017 at 05:31:07PM +0530, Vivek Gautam wrote:
ARM MMU-500 implements a TBU (uTLB) for each connected master
besides a single TCU which controls and manages the address
translations. Each of
On 09/27/2017 04:14 AM, Subhash Jadavani wrote:
On 2017-08-03 23:48, Vivek Gautam wrote:
Set the phy mode based on the UFS HS PA mode. This lets the
controller let phy know the mode in which the PHY Adapter is
running and set the phy rates accordingly.
Signed-off-by: Vivek Gautam
Hi Subhash,
On Wed, Sep 27, 2017 at 4:43 AM, Subhash Jadavani
wrote:
> Hi Vivek,
>
> Please find one comment inline below, rest look good.
>
> Regards,
> Subhash
>
>
> On 2017-08-03 23:48, Vivek Gautam wrote:
>>
>> Refactor ufs_qcom_power_up_sequence()
long as it's available.
When the master is not available, the TBUs are identified with
sid and powered on.
Signed-off-by: Vivek Gautam
---
- The idea behind this patch is to handle the distributed smmu
architectures, similar to MMU-500.
- Untested yet.
- There are still few instances
On Fri, Aug 11, 2017 at 5:33 AM, Martin K. Petersen
wrote:
>
> Vivek,
>
>> Can you kindly review this patch series (for UFS controller changes)
>> and consider giving your Ack so that Kishon can pull in the series
>> through phy tree.
>
> SCSI piece looks OK.
Thank you Martin for your review.
>
>
Hi Martin, Subhash
On Wed, Aug 9, 2017 at 11:18 AM, Kishon Vijay Abraham I wrote:
> Vivek,
>
> On Tuesday 08 August 2017 09:20 PM, Vivek Gautam wrote:
>> Hi Koshon,
>>
>> On 2017-08-08 17:39, Kishon Vijay Abraham I wrote:
>>> Hi,
>>>
>>>
Hi Koshon,
On 2017-08-08 17:39, Kishon Vijay Abraham I wrote:
Hi,
On Friday 04 August 2017 12:18 PM, Vivek Gautam wrote:
Refactoring the qcom-ufs phy and host controller code to move
further towards the generic phy usage. Right now the qcom-ufs exports
a bunch of APIs that are used by the
On Thu, Jul 13, 2017 at 5:20 PM, Rob Clark wrote:
> On Thu, Jul 13, 2017 at 1:35 AM, Sricharan R wrote:
>> Hi Vivek,
>>
>> On 7/13/2017 10:43 AM, Vivek Gautam wrote:
>>> Hi Stephen,
>>>
>>>
>>> On 07/13/2017 04:24 AM, Stephen Boyd wr
Hi Robin,
On Fri, Aug 4, 2017 at 10:34 PM, Robin Murphy wrote:
> On 03/08/17 06:35, Vivek Gautam wrote:
>> Hi Robin,
>>
>>
>>
>> On 08/02/2017 05:47 PM, Robin Murphy wrote:
>>> On 02/08/17 10:53, Vivek Gautam wrote:
>>>> We don't want t
Add definition for UFS phy type.
Signed-off-by: Vivek Gautam
---
include/dt-bindings/phy/phy.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/phy/phy.h b/include/dt-bindings/phy/phy.h
index 6c901930eb3e..d16e8755f6a9 100644
--- a/include/dt-bindings/phy/phy.h
+++ b
Set the phy mode based on the UFS HS PA mode. This lets the
controller let phy know the mode in which the PHY Adapter is
running and set the phy rates accordingly.
Signed-off-by: Vivek Gautam
---
drivers/scsi/ufs/ufs-qcom.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/scsi/ufs
Adding support to set desired UFS phy mode that can be set
from the host controller.
Signed-off-by: Vivek Gautam
---
drivers/phy/qualcomm/phy-qcom-ufs-i.h| 2 ++
drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.c | 14 ++
drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.c | 14
Refactor ufs_qcom_power_up_sequence() to get rid of ugly
exported phy APIs and use the phy_init() and phy_power_on()
to do the phy initialization.
Signed-off-by: Vivek Gautam
---
drivers/phy/qualcomm/phy-qcom-ufs-i.h| 2 --
drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.c | 9
phy.
Host controller can direct the phy to set the respective configurations
based on the phy modes.
The patch-series has been tested with necessary dt patches on db820c.
Vivek Gautam (5):
dt-bindings: phy: Add PHY_TYPE_UFS definition
phy: Add UFS PHY modes
phy: qcom-ufs: Add support to set
UFS phy has two modes for each High speed generation.
These modes are identified by two rates of operations -
Rate A, and Rate B.
Add these UFS phy modes to phy framework.
Signed-off-by: Vivek Gautam
---
include/linux/phy/phy.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux
Hi Robin,
On 08/02/2017 05:47 PM, Robin Murphy wrote:
On 02/08/17 10:53, Vivek Gautam wrote:
We don't want to touch the TLB when smmu is suspended.
Defer it until resume.
Signed-off-by: Vivek Gautam
---
Hi all,
Here's the small patch in response of suggestion to defer tlb opera
We don't want to touch the TLB when smmu is suspended.
Defer it until resume.
Signed-off-by: Vivek Gautam
---
Hi all,
Here's the small patch in response of suggestion to defer tlb operations
when smmu is in suspend state.
The patch stores the TLB requests in 'unmap' whe
On Wed, Aug 2, 2017 at 10:39 AM, Kishon Vijay Abraham I wrote:
> Vivek,
>
> On Monday 31 July 2017 10:58 AM, Vivek Gautam wrote:
>> Hi Kishon,
>>
>>
>> On Tue, Jun 20, 2017 at 11:27 AM, Vivek Gautam
>> wrote:
>>> Fixing the clk enable failure path
Adding required device node for couple of DWC3 controllers
present on msm8996 chipset to enable High speed and Super
speed USB support.
Signed-off-by: Vivek Gautam
---
.../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi| 24 +
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 34
/msg29046.html
2) Dt binding fix for pipe clock source:
a. https://patchwork.kernel.org/patch/9870865/
b. https://patchwork.kernel.org/patch/9870871/
3) pmi8994 gpio support:
https://lkml.org/lkml/2017/7/28/346
Tested the series on dragonboard db820c target.
Vivek Gautam (4):
arm64: dts
Adding device node for QUSB2 phy and the required infrastructure
to enable support for the same. This phy is used by dwc3 controller
present on msm8996.
Signed-off-by: Vivek Gautam
---
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 8 +
arch/arm64/boot/dts/qcom/msm8996.dtsi| 51
Add required device node for QMP phy based 3-lane PCIe phy
present on msm8996 chipset to enable support for the same.
Signed-off-by: Vivek Gautam
---
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 4 ++
arch/arm64/boot/dts/qcom/msm8996.dtsi| 62
2 files
Adding required device node for USB3 QMP phy present on
msm8996 chipset to enable support for the same. This phy
provides super speed usb functionality for dwc3 controller
on msm8996.
Signed-off-by: Vivek Gautam
---
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 4
arch/arm64/boot/dts
* Register the pipe clock provided by phy.
-* See function description to see details of this pipe clock.
+* Register the pipe clock provided by phy. See function
+* description to see details of this pipe clock.
Is there some whitespace
On 07/31/2017 11:09 AM, Varadarajan Narayanan wrote:
IPQ8074 uses QMP phy controller that provides support to PCIe and
USB. Adding dt binding information for the same.
Signed-off-by: Varadarajan Narayanan
---
Reviewed-by: Vivek Gautam
Documentation/devicetree/bindings/phy/qcom-qmp
Hi Kishon,
On Tue, Jun 20, 2017 at 11:27 AM, Vivek Gautam
wrote:
> Fixing the clk enable failure path in qcom_qmp_phy_init()
> and cleanup the reset control deassertion failure path in
> qcom_qmp_phy_com_init().
>
> Fixes: e78f3d15e115 ("phy: qcom-qmp: new qmp phy driv
Signed-off-by: Vivek Gautam
---
Changes since v1:
- Added "qcom,spmi-gpio" to the compatible.
arch/arm64/boot/dts/qcom/pmi8994.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/pmi8994.dtsi
b/arch/arm64/boot/dts/qcom/pmi8994.
Update the binding doc for qcom pmi8994-gpio devices.
Signed-off-by: Vivek Gautam
---
- Have been testing this patch-set on db820c for extcon with
usb controller. The usb controller uses one of these gpios
for usb-id/vbus detection.
Changes since v1:
- Dropped "qcom,pmi8994
On Fri, Jul 28, 2017 at 2:30 AM, Stephen Boyd wrote:
> On 07/26/2017 11:30 PM, Vivek Gautam wrote:
>> Signed-off-by: Vivek Gautam
>> ---
>> arch/arm64/boot/dts/qcom/pmi8994.dtsi | 17 +
>> 1 file changed, 17 insertions(+)
>>
>> diff --git
Signed-off-by: Vivek Gautam
---
arch/arm64/boot/dts/qcom/pmi8994.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/pmi8994.dtsi
b/arch/arm64/boot/dts/qcom/pmi8994.dtsi
index d3879a4e8076..3b04ca63c31e 100644
--- a/arch/arm64/boot/dts/qcom
Update the bindings doc and driver for pmi8994-gpio devices.
Signed-off-by: Vivek Gautam
---
- Have been using this patch-set on db820c [1] for extcon with
usb controller. The usb controller uses one of these gpios
for usb-id/vbus detection.
[1] https://github.com/boddob/linux/tree/for
On 07/21/2017 05:06 PM, Varadarajan Narayanan wrote:
Add definitions required to enable QMP phy support for IPQ8074.
Signed-off-by: smuthayy
Signed-off-by: Varadarajan Narayanan
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 124
1 file changed, 124 inserti
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