Tested on the Meson-A1.
Tested-by: Xingyu Chen
On 2020/5/5 11:13, Evan Benn wrote:
From: Julius Werner
This patch adds a watchdog driver that can be used on ARM systems
with the appropriate watchdog implemented in Secure Monitor firmware.
The driver communicates with firmware via a Secure
Hi, Guenter
On 2019/10/21 21:38, Guenter Roeck wrote:
On 10/21/19 1:03 AM, Xingyu Chen wrote:
Hi, Guenter
On 2019/10/21 0:56, Guenter Roeck wrote:
On 10/18/19 1:33 AM, Xingyu Chen wrote:
The watchdog controller on the Meson-A/C series SoCs is moved to secure
world, watchdog operation needs
Hi, Guenter
On 2019/10/21 0:56, Guenter Roeck wrote:
On 10/18/19 1:33 AM, Xingyu Chen wrote:
The watchdog controller on the Meson-A/C series SoCs is moved to secure
world, watchdog operation needs to be done in secure EL3 mode via ATF,
Non-secure world can call SMC instruction to trap to AFT
The watchdog controller on the Meson-A/C series SoCs is moved to secure
world, watchdog operation needs to be done in secure EL3 mode via ATF,
Non-secure world can call SMC instruction to trap to AFT for watchdog
operation.
Signed-off-by: Xingyu Chen
---
drivers/watchdog/Kconfig | 17
Enable secure watchdog controller for Meson-A1 SoC
Signed-off-by: Xingyu Chen
---
arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
index 7210ad0..047c323
The new SMC ID is used to access secure registers by meson secure
watchdog driver.
Signed-off-by: Xingyu Chen
---
drivers/firmware/meson/meson_sm.c | 1 +
include/linux/firmware/meson/meson_sm.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/firmware/meson/meson_sm.c
b
]:
- add a new dependency in Kconfig
- simplify/add the return operation
- remove useless ping operation when setting the timeout
- fix some return values
- fix the license statement
[0]:https://lore.kernel.org/linux-amlogic/1570874721-36077-1-git-send-email-xingyu.c...@amlogic.com
Xingyu Chen (4
The binding targets the Meson-A/C series compatible SoCs, in which the
watchdog registers are in secure world.
Signed-off-by: Xingyu Chen
---
.../bindings/watchdog/amlogic,meson-sec-wdt.yaml | 34 ++
1 file changed, 34 insertions(+)
create mode 100644
Documentation
Hi, Guenter
On 2019/10/14 21:49, Guenter Roeck wrote:
On 10/14/19 4:42 AM, Xingyu Chen wrote:
Hi, Guenter
Thanks for your review.
On 2019/10/12 22:29, Guenter Roeck wrote:
On 10/12/19 3:05 AM, Xingyu Chen wrote:
The watchdog controller on the Meson-A/C series SoCs is moved to secure
world
Hi, Guenter
Thanks for your review.
On 2019/10/12 22:29, Guenter Roeck wrote:
On 10/12/19 3:05 AM, Xingyu Chen wrote:
The watchdog controller on the Meson-A/C series SoCs is moved to secure
world, watchdog operation needs to be done in secure EL3 mode via ATF,
Non-secure world can call SMC
The binding targets the Meson-A/C series compatible SoCs, in which the
watchdog registers are in secure world.
Signed-off-by: Xingyu Chen
---
.../bindings/watchdog/amlogic,meson-sec-wdt.yaml | 34 ++
1 file changed, 34 insertions(+)
create mode 100644
Documentation
Enable secure watchdog controller for Meson-A1 SoC
Signed-off-by: Xingyu Chen
---
arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
index 7210ad0..047c323
The new SMC ID is used to access secure registers by meson secure
watchdog driver.
Signed-off-by: Xingyu Chen
---
drivers/firmware/meson/meson_sm.c | 1 +
include/linux/firmware/meson/meson_sm.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/firmware/meson/meson_sm.c
b
The watchdog controller on the Meson-A/C series SoCs is moved to secure
world, watchdog operation needs to be done in secure EL3 mode via ATF,
Non-secure world can call SMC instruction to trap to AFT for watchdog
operation.
Signed-off-by: Xingyu Chen
---
drivers/watchdog/Kconfig | 16
The watchdog controller on the Meson-A/C series SoCs is moved to secure world,
We have to call SMC instruction to trap the ATF for watchdog operation. These
operations are different from previous SoCs, so we introduce a new watchdog
driver to support this kind of SoCs.
Xingyu Chen (4):
firmware
is saved
to BIT[16-31] of the WATCHDOG_TCNT.
[0]: http://linux-meson.com
Fixes: 683fa50f0e18 ("watchdog: Add Meson GXBB Watchdog Driver")
Signed-off-by: Xingyu Chen
---
drivers/watchdog/meson_gxbb_wdt.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/driver
Add the reset controller device of Meson-A1 SoC family
Signed-off-by: Xingyu Chen
---
arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
index 7210ad0..1c588ab
Add DT bindings for the Meson-A1 SoC Reset Controller include file,
and also slightly update documentation.
Signed-off-by: Xingyu Chen
---
.../bindings/reset/amlogic,meson-reset.yaml| 1 +
include/dt-bindings/reset/amlogic,meson-a1-reset.h | 74 ++
2 files changed
-send-email-xingyu.c...@amlogic.com
Xingyu Chen (3):
arm64: dts: meson: add reset controller for Meson-A1 SoC
dt-bindings: reset: add bindings for the Meson-A1 SoC Reset Controller
reset: add support for the Meson-A1 SoC Reset Controller
.../bindings/reset/amlogic,meson-reset.yaml| 1
The number of RESET registers and offset of RESET_LEVEL register for
Meson-A1 are different from previous SoCs, In order to describe these
differences, we introduce the struct meson_reset_param.
Reviewed-by: Kevin Hilman
Reviewed-by: Neil Armstrong
Signed-off-by: Xingyu Chen
---
drivers/reset
Hi, Kevin
Thanks for your reminder
On 2019/9/26 6:57, Kevin Hilman wrote:
Hi Xingyu,
Xingyu Chen writes:
The number of RESET registers and offset of RESET_LEVEL register for
Meson-A1 are different from previous SoCs, In order to describe these
differences, we introduce the struct
Hi, Kevin
Thanks for your review
On 2019/9/26 6:55, Kevin Hilman wrote:
Xingyu Chen writes:
Add DT bindings for the Meson-A1 SoC Reset Controller include file,
and also slightly update documentation.
Signed-off-by: Xingyu Chen
Signed-off-by: Jianxin Pan
The order here doesn't look right
Add the reset controller device of Meson-A1 SoC family
Signed-off-by: Xingyu Chen
Signed-off-by: Jianxin Pan
---
arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
b/arch/arm64/boot/dts/amlogic/meson-a1
Add DT bindings for the Meson-A1 SoC Reset Controller include file,
and also slightly update documentation.
Signed-off-by: Xingyu Chen
Signed-off-by: Jianxin Pan
---
.../bindings/reset/amlogic,meson-reset.yaml| 1 +
include/dt-bindings/reset/amlogic,meson-a1-reset.h | 59
The number of RESET registers and offset of RESET_LEVEL register for
Meson-A1 are different from previous SoCs, In order to describe these
differences, we introduce the struct meson_reset_param.
Signed-off-by: Xingyu Chen
Signed-off-by: Jianxin Pan
Reviewed-by: Neil Armstrong
---
drivers
]
https://lore.kernel.org/linux-amlogic/1568276370-54181-1-git-send-email-jianxin@amlogic.com
[1]
https://lore.kernel.org/linux-amlogic/1568808746-1153-1-git-send-email-xingyu.c...@amlogic.com
Xingyu Chen (3):
arm64: dts: meson: add reset controller for Meson-A1 SoC
dt-bindings: reset: add
Hi, Neil
Thanks for your review
On 2019/9/18 20:39, Neil Armstrong wrote:
Hi,
On 18/09/2019 14:12, Xingyu Chen wrote:
Add DT bindings for the Meson-A1 SoC Reset Controller include file,
and also slightly update documentation.
Signed-off-by: Xingyu Chen
Signed-off-by: Jianxin Pan
-jianxin@amlogic.com
Xingyu Chen (3):
arm64: dts: meson: add reset controller for Meson-A1 SoC
dt-bindings: reset: add bindings for the Meson-A1 SoC Reset Controller
reset: add support for the Meson-A1 SoC Reset Controller
.../bindings/reset/amlogic,meson-reset.txt | 4 +-
arch
Add DT bindings for the Meson-A1 SoC Reset Controller include file,
and also slightly update documentation.
Signed-off-by: Xingyu Chen
Signed-off-by: Jianxin Pan
---
.../bindings/reset/amlogic,meson-reset.txt | 4 +-
include/dt-bindings/reset/amlogic,meson-a1-reset.h | 59
The number of RESET registers and offset of RESET_LEVEL register for
Meson-A1 are different from previous SoCs, In order to describe these
differences, we introduce the struct meson_reset_param.
Signed-off-by: Xingyu Chen
Signed-off-by: Jianxin Pan
---
drivers/reset/reset-meson.c | 35
Add the reset controller device of Meson-A1 SoC family
Signed-off-by: Xingyu Chen
Signed-off-by: Jianxin Pan
---
arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
b/arch/arm64/boot/dts/amlogic/meson-a1
the device data with Meson-AXG
[1]: https://lore.kernel.org/lkml/20181203061324.36248-1-xingyu.c...@amlogic.com
Xingyu Chen (2):
dt-bindings: interrupt-controller: New binding for Meson-G12A SoC
irqchip/meson-gpio: Add support for Meson-G12A SoC
.../bindings/interrupt-controller/amlogic,meson
on bank GPIOC
- 52:37 16 pins on bank BOOT
- 36:28 9 pins on bank GPIOH
- 27:12 16 pins on bank GPIOZ
- 11:012 pins in the AO domain
Change-Id: I977b19380b3dc730b5b81583178af743d0ba0338
Signed-off-by: Xingyu Chen
Signed-off-by: Jianxin Pan
---
drivers/irqchip/irq-meson-gpio.c | 1 +
1
the device data with Meson-AXG
[1]: https://lore.kernel.org/lkml/20181203061324.36248-1-xingyu.c...@amlogic.com
Xingyu Chen (2):
dt-bindings: interrupt-controller: New binding for Meson-G12A SoC
irqchip/meson-gpio: Add support for Meson-G12A SoC
.../bindings/interrupt-controller/amlogic,meson
on bank GPIOC
- 52:37 16 pins on bank BOOT
- 36:28 9 pins on bank GPIOH
- 27:12 16 pins on bank GPIOZ
- 11:012 pins in the AO domain
Change-Id: I977b19380b3dc730b5b81583178af743d0ba0338
Signed-off-by: Xingyu Chen
Signed-off-by: Jianxin Pan
---
drivers/irqchip/irq-meson-gpio.c | 1 +
1
Update the dt-binding document to support new compatible string for the
GPIO interrupt controller which found in Amlogic's Meson-G12A SoC.
Signed-off-by: Xingyu Chen
Signed-off-by: Jianxin Pan
---
.../bindings/interrupt-controller/amlogic,meson-gpio-intc.txt| 1 +
1 file changed, 1
Update the dt-binding document to support new compatible string for the
GPIO interrupt controller which found in Amlogic's Meson-G12A SoC.
Signed-off-by: Xingyu Chen
Signed-off-by: Jianxin Pan
---
.../bindings/interrupt-controller/amlogic,meson-gpio-intc.txt| 1 +
1 file changed, 1
On 2018/12/3 18:36, Jerome Brunet wrote:
On Mon, 2018-12-03 at 11:27 +0100, Neil Armstrong wrote:
Hi Xingyu,
On 03/12/2018 04:05, Xingyu Chen wrote:
Since Meson G12A SoC, Introduce new ao registers AO_RTI_PULL_UP_EN_REG
and AO_GPIO_O.
These bits of controlling output level are remapped
On 2018/12/3 18:36, Jerome Brunet wrote:
On Mon, 2018-12-03 at 11:27 +0100, Neil Armstrong wrote:
Hi Xingyu,
On 03/12/2018 04:05, Xingyu Chen wrote:
Since Meson G12A SoC, Introduce new ao registers AO_RTI_PULL_UP_EN_REG
and AO_GPIO_O.
These bits of controlling output level are remapped
On 2018/12/3 18:27, Neil Armstrong wrote:
Hi Xingyu,
On 03/12/2018 04:05, Xingyu Chen wrote:
Since Meson G12A SoC, Introduce new ao registers AO_RTI_PULL_UP_EN_REG
and AO_GPIO_O.
These bits of controlling output level are remapped to the new register
AO_GPIO_O, and the AO_GPIO_O_EN_N
On 2018/12/3 18:27, Neil Armstrong wrote:
Hi Xingyu,
On 03/12/2018 04:05, Xingyu Chen wrote:
Since Meson G12A SoC, Introduce new ao registers AO_RTI_PULL_UP_EN_REG
and AO_GPIO_O.
These bits of controlling output level are remapped to the new register
AO_GPIO_O, and the AO_GPIO_O_EN_N
On 2018/12/3 18:06, Neil Armstrong wrote:
On 03/12/2018 10:28, Xingyu Chen wrote:
On 2018/12/3 17:19, Jerome Brunet wrote:
On Mon, 2018-12-03 at 14:13 +0800, Xingyu Chen wrote:
The Meson-G12A SoC uses the same GPIO interrupt controller IP block as the
other Meson SoCs, A totle of 100
On 2018/12/3 18:06, Neil Armstrong wrote:
On 03/12/2018 10:28, Xingyu Chen wrote:
On 2018/12/3 17:19, Jerome Brunet wrote:
On Mon, 2018-12-03 at 14:13 +0800, Xingyu Chen wrote:
The Meson-G12A SoC uses the same GPIO interrupt controller IP block as the
other Meson SoCs, A totle of 100
On 2018/12/3 17:19, Jerome Brunet wrote:
On Mon, 2018-12-03 at 14:13 +0800, Xingyu Chen wrote:
The Meson-G12A SoC uses the same GPIO interrupt controller IP block as the
other Meson SoCs, A totle of 100 pins can be spied on, which is the sum of:
- 223:100 undefined (no interrupt)
- 99:97
On 2018/12/3 17:19, Jerome Brunet wrote:
On Mon, 2018-12-03 at 14:13 +0800, Xingyu Chen wrote:
The Meson-G12A SoC uses the same GPIO interrupt controller IP block as the
other Meson SoCs, A totle of 100 pins can be spied on, which is the sum of:
- 223:100 undefined (no interrupt)
- 99:97
Update the dt-binding document to support new compatible string for the
GPIO interrupt controller which found in Amlogic's Meson-G12A SoC.
Signed-off-by: Xingyu Chen
Signed-off-by: Jianxin Pan
---
.../bindings/interrupt-controller/amlogic,meson-gpio-intc.txt| 1 +
1 file changed, 1
on bank GPIOC
- 52:37 16 pins on bank BOOT
- 36:28 9 pins on bank GPIOH
- 27:12 16 pins on bank GPIOZ
- 11:012 pins in the AO domain
Signed-off-by: Xingyu Chen
Signed-off-by: Jianxin Pan
---
drivers/irqchip/irq-meson-gpio.c | 5 +
1 file changed, 5 insertions(+)
diff --git
Update the dt-binding document to support new compatible string for the
GPIO interrupt controller which found in Amlogic's Meson-G12A SoC.
Signed-off-by: Xingyu Chen
Signed-off-by: Jianxin Pan
---
.../bindings/interrupt-controller/amlogic,meson-gpio-intc.txt| 1 +
1 file changed, 1
on bank GPIOC
- 52:37 16 pins on bank BOOT
- 36:28 9 pins on bank GPIOH
- 27:12 16 pins on bank GPIOZ
- 11:012 pins in the AO domain
Signed-off-by: Xingyu Chen
Signed-off-by: Jianxin Pan
---
drivers/irqchip/irq-meson-gpio.c | 5 +
1 file changed, 5 insertions(+)
diff --git
This series try to add GPIO interrupt controller support for Meson-G12A SoCs.
Although the total number of pins is the same as the Meson-AXG SoC, the gpio
banks and irq numbers are different. To avoid confusion on use, i think the
new compatible string is needed.
Xingyu Chen (2):
dt-bindings
This series try to add GPIO interrupt controller support for Meson-G12A SoCs.
Although the total number of pins is the same as the Meson-AXG SoC, the gpio
banks and irq numbers are different. To avoid confusion on use, i think the
new compatible string is needed.
Xingyu Chen (2):
dt-bindings
se the same base address, but
can be identified by the offset.
Fixes: 29ae0952e85f ("pinctrl: meson-g12a: add pinctrl driver support")
Signed-off-by: Xingyu Chen
Signed-off-by: Jianxin Pan
---
drivers/pinctrl/meson/pinctrl-meson.c | 22 --
1 file changed, 12 insertion
se the same base address, but
can be identified by the offset.
Fixes: 29ae0952e85f ("pinctrl: meson-g12a: add pinctrl driver support")
Signed-off-by: Xingyu Chen
Signed-off-by: Jianxin Pan
---
drivers/pinctrl/meson/pinctrl-meson.c | 22 --
1 file changed, 12 insertion
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