On 2021/4/20 上午10:48, Huang Pei wrote:
Hi,
On Mon, Apr 19, 2021 at 10:21:40PM +0800, Zhou Yanjie wrote:
Hi
On 2021/4/19 下午12:56, Huang Pei wrote:
On Sat, Apr 17, 2021 at 12:45:59AM +0800, Zhou Yanjie wrote:
On 2021/4/16 下午5:20, 黄沛 wrote:
Is there any log about the panic?
Yes, below is
Hi,
On 2021/4/20 上午10:48, Huang Pei wrote:
Hi,
On Mon, Apr 19, 2021 at 10:21:40PM +0800, Zhou Yanjie wrote:
Hi
On 2021/4/19 下午12:56, Huang Pei wrote:
On Sat, Apr 17, 2021 at 12:45:59AM +0800, Zhou Yanjie wrote:
On 2021/4/16 下午5:20, 黄沛 wrote:
Is there any log about the panic?
Yes, below is
Hi
On 2021/4/19 下午12:56, Huang Pei wrote:
On Sat, Apr 17, 2021 at 12:45:59AM +0800, Zhou Yanjie wrote:
On 2021/4/16 下午5:20, 黄沛 wrote:
Is there any log about the panic?
Yes, below is the log:
[ 195.436017] CPU 0 Unable to handle kernel paging request at virtual
address 77eb8000, epc
Add support for probing the pinctrl-ingenic driver on the
JZ4755 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
Reviewed-by: Paul Cercueil
---
Notes:
v3:
New patch.
v3->v4:
1.Split LCD pins into several groups.
2.Drop "lcd
Add support for probing the pinctrl-ingenic driver on the
JZ4775 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
Reviewed-by: Paul Cercueil
---
Notes:
v3:
New patch.
v3->v4:
1.Split LCD pins into several groups.
2.Drop "lcd
Add support for probing the pinctrl-ingenic driver on the
X2000 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
Reviewed-by: Paul Cercueil
---
Notes:
v3:
New patch.
v3->v4:
1.Split LCD pins into several groups.
2.Drop "lcd
Add support for probing the pinctrl-ingenic driver on the
JZ4750 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
Reviewed-by: Paul Cercueil
---
Notes:
v3:
New patch.
v3->v4:
1.Use "lcd-special" and "lcd-generic"
register pairs which have
2 bits for each GPIO pin.
Tested-by: H. Nikolaus Schaller # on Letux400
Co-developed-by: Paul Boddie
Signed-off-by: Paul Boddie
Signed-off-by: H. Nikolaus Schaller
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
Reviewed-by: Paul Cercueil
---
Notes
1.Add DMIC pins support for the JZ4780 SoC.
2.Add DMIC pins support for the X1000 SoC.
3.Add DMIC pins support for the X1500 SoC.
4.Add DMIC pins support for the X1830 SoC.
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
v6:
New patch.
drivers/pinctrl/pinctrl-ingenic.c | 22
Add the pinctrl bindings for the JZ4730 SoC, the JZ4750 SoC,
the JZ4755 SoC, the JZ4775 SoC and the X2000 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Rob Herring
---
Notes:
v2:
New patch.
v2->v3:
No change.
v3->v4:
1.Add a descript
1.Move the "INGENIC_PIN_GROUP_FUNCS" to the macro definition section.
2.Add tabs before values to align the code in the macro definition section.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
Reviewed-by: Paul Cercueil
---
Notes:
v2:
New patch.
v2-&g
Add X1830 support in "ingenic_pinconf_get()", so that it can read the
configuration of X1830 SoC correctly.
Fixes: d7da2a1e4e08 ("pinctrl: Ingenic: Add pinctrl driver for X1830.")
Cc:
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
Reviewed-by: Paul Cercueil
Adjust the sequence of X1830's SSI related codes to make it consistent
with other Ingenic SoCs.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
Reviewed-by: Paul Cercueil
---
Notes:
v2:
New patch.
v2->v3:
Add Paul Cercueil's Reviewed-by.
e two interfaces supported by X1830 are respectively referred to as
"TFT interface" and "SLCD interface", so the "lcd-rgb-xxx" is replaced
with "lcd-tft-xxx" to avoid confusion.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Paul Cercueil
---
Notes:
The MII group of JZ4770's MAC should have 7 pins, add missing
pins to the MII group.
Fixes: 5de1a73e78ed ("Pinctrl: Ingenic: Add missing parts for JZ4770 and
JZ4780.")
Cc:
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
Reviewed-by: Paul Cercueil
---
Notes:
schmitt and slew.
v5->v6:
1.Add the missing lcd-24bit group.
2.Add DMIC pins support for Ingenic SoCs.
3.Adjust and simplify the code.
周琰杰 (Zhou Yanjie) (12):
pinctrl: Ingenic: Add missing pins to the JZ4770 MAC MII group.
pinctrl: Ingenic: Add support for read the pin configuratio
Hi Paul,
On 2021/4/17 下午6:12, Paul Cercueil wrote:
Hi Zhou,
Le sam. 17 avril 2021 à 0:14, 周琰杰 (Zhou Yanjie)
a écrit :
Add support for probing the pinctrl-ingenic driver on the
X2000 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
---
Notes:
v3
Hi Paul,
On 2021/4/17 下午5:49, Paul Cercueil wrote:
Hi Zhou,
Le sam. 17 avril 2021 à 0:14, 周琰杰 (Zhou Yanjie)
a écrit :
Add support for probing the pinctrl-ingenic driver on the
JZ4750 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
---
Notes:
v3
Add support for probing the pinctrl-ingenic driver on the
JZ4775 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
---
Notes:
v3:
New patch.
v3->v4:
1.Split lcd pins into several groups.
2.Drop "lcd-no-pins" which is pointless
Add support for probing the pinctrl-ingenic driver on the
X2000 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
---
Notes:
v3:
New patch.
v3->v4:
1.Split lcd pins into several groups.
2.Drop "lcd-no-pins" which is poi
Add support for probing the pinctrl-ingenic driver on the
JZ4755 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
---
Notes:
v3:
New patch.
v3->v4:
1.Split lcd pins into several groups.
2.Drop "lcd-no-pins" which is pointless
register pairs which have
2 bits for each GPIO pin.
Tested-by: H. Nikolaus Schaller # on Letux400
Co-developed-by: Paul Boddie
Signed-off-by: Paul Boddie
Signed-off-by: H. Nikolaus Schaller
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
---
Notes:
v3:
New patch
Add support for probing the pinctrl-ingenic driver on the
JZ4750 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
---
Notes:
v3:
New patch.
v3->v4:
1.Use "lcd-special" and "lcd-generic" instead "lcd-18bit-tft"
1.Move the "INGENIC_PIN_GROUP_FUNCS" to the macro definition section.
2.Add tabs before values to align the code in the macro definition section.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
Reviewed-by: Paul Cercueil
---
Notes:
v2:
New patch.
v2-&g
Add the pinctrl bindings for the JZ4730 SoC, the JZ4750 SoC,
the JZ4755 SoC, the JZ4775 SoC and the X2000 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Rob Herring
---
Notes:
v2:
New patch.
v2->v3:
No change.
v3->v4:
1.Add a descript
e two interfaces supported by X1830 are respectively referred to as
"TFT interface" and "SLCD interface", so the "lcd-rgb-xxx" is replaced
with "lcd-tft-xxx" to avoid confusion.
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
v4:
New patch.
v4-
Add X1830 support in "ingenic_pinconf_get()", so that it can read the
configuration of X1830 SoC correctly.
Fixes: d7da2a1e4e08 ("pinctrl: Ingenic: Add pinctrl driver for X1830.")
Cc:
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
Reviewed-by: Paul Cercueil
Adjust the sequence of X1830's SSI related codes to make it consistent
with other Ingenic SoCs.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
Reviewed-by: Paul Cercueil
---
Notes:
v2:
New patch.
v2->v3:
Add Paul Cercueil's Reviewed-by.
ointless.
4.Improve the structure of some functions.
5.Adjust function names to avoid confusion.
6.Use "lcd-special" and "lcd-generic" instead "lcd-xxbit-tft".
7.Replace "lcd-rgb-xxx" with "lcd-tft-xxx" to avoid confusion.
v4->v5:
Add suppor
The MII group of JZ4770's MAC should have 7 pins, add missing
pins to the MII group.
Fixes: 5de1a73e78ed ("Pinctrl: Ingenic: Add missing parts for JZ4770 and
JZ4780.")
Cc:
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
Reviewed-by: Paul Cercueil
---
Notes:
This reverts commit f685a533a7fab35c5d069dcd663f59c8e4171a75.
It cause kernel panic on Ingenic X1830, so let's revert it.
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
arch/mips/mm/cache.c | 31 ++-
1 file changed, 14 insertions(+), 17 deletions(-)
diff --git a/arch/mi
Add support for probing the pinctrl-ingenic driver on the
X2000 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
---
Notes:
v3:
New patch.
v3->v4:
1.Split lcd pins into several groups.
2.Drop "lcd-no-pins" which is poi
Add support for probing the pinctrl-ingenic driver on the
JZ4775 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
---
Notes:
v3:
New patch.
v3->v4:
1.Split lcd pins into several groups.
2.Drop "lcd-no-pins" which is pointle
Add support for probing the pinctrl-ingenic driver on the
JZ4755 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
---
Notes:
v3:
New patch.
v3->v4:
1.Split lcd pins into several groups.
2.Drop "lcd-no-pins" which is pointle
register pairs which have
2 bits for each GPIO pin.
Tested-by: H. Nikolaus Schaller # on Letux400
Co-developed-by: Paul Boddie
Signed-off-by: Paul Boddie
Signed-off-by: H. Nikolaus Schaller
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
---
Notes:
v3:
New patch
Add support for probing the pinctrl-ingenic driver on the
JZ4750 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
---
Notes:
v3:
New patch.
v3->v4:
1.Use "lcd-special" and "lcd-generic" instead "lcd-18bit-tft"
Add the pinctrl bindings for the JZ4730 SoC, the JZ4750 SoC,
the JZ4755 SoC, the JZ4775 SoC and the X2000 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Rob Herring
---
Notes:
v2:
New patch.
v2->v3:
No change.
v3->v4:
1.Add a descript
1.Move the "INGENIC_PIN_GROUP_FUNCS" to the macro definition section.
2.Add tabs before values to align the code in the macro definition section.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
Reviewed-by: Paul Cercueil
---
Notes:
v2:
New patch.
v2-&g
e two interfaces supported by X1830 are respectively referred to as
"TFT interface" and "SLCD interface", so the "lcd-rgb-xxx" is replaced
with "lcd-tft-xxx" to avoid confusion.
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
v4:
New patch.
drivers/pi
Adjust the sequence of X1830's SSI related codes to make it consistent
with other Ingenic SoCs.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
Reviewed-by: Paul Cercueil
---
Notes:
v2:
New patch.
v2->v3:
Add Paul Cercueil's Reviewed-by.
Add X1830 support in "ingenic_pinconf_get()", so that it can read the
configuration of X1830 SoC correctly.
Fixes: d7da2a1e4e08 ("pinctrl: Ingenic: Add pinctrl driver for X1830.")
Cc:
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
Reviewed-by: Paul Cercueil
The MII group of JZ4770's MAC should have 7 pins, add missing
pins to the MII group.
Fixes: 5de1a73e78ed ("Pinctrl: Ingenic: Add missing parts for JZ4770 and
JZ4780.")
Cc:
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
Reviewed-by: Paul Cercueil
---
Notes:
ointless.
4.Improve the structure of some functions.
5.Adjust function names to avoid confusion.
6.Use "lcd-special" and "lcd-generic" instead "lcd-xxbit-tft".
7.Replace "lcd-rgb-xxx" with "lcd-tft-xxx" to avoid confusion.
周琰杰 (Zhou Yanjie) (
Hi Wolfram,
On 2021/3/31 下午3:18, Wolfram Sang wrote:
Hi,
Any write operation? I wonder then why nobody noticed before?
The standard I2C communication should look like this:
Read:
device_addr + w, reg_addr, device_addr + r, data;
Write:
device_addr + w, reg_addr, data;
But without this
/r/CALCv0x2YqOXEAy2Q=hafjhHCtTHVodChv1qpM=niaxopqeb...@mail.gmail.com
Signed-off-by: Ilya Lipnitskiy
Cc: Hugh Dickins
Cc: "Eric W. Biederman"
Cc: sta...@vger.kernel.org
---
mm/memory.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Tested-by: 周琰杰 (Zhou Yanjie) # on
CU1000
Hi Ilya,
On 2021/3/29 上午10:48, Ilya Lipnitskiy wrote:
On Sat, Mar 20, 2021 at 8:59 AM Zhou Yanjie wrote:
Hi Ilya,
On 2021/3/3 下午11:55, Ilya Lipnitskiy wrote:
On Wed, Mar 3, 2021 at 7:50 AM Eric W. Biederman wrote:
Ilya Lipnitskiy writes:
On Tue, Mar 2, 2021 at 11:37 AM Eric W
Hi Paul,
On 2021/3/28 上午3:58, Paul Cercueil wrote:
Hi Zhou,
Le jeu. 25 mars 2021 à 17:03, Zhou Yanjie
a écrit :
Hi Paul,
On 2021/3/23 上午2:39, Paul Cercueil wrote:
Le mer. 17 mars 2021 à 17:58, 周琰杰 (Zhou Yanjie)
a écrit :
Add support for probing the pinctrl-ingenic driver on the
Hi Paul,
On 2021/3/28 上午2:30, Paul Cercueil wrote:
Hi Zhou,
Le jeu. 25 mars 2021 à 16:38, Zhou Yanjie
a écrit :
Hi,
On 2021/3/23 上午2:24, Paul Cercueil wrote:
Le mer. 17 mars 2021 à 17:58, 周琰杰 (Zhou Yanjie)
a écrit :
Add support for probing the pinctrl-ingenic driver on the
JZ4755
On 2021/3/23 上午2:25, Paul Cercueil wrote:
Le mer. 17 mars 2021 à 17:58, 周琰杰 (Zhou Yanjie)
a écrit :
Add support for probing the pinctrl-ingenic driver on the
JZ4775 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
v3:
New patch.
drivers/pinctrl/pinctrl-ingenic.c
Hi,
On 2021/3/23 上午2:24, Paul Cercueil wrote:
Le mer. 17 mars 2021 à 17:58, 周琰杰 (Zhou Yanjie)
a écrit :
Add support for probing the pinctrl-ingenic driver on the
JZ4755 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
v3:
New patch.
drivers/pinctrl/pinctrl
On 2021/3/23 上午2:20, Paul Cercueil wrote:
Le mer. 17 mars 2021 à 17:58, 周琰杰 (Zhou Yanjie)
a écrit :
Add support for probing the pinctrl-ingenic driver on the
JZ4750 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
v3:
New patch.
drivers/pinctrl/pinctrl-ingenic.c
Hi,
On 2021/3/23 上午1:58, Paul Cercueil wrote:
Le mer. 17 mars 2021 à 17:57, 周琰杰 (Zhou Yanjie)
a écrit :
Add X1830 support in "ingenic_pinconf_get()", so that it can read the
configuration of X1830 SoC correctly.
Fixes: d7da2a1e4e08 ("pinctrl: Ingenic: Add pinctrl d
Hi Paul,
On 2021/3/23 上午1:53, Paul Cercueil wrote:
Hi Zhou,
Le mer. 17 mars 2021 à 17:57, 周琰杰 (Zhou Yanjie)
a écrit :
The MII group of JZ4770's MAC should have 7 pins, add missing
pins to the MII group.
Fixes: 5de1a73e78ed ("Pinctrl: Ingenic: Add missing parts for JZ4770
On 2021/3/23 上午2:17, Paul Cercueil wrote:
Le mer. 17 mars 2021 à 17:58, 周琰杰 (Zhou Yanjie)
a écrit :
Add support for probing the pinctrl-ingenic driver on the
JZ4730 SoC from Ingenic.
This driver is derived from Paul Boddie. It is worth to
noting that the JZ4730 SoC is special in having
On 2021/3/23 上午2:01, Paul Cercueil wrote:
Le mer. 17 mars 2021 à 17:57, 周琰杰 (Zhou Yanjie)
a écrit :
Add the pinctrl bindings for the JZ4730 SoC, the JZ4750 SoC,
the JZ4755 SoC, the JZ4775 SoC and the X2000 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
v2:
New
Hi Paul,
On 2021/3/23 上午1:40, Paul Cercueil wrote:
Hi Zhou,
Le mer. 17 mars 2021 à 20:41, Zhou Yanjie
a écrit :
Hi Paul,
On 2021/3/7 下午10:17, Paul Cercueil wrote:
Add the CGU code and the compatible string to the TCU driver to support
the JZ4760 SoC.
Signed-off-by: Paul Cercueil
, CI20's OTG port has a great probability to
face overcurrent warning, which breaks the OTG functionality.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Signed-off-by: Dragan Čečavac
---
drivers/usb/dwc2/Kconfig | 6 ++
drivers/usb/dwc2/core.c | 9 +
2 files changed, 15 insertions(+)
diff --
Hi Ilya,
On 2021/3/3 下午11:55, Ilya Lipnitskiy wrote:
On Wed, Mar 3, 2021 at 7:50 AM Eric W. Biederman wrote:
Ilya Lipnitskiy writes:
On Tue, Mar 2, 2021 at 11:37 AM Eric W. Biederman wrote:
Ilya Lipnitskiy writes:
On Mon, Mar 1, 2021 at 12:43 PM Eric W. Biederman wrote:
Ilya Lipnitsk
For SoCs after X1000, only send "X1000_I2C_DC_STOP" when last byte,
or it will cause error when I2C write operation.
v1->v2:
1.Add missing Reported-by and Tested-by.
2.Remove change which not related to the bugfix.
周琰杰 (Zhou Yanjie) (1):
I2C: JZ4780: Fix bug for Ingenic X1000.
Only send "X1000_I2C_DC_STOP" when last byte, or it will cause
error when I2C write operation.
Fixes: 21575a7a8d4c ("I2C: JZ4780: Add support for the X1000.")
Reported-by: 杨文龙 (Yang Wenlong)
Tested-by: 杨文龙 (Yang Wenlong)
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
Hi Wolfram,
Sorry, please forgive my carefulness, I wrongly sent the version that
did not clean up, resulting in missing the reporter's information and
some errors in formats.
On 2021/3/19 上午1:06, Wolfram Sang wrote:
On Fri, Mar 19, 2021 at 12:25:43AM +0800, 周琰杰 (Zhou Yanjie) wrote:
Only send "X1000_I2C_DC_STOP" when last byte, or it will cause
error when I2C write operation.
Fixes: 21575a7a8d4c ("I2C: JZ4780: Add support for the X1000.")
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
drivers/i2c/busses/i2c-jz4780.c | 7 +++
1 file changed, 3 insertions(+),
For SoCs after X1000, only send "X1000_I2C_DC_STOP" when last byte,
or it will cause error when I2C write operation.
周琰杰 (Zhou Yanjie) (1):
I2C: JZ4780: Fix bug for Ingenic X1000.
drivers/i2c/busses/i2c-jz4780.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
--
2.7.4
Hi Paul,
On 2021/3/7 下午10:17, Paul Cercueil wrote:
Add the CGU code and the compatible string to the TCU driver to support
the JZ4760 SoC.
Signed-off-by: Paul Cercueil
---
drivers/clk/ingenic/Kconfig| 10 +
drivers/clk/ingenic/Makefile | 1 +
drivers/clk/ingenic/jz
Add support for probing the pinctrl-ingenic driver on the
JZ4750 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
v3:
New patch.
drivers/pinctrl/pinctrl-ingenic.c | 137 ++
1 file changed, 137 insertions(+)
diff --git a/drivers/pinctrl
register pairs which have
2 bits for each GPIO pin.
Tested-by: H. Nikolaus Schaller # on Letux400
Co-developed-by: Paul Boddie
Signed-off-by: Paul Boddie
Signed-off-by: H. Nikolaus Schaller
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
v3:
New patch.
drivers/pinctrl/pinctrl-ingenic.c
Add support for probing the pinctrl-ingenic driver on the
JZ4755 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
v3:
New patch.
drivers/pinctrl/pinctrl-ingenic.c | 132 ++
1 file changed, 132 insertions(+)
diff --git a/drivers/pinctrl
Add support for probing the pinctrl-ingenic driver on the
X2000 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
v3:
New patch.
drivers/pinctrl/pinctrl-ingenic.c | 502 +-
1 file changed, 493 insertions(+), 9 deletions(-)
diff --git a
Add support for probing the pinctrl-ingenic driver on the
JZ4775 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
v3:
New patch.
drivers/pinctrl/pinctrl-ingenic.c | 259 ++
1 file changed, 259 insertions(+)
diff --git a/drivers/pinctrl
1.Move the "INGENIC_PIN_GROUP_FUNCS" to the macro definition section.
2.Add tabs before values to align the code in the macro definition section.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Paul Cercueil
---
Notes:
v2:
New patch.
v2->v3:
Add Paul Cercueil&
Add the pinctrl bindings for the JZ4730 SoC, the JZ4750 SoC,
the JZ4755 SoC, the JZ4775 SoC and the X2000 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
v2:
New patch.
v2->v3:
No change.
.../bindings/pinctrl/ingenic,pinctrl.yaml |
Adjust the sequence of X1830's SSI related codes to make it consistent
with other Ingenic SoCs.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Paul Cercueil
---
Notes:
v2:
New patch.
v2->v3:
Add Paul Cercueil's Reviewed-by.
drivers/pinctrl/pinctrl-i
The MII group of JZ4770's MAC should have 7 pins, add missing
pins to the MII group.
Fixes: 5de1a73e78ed ("Pinctrl: Ingenic: Add missing parts for JZ4770 and
JZ4780.")
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
v2:
New patch.
v2->v3:
Add fixes tag.
Add X1830 support in "ingenic_pinconf_get()", so that it can read the
configuration of X1830 SoC correctly.
Fixes: d7da2a1e4e08 ("pinctrl: Ingenic: Add pinctrl driver for X1830.")
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
v2:
New patch.
v2->v3:
v1->v2:
1.Split [1/3] in v1 to [1/6] [2/6] [3/6] [4/6] in v2.
2.Fix the uninitialized warning.
v2->v3:
Split [6/6] in v2 to [6/10] [7/10] [8/10] [9/10] [10/10] in v3.
周琰杰 (Zhou Yanjie) (10):
pinctrl: Ingenic: Add missing pins to the JZ4770 MAC MII group.
pinctrl: Ingenic: Add suppo
Hi,
On 2021/3/12 下午9:42, Paul Cercueil wrote:
Hi Zhou,
Le jeu. 11 mars 2021 à 23:21, 周琰杰 (Zhou Yanjie)
a écrit :
Add support for probing the pinctrl-ingenic driver on the JZ4730 SoC,
the JZ4750 SoC, the JZ4755 SoC, the JZ4775 SoC and the X2000 SoC from
Ingenic.
The driver of JZ4730 is
Hi Paul,
On 2021/3/12 下午9:31, Paul Cercueil wrote:
Hi Zhou,
Le jeu. 11 mars 2021 à 23:21, 周琰杰 (Zhou Yanjie)
a écrit :
Add X1830 support in "ingenic_pinconf_get()", so that it can read the
configuration of X1830 SoC correctly.
Signed-off-by: 周琰杰 (Zhou Yanjie)
This is a fix, so
Hi Paul,
On 2021/3/12 下午9:05, Paul Cercueil wrote:
Hi,
Le jeu. 11 mars 2021 à 23:21, 周琰杰 (Zhou Yanjie)
a écrit :
The MII group of JZ4770's MAC should have 7 pins, add missing
pins to the MII group.
Signed-off-by: 周琰杰 (Zhou Yanjie)
No Fixes: tag?
And if the bug wasn't introduc
Add X1830 support in "ingenic_pinconf_get()", so that it can read the
configuration of X1830 SoC correctly.
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
v2:
New patch.
drivers/pinctrl/pinctrl-ingenic.c | 76 +--
1 file changed, 57 inserti
Add the pinctrl bindings for the JZ4730 SoC, the JZ4750 SoC,
the JZ4755 SoC, the JZ4775 SoC and the X2000 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
v1->v2:
No change.
.../bindings/pinctrl/ingenic,pinctrl.yaml | 23 ++
1 file changed,
add code to handle the jz4730 specific register offsets and some
register pairs have 2 bits for each GPIO pin.
Tested-by: H. Nikolaus Schaller # on Letux400/JZ4730
Signed-off-by: Paul Boddie # for JZ4730
Signed-off-by: H. Nikolaus Schaller # for JZ4730
Signed-off-by: 周琰杰 (Zhou Yanjie
v1->v2:
1.Split [1/3] in v1 to [1/6] [2/6] [3/6] [4/6] in v2.
2.Fix the uninitialized warning.
周琰杰 (Zhou Yanjie) (6):
pinctrl: Ingenic: Add missing pins to the JZ4770 MAC MII group.
pinctrl: Ingenic: Add support for read the pin configuration of X1830.
pinctrl: Ingenic: Adjust the seque
Adjust the sequence of X1830's SSI related codes to make it consistent
with other Ingenic SoCs.
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
v2:
New patch.
drivers/pinctrl/pinctrl-ingenic.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/pi
1.Move the "INGENIC_PIN_GROUP_FUNCS" to the macro definition section.
2.Add tabs before values to align the code in the macro definition section.
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
v2:
New patch.
drivers/pinctrl/pinctrl-inge
The MII group of JZ4770's MAC should have 7 pins, add missing
pins to the MII group.
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
v2:
New patch.
drivers/pinctrl/pinctrl-ingenic.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/pinctrl-ingenic
| 3 +++
2 files changed, 30 insertions(+), 13 deletions(-)
Tested-by: 周琰杰 (Zhou Yanjie) # on CU1000-neo/X1000E
diff --git a/drivers/clk/ingenic/cgu.c b/drivers/clk/ingenic/cgu.c
index 58f7ab5cf0fe..266c7595d330 100644
--- a/drivers/clk/ingenic/cgu.c
+++ b/drivers/clk/ingenic/cgu.c
Hi Paul,
On 2021/3/7 下午10:17, Paul Cercueil wrote:
Hi,
Here are a set of patches to add support for the Ingenic JZ4760(B) SoCs.
One thing to note is that the ingenic,jz4760-tcu is undocumented for now,
as I will update the TCU documentation in a different patchset.
Zhou: the CGU code now supp
Hi Paul,
On 2021/3/10 下午10:19, Paul Cercueil wrote:
Le mer. 10 mars 2021 à 16:03, Andy Shevchenko
a écrit :
On Tue, Mar 9, 2021 at 6:42 PM 周琰杰 (Zhou Yanjie)
wrote:
1.Add tabs before values to align the code in the macro definition
section.
2.Fix bugs related to the MAC of JZ4770, add
Hi Andy,
On 2021/3/10 下午10:03, Andy Shevchenko wrote:
On Tue, Mar 9, 2021 at 6:42 PM 周琰杰 (Zhou Yanjie)
wrote:
1.Add tabs before values to align the code in the macro definition section.
2.Fix bugs related to the MAC of JZ4770, add missing pins to the MII group.
3.Adjust the sequence of X1830
add code to handle the jz4730 specific register offsets and some
register pairs have 2 bits for each GPIO pin.
Tested-by: H. Nikolaus Schaller # on Letux400/JZ4730
Signed-off-by: Paul Boddie # for JZ4730
Signed-off-by: H. Nikolaus Schaller # for JZ4730
Signed-off-by: 周琰杰 (Zhou Yanjie
SoC, the JZ4775 SoC and the X2000 SoC from
Ingenic.
周琰杰 (Zhou Yanjie) (3):
pinctrl: Ingenic: Fix bug and reformat the code.
dt-bindings: pinctrl: Add bindings for new Ingenic SoCs.
pinctrl: Ingenic: Add support for new Ingenic SoCs.
.../bindings/pinctrl/ingenic,pinctrl.yaml |
Add the pinctrl bindings for the JZ4730 SoC, the JZ4750 SoC,
the JZ4755 SoC, the JZ4775 SoC and the X2000 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
.../bindings/pinctrl/ingenic,pinctrl.yaml | 23 ++
1 file changed, 19 insertions(+), 4 deletions(-)
diff
", so that it can read the configuration
of X1830 SoC correctly.
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
drivers/pinctrl/pinctrl-ingenic.c | 161 +++---
1 file changed, 100 insertions(+), 61 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-ingenic.c
b/
Hi Paul,
On 2021/3/7 下午10:17, Paul Cercueil wrote:
Hi,
Here are a set of patches to add support for the Ingenic JZ4760(B) SoCs.
One thing to note is that the ingenic,jz4760-tcu is undocumented for now,
as I will update the TCU documentation in a different patchset.
Zhou: the CGU code now supp
Hi Paul,
On 2021/3/7 下午10:17, Paul Cercueil wrote:
Hi,
Here are a set of patches to add support for the Ingenic JZ4760(B) SoCs.
One thing to note is that the ingenic,jz4760-tcu is undocumented for now,
as I will update the TCU documentation in a different patchset.
Zhou: the CGU code now supp
("PHY: Ingenic: Add USB PHY driver using generic PHY
framework.")
Signed-off-by: Alexander Lobakin
---
drivers/phy/ingenic/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Apologize for my carelessness, and
Tested-by: 周琰杰 (Zhou Yanjie)
Thanks and best regards!
: 周琰杰 (Zhou Yanjie)
Thanks and best regards!
diff --git a/drivers/phy/ingenic/phy-ingenic-usb.c
b/drivers/phy/ingenic/phy-ingenic-usb.c
index 4d1587d82286..ea127b177f46 100644
--- a/drivers/phy/ingenic/phy-ingenic-usb.c
+++ b/drivers/phy/ingenic/phy-ingenic-usb.c
@@ -82,18 +82,7 @@
#define
Hi Paul,
On 2020/12/23 下午8:39, Paul Cercueil wrote:
Hi Zhou,
Le lun. 21 déc. 2020 à 23:52, 周琰杰 (Zhou Yanjie)
a écrit :
1.When the clock does not have "CGU_CLK_MUX", the 2/3/4 bits in
parents do not need to be filled with -1. When the clock have
a "CGU_CLK_MUX" has o
Hi Paul,
On 2020/12/23 下午8:29, Paul Cercueil wrote:
Hi Zhou,
Le lun. 21 déc. 2020 à 23:52, 周琰杰 (Zhou Yanjie)
a écrit :
Add CIM, AIC, DMIC, I2S clocks for the X1000 SoC and the
X1830 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
v1->v2:
Add I2S clock for X1
Add CIM, AIC, DMIC, I2S clocks for the X1000 SoC and the
X1830 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
v1->v2:
Add I2S clock for X1000.
v2->v3:
Correct the comment in x1000-cgu.c, change it from
"Custom (SoC-specific) OTG PHY"
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