they stands for the swapped
connection.
Signed-off-by: Icenowy Zheng
---
Changes in v2:
- Change to use new endpoint reg definition.
drivers/gpu/drm/sun4i/sun4i_drv.c | 45
drivers/gpu/drm/sun4i/sun4i_tcon.c | 61 --
driver
Orange Pi PC features a 3.5mm jack with TV output in it.
Enable the TV output.
As it currently do not have jack detection feature, do not merge this
patch.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 12
1 file changed, 12 insertions(+)
diff
The CLK_PLL_DE is needed to be referenced in device tree for H3, for
both forcing the parent of PLL_DE.
So export it to the device tree binding header.
Signed-off-by: Icenowy Zheng
---
drivers/clk/sunxi-ng/ccu-sun8i-h3.h | 3 +--
include/dt-bindings/clock/sun8i-h3-ccu.h | 2 ++
2 files
.
Signed-off-by: Icenowy Zheng
---
Changes in v2:
- Changes according to new dt bindings.
arch/arm/boot/dts/sun8i-h3.dtsi | 186
1 file changed, 186 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index b36f9f423c39
Allwinner H3 features a "DE2.0" and a TV Encoder.
Add device tree bindings for the following parts:
- H3 TCONs
- H3 Mixers
- The connection between H3 TCONs and H3 Mixers
- H3 TV Encoder
- H3 Display engine
Signed-off-by: Icenowy Zheng
---
Changes in v2:
- Changed endpoint reg def
Thus the TV
output shouldn't be defaultly enabled now.
Icenowy Zheng (11):
dt-bindings: update the binding for Allwinner H3 TVE support
drm: sun4i: add support for H3 mixers
drm: sun4i: ignore swapped mixer<->tcon connection for DE2
drm: sun4i: add support for H3's TCON
hen-Yu Tsai napisal(a):
> > > On Sat, May 20, 2017 at 2:23 AM, Jernej Škrabec
> > wrote:
> > > > Hi,
> > > >
> > > > Dne petek, 19. maj 2017 ob 20:08:18 CEST je Icenowy Zheng napisal(a):
> > > >> 于 2017年5月20日 GMT+08:00 上午2:03:30, Maxim
在 2017-05-24 16:14，Maxime Ripard 写道：
On Sat, May 20, 2017 at 02:00:22AM +0800, Icenowy Zheng wrote:
于 2017年5月20日 GMT+08:00 上午1:57:53, Maxime Ripard
写到:
>On Thu, May 18, 2017 at 12:43:46AM +0800, Icenowy Zheng wrote:
>> Some SoC's DE2 has two mixers. Defaultly the mixer0 i
From: Icenowy Zheng
SoPine is a SoM by Pine64, which have a gold finger compatible with the
slot of DDR3 SODIMM (signals are not compatible), and have an A64, an
AXP803, a LPDDR3 DRAM chip, a power led and a MicroSD slot on it.
The card detect pin of the MicroSD slot on the SoM is pulled down
From: Icenowy Zheng
Pine64 have made an official baseboard when SoPine SoM is out.
The official baseboard is like the original Pine64 -- but with SD card
slot replaced with Pine64's eMMC module slot.
Add a device tree for SoPine with the baseboard.
Signed-off-by: Icenowy Zheng
---
在 2017-06-01 02:43，Maxime Ripard 写道：
On Wed, May 24, 2017 at 04:25:46PM +0800, Icenowy Zheng wrote:
于 2017年5月24日 GMT+08:00 下午3:30:19, Maxime Ripard
写到:
>On Tue, May 23, 2017 at 09:00:59PM +0800, icen...@aosc.io wrote:
>> 在 2017-05-23 20:53，Maxime Ripard 写道：
>> > On Mon,
在 2017-05-31 01:42，Jagan Teki 写道：
From: Jagan Teki
NanoPi M1 Plus is designed and developed by FriendlyElec
using the Allwinner 64-bit H5 SOC.
Copy'n'paste error?
NanoPi Neo2 key features
- Allwinner H5, Quad-core 64-bit Cortex-A53
- 512MB DDR3 RAM
- microSD slot
- 10/100/1000M Ethernet
-
于 2017年5月30日 GMT+08:00 上午3:30:26, Jagan Teki 写到:
>From: Jagan Teki
>
>from BPI(BIPAI KEJI LIMITED) products the Bananapi board
>is named as 'Bananapi M1' and this is the starting
>bananapi board from M1 series.
>
>So rename dts and suffix 'M1' on model for the same,
>so-that next sequence on ba
在 2017-05-29 21:11，Chen-Yu Tsai 写道：
On Sat, May 27, 2017 at 06:23:04PM +0800, Icenowy Zheng wrote:
R40 is said to be an upgrade of A20, and its pin configuration is also
similar to A20 (and thus similar to A10).
Add support for R40 to the A10 pinctrl driver.
Signed-off-by: Icenowy Zheng
在 2017-05-29 16:59，Maxime Ripard 写道：
On Thu, May 25, 2017 at 10:28:24PM +0800, Icenowy Zheng wrote:
>>>> + compatible = "allwinner,sun8i-v3s-de2-mixer";
>>>> + reg = <0x0110 0x10>;
>>>
>>
在 2017-04-16 14:51，Icenowy Zheng 写道：
A new usbid of UTV007 is found in a newly bought device.
The usbid is 1f71:3301.
The ID on the chip is:
UTV007
A89029.1
1520L18K1
Both video and audio is tested with the modified usbtv driver.
Signed-off-by: Icenowy Zheng
Acked-by: Lubomir Rintel
Ping
retains most if not all features from the A20, while adding
some new features, such as MIPI DSI output, or updating various
hardware blocks, such as DE 2.0.
Signed-off-by: Chen-Yu Tsai
Signed-off-by: Icenowy Zheng
---
Changes in v3:
- Pinmux changes.
arch/arm/boot/dts/sun8i-r40.dtsi | 408
As we added A20 support to A10 pinctrl driver, now we can delete the
dedicated A20 pinctrl driver, which is duplicated code.
Signed-off-by: Icenowy Zheng
---
Changes in v3:
- Only remove the A20 driver(A10 driver for A20 is enabled in
the previous commit now).
drivers/pinctrl/sunxi/Kconfig
Allwinner R40 has a clock controlling unit like the ones on other
Allwinner SoCs after sun6i, and can also use a CCU-based driver.
Add a compatible string for it.
Signed-off-by: Icenowy Zheng
Acked-by: Rob Herring
---
Changes in v3:
- Rebased on current linux-next.
- Added Rob'
control buttons
This patch adds a dts file that enables debug UART and MMC support.
Signed-off-by: Chen-Yu Tsai
Signed-off-by: Icenowy Zheng
---
Changes in v3:
- Pinmux changes.
arch/arm/boot/dts/Makefile| 1 +
arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 157
Allwinner R40 SoC have a clock controller module in the style of the
SoCs beyond sun6i, however, it's more rich and complex.
Add support for it.
Signed-off-by: Icenowy Zheng
---
Changes in v3:
- Rebased on current linux-next.
Changes in v2:
- Fixes according to the SoC's user manual.
Allwinner R40 has a pin controller like the ones in older Allwinner SoCs
(especially A20), and can use modified version of the A10/A20 pinctrl
driver.
Add a compatible string for it.
Signed-off-by: Icenowy Zheng
Acked-by: Rob Herring
---
Changes in v3:
- Added Rob's ACK.
Document
As A20 is designed as a pin-compatible upgrade of A10, their pin
controller are very similar, and can share one driver.
Add A20 support to the A10 driver.
Signed-off-by: Icenowy Zheng
---
Changes in v3:
- Enable A10 driver for A20 and disable A20 driver in this commit, in
order to prevent A10
Allwinner R40 is a new SoC, with Quad Core Cortex-A7 and peripherals
like A20.
Add support for it.
Signed-off-by: Icenowy Zheng
---
Changes in v3:
- Use V1.0 documents.
Documentation/arm/sunxi/README | 6 ++
Documentation/devicetree/bindings/arm/sunxi.txt | 1 +
arch/arm
R40 is said to be an upgrade of A20, and its pin configuration is also
similar to A20 (and thus similar to A10).
Add support for R40 to the A10 pinctrl driver.
Signed-off-by: Icenowy Zheng
---
drivers/pinctrl/sunxi/Kconfig | 2 +-
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c | 272
Allwinner A10, A20 and R40 SoCs have similar GPIO layout.
Add SoC definitions in pinctrl-sunxi.h, in order to merge A20 support
into A10 driver, and add R40 support into it.
Signed-off-by: Icenowy Zheng
---
Changes in v3:
- Commit message change.
drivers/pinctrl/sunxi/pinctrl-sunxi.h | 3
file for Allwinner R40
ARM: dts: sun8i: Add board dts file for Banana Pi M2 Ultra
Icenowy Zheng (8):
arm: sunxi: add support for R40 SoC
pinctrl: sunxi: Add SoC ID definitions for A10, A20 and R40 SoCs
pinctrl: sunxi: add A20 support to A10 driver
pinctrl: sunxi: drop dedicated A20 driver
在 2017-05-27 00:44，Jagan Teki 写道：
On Fri, May 26, 2017 at 10:10 PM, wrote:
在 2017-05-26 03:26，Jagan Teki 写道：
From: Jagan Teki
Orangepi Prime is an open-source single-board computer
using the Allwinner h5 SOC.
Sorry but I have already added this board and it's
scheduled at 4.13.
Ohh, u
在 2017-05-26 03:26，Jagan Teki 写道：
From: Jagan Teki
Orangepi Prime is an open-source single-board computer
using the Allwinner h5 SOC.
Sorry but I have already added this board and it's
scheduled at 4.13.
H5 Orangepi Prime has
- Quad-core Cortex-A53
- 2GB DDR3
- Debug TTL UART
- 1000M/100M
LCD
>>>> - Audio and MIC
>>>> - Wifi + BT
>>>
>>> It looks like Wifi + BT are soldered on the board, so you should at
>>> least enable the proper UART connected to the Bluetooth chip,
>probably
>>> also MMC1 (which is surely connected to the WiFi ch
于 2017年5月25日 GMT+08:00 下午10:20:33, Chen-Yu Tsai 写到:
>On Thu, May 25, 2017 at 9:54 PM, Icenowy Zheng wrote:
>>
>>
>> 于 2017年5月25日 GMT+08:00 下午4:37:31, Chen-Yu Tsai 写到:
>>>On Wed, May 24, 2017 at 7:17 PM, Icenowy Zheng
>wrote:
>>>> Allwinner V3s
于 2017年5月25日 GMT+08:00 下午4:37:31, Chen-Yu Tsai 写到:
>On Wed, May 24, 2017 at 7:17 PM, Icenowy Zheng wrote:
>> Allwinner V3s SoC features a "Display Engine 2.0" with only one mixer
>> and only one TCON connected to this mixer, which have RGB LCD output.
>>
>&
From: Icenowy Zheng
Allwinner V3s features an analog codec without MBIAS pin.
Split out this part, in order to prepare for the V3s analog codec.
Signed-off-by: Icenowy Zheng
---
Changes in v3:
- Fixed a missing line in v2.
sound/soc/sunxi/sun8i-codec-analog.c | 35
From: Icenowy Zheng
Allwinner V3s has a DMA engine similar to the ones from A31, but with
fewer channels and DRQs.
Add support for it.
Signed-off-by: Icenowy Zheng
Acked-by: Chen-Yu Tsai
---
Changes in v3:
- Added Chen-Yu's ACK.
Documentation/devicetree/bindings/dma/sun6i-dma.txt
From: Icenowy Zheng
Originally we enable a special gate bit when the compatible indicates
A23/33.
But according to BSP sources and user manuals, more SoCs will need this
gate bit.
So make it a common quirk configured in the config struct.
Signed-off-by: Icenowy Zheng
---
Changes in v3
attached. The LCD device tree overlay files can enable these controllers
and make use of them.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
b/arch
As we have already the support for the PWM controller on V3s SoC, add
its device node in the SoC's DTSI file.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/
Allwinner V3s have two PWM channels, the first channel can be only at
PB4 pin, and the second channel PB5.
Add their pinmux configurations.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i
From: Icenowy Zheng
The codec in the V3s is similar to the one found on the A31. One key
difference is the analog path controls are routed through the PRCM
block. This is supported by the sun8i-codec-analog driver, and tied
into this codec driver with the audio card's aux_dev.
In addition
From: Icenowy Zheng
The V3s SoC features an analog codec with headphone support but without
mic2 and linein.
Add support for it.
Signed-off-by: Icenowy Zheng
---
Documentation/devicetree/bindings/sound/sun8i-codec-analog.txt | 1 +
sound/soc/sunxi/sun8i-codec-analog.c
: Icenowy Zheng
---
New patch in v3.
sound/soc/sunxi/sun8i-codec-analog.c | 97 +++-
1 file changed, 96 insertions(+), 1 deletion(-)
diff --git a/sound/soc/sunxi/sun8i-codec-analog.c
b/sound/soc/sunxi/sun8i-codec-analog.c
index edcc3eb7cd9a..4c34a12b3739 100644
--- a
Allwinner V3s SoC features a set of pins that have functionality of RGB
LCD, the pins are at different pin ban than other SoCs.
Add pinctrl node for them.
Signed-off-by: Icenowy Zheng
Acked-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 9 +
1 file changed, 9 insertions
Allwinner V3s SoC features a "Display Engine 2.0" with only one mixer
and only one TCON connected to this mixer, which have RGB LCD output.
Add device nodes for this display pipeline.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-v3s
From: Icenowy Zheng
Allwinner V3s SoC features an internal audio codec like the one in H3,
and a analog codec like the one in H3/A23 (but much simpler).
Add them in the DTSI file.
Signed-off-by: Icenowy Zheng
Acked-by: Chen-Yu Tsai
---
Changes in v3:
- Added Chen-Yu's ACK.
arch/arm
From: Icenowy Zheng
Allwinner V3s SoC features a DMA engine.
Add it in the DTSI file.
Signed-off-by: Icenowy Zheng
Acked-by: Chen-Yu Tsai
---
Changes in v3:
- Added Chen-Yu's ACK.
arch/arm/boot/dts/sun8i-v3s.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm
The Lichee Pi Zero Dock board has an audio jack and an onboard MIC.
Enable them.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts
b/arch/arm/boot
adds three parts of device tree: DMA engine, codec support
and enable the codec for Lichee Pi Zero dock.
Icenowy Zheng (9):
ASoC: sun8i-codec-analog: split out mbias
ASoC: sun8i-codec-analog: prepare a mixer control/widget/route set for
V3s
ASoC: sun8i-codec-analog: add support for V3s SoC
t; > > Dne sobota, 20. maj 2017 ob 03:37:53 CEST je Chen-Yu Tsai
>napisal(a):
>> > > > On Sat, May 20, 2017 at 2:23 AM, Jernej Škrabec
>
>> > > wrote:
>> > > > > Hi,
>> > > > >
>> > >
于 2017年5月24日 GMT+08:00 下午1:34:58, Chen-Yu Tsai 写到:
>On Wed, May 24, 2017 at 1:28 PM, Icenowy Zheng wrote:
>>
>>
>> 于 2017年5月24日 GMT+08:00 下午1:24:29, Chen-Yu Tsai 写到:
>>>On Thu, May 18, 2017 at 12:43 AM, Icenowy Zheng
>>>wrote:
>>>> A
于 2017年5月24日 GMT+08:00 下午1:24:29, Chen-Yu Tsai 写到:
>On Thu, May 18, 2017 at 12:43 AM, Icenowy Zheng
>wrote:
>> As we have already the support for the TV encoder on Allwinner H3,
>add
>> the display engine pipeline device tree nodes to its DTSI file.
>>
>> The
7 ob 20:08:18 CEST je Icenowy Zheng napisal(a):
> >> 于 2017年5月20日 GMT+08:00 上午2:03:30, Maxime Ripard >
> > electrons.com> 写到:
> >> >On Thu, May 18, 2017 at 12:43:50AM +0800, Icenowy Zheng wrote:
> >> >> Allwinner H3 features a TV encoder similar
Škrabec
>
>> wrote:
>> > > Hi,
>> > >
>> > > Dne petek, 19. maj 2017 ob 20:08:18 CEST je Icenowy Zheng
>napisal(a):
>> > >> 于 2017年5月20日 GMT+08:00 上午2:03:30, Maxime Ripard
>> > >
>> > > electrons.com> 写到:
>> > >&
于 2017年5月22日 GMT+08:00 下午5:39:22, Marc Zyngier 写到:
>On 18/05/17 08:16, Icenowy Zheng wrote:
>> Add support for the newly imported compatible for the A64 R_INTC in
>> irq-sunxi-nmi driver.
>>
>> Signed-off-by: Icenowy Zheng
>> ---
>> Change
于 2017年5月20日 GMT+08:00 上午2:06:16, Maxime Ripard
写到:
>On Thu, May 18, 2017 at 12:43:53AM +0800, Icenowy Zheng wrote:
>> As we have already the support for the TV encoder on Allwinner H3,
>add
>> the display engine pipeline device tree nodes to its DTSI file.
>>
>
于 2017年5月20日 GMT+08:00 上午2:03:30, Maxime Ripard
写到:
>On Thu, May 18, 2017 at 12:43:50AM +0800, Icenowy Zheng wrote:
>> Allwinner H3 features a TV encoder similar to the one in earlier
>SoCs,
>> but with some different points about clocks:
>> - It has a mod clock and a
于 2017年5月20日 GMT+08:00 上午2:02:15, Maxime Ripard
写到:
>On Thu, May 18, 2017 at 12:43:44AM +0800, Icenowy Zheng wrote:
>> -On SoCs other than the A33 and V3s, there is one more clock
>required:
>> +For the following compatibles:
>> + * allwinner,sun5i-a13-tcon
>>
于 2017年5月20日 GMT+08:00 上午1:57:53, Maxime Ripard
写到:
>On Thu, May 18, 2017 at 12:43:46AM +0800, Icenowy Zheng wrote:
>> Some SoC's DE2 has two mixers. Defaultly the mixer0 is connected to
>> tcon0 and mixer1 is connected to tcon1; however by setting a bit
>> the
于 2017年5月20日 GMT+08:00 上午1:47:29, Maxime Ripard
写到:
>On Thu, May 18, 2017 at 12:43:45AM +0800, Icenowy Zheng wrote:
>> From: Icenowy Zheng
>>
>> Allwinner H3 SoC has two mixers, one has 1 VI channel and 3 UI
>channels,
>> and the other has 1 VI and 1 UI.
&g
于 2017年5月19日 GMT+08:00 下午4:27:21, Andre Przywara 写到:
>Hi,
>
>On 18/05/17 08:16, Icenowy Zheng wrote:
>> Add support of AXP803 regulators in the Pine64 device tree, in order
>to
>> enable many future functionalities, e.g. Wi-Fi.
>>
>> Signed-off-by: Ic
在 2017-05-19 15:19，Maxime Ripard 写道：
On Fri, May 19, 2017 at 11:03:33AM +0800, Icenowy Zheng wrote:
>The patch looks OK, but given the module is removable, I think it
>should be
>an overlay. The overlay would enable WiFi + Bluetooth, and all the
>peripherals needed to connect them.
于 2017年5月19日 GMT+08:00 上午11:10:36, Chen-Yu Tsai 写到:
>On Fri, May 19, 2017 at 11:00 AM, Icenowy Zheng
>wrote:
>>
>>
>> 于 2017年5月19日 GMT+08:00 上午10:54:21, Chen-Yu Tsai 写到:
>>>Hi,
>>>
>>>On Thu, May 18, 2017 at 3:16 PM, Icenowy Zheng
>wrot
于 2017年5月19日 GMT+08:00 上午11:01:39, Chen-Yu Tsai 写到:
>Hi,
>
>On Thu, May 18, 2017 at 3:16 PM, Icenowy Zheng wrote:
>> The Wi-Fi module of Pine64 is powered via DLDO4 and ELDO1 (the latter
>> one provides I/O voltage).
>>
>> Add device node for it.
>>
>
于 2017年5月19日 GMT+08:00 上午10:54:21, Chen-Yu Tsai 写到:
>Hi,
>
>On Thu, May 18, 2017 at 3:16 PM, Icenowy Zheng wrote:
>> Add support of AXP803 regulators in the Pine64 device tree, in order
>to
>> enable many future functionalities, e.g. Wi-Fi.
>>
>> Signed-off-
Allwinner A64 SoC features a R_INTC controller, which controls the NMI
line, and this interrupt line is usually connected to the AXP PMIC.
Add support for it.
Signed-off-by: Icenowy Zheng
---
Changes in v4:
- Changes it to use R_INTC binding and change node label to r_intc.
- Fixed MMIO region
Add support for the newly imported compatible for the A64 R_INTC in
irq-sunxi-nmi driver.
Signed-off-by: Icenowy Zheng
---
Changes in v5:
- Fix A64 R_INTC compatible.
drivers/irqchip/irq-sunxi-nmi.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/irqchip/irq-sunxi
GPIO (so it's with 2.0mm pitch, not 2.54mm as
other GPIO headers).
Signed-off-by: Icenowy Zheng
---
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
b/arch/arm64/boo
Add support of AXP803 regulators in the Pine64 device tree, in order to
enable many future functionalities, e.g. Wi-Fi.
Signed-off-by: Icenowy Zheng
---
Changes in v6:
- Rebased on next-20170517.
.../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 109 +
1 file changed
As nearly all A64 boards are using AXP803 PMIC, add a DTSI file for it,
like the old DTSI files for AXP20x/22x, for the common parts of the
PMIC.
Signed-off-by: Icenowy Zheng
Acked-by: Mark Brown
---
Changes in v5:
- Added Mark Brown's ACK.
Changes in v4:
- Re-sorted the nodes.
arch/
AXP803 PMIC also have a series of regulators (DCDCs and LDOs)
controllable via I2C/RSB bus.
Add support for them.
Signed-off-by: Icenowy Zheng
Acked-by: Chen-Yu Tsai
---
Changes in v4:
- Fixed somewhere which mention AXP806 before 803.
Changes in v2:
- Place AXP803 codes before AXP806/809 ones
As axp20x-regulator now supports AXP803, add a cell for it.
Signed-off-by: Icenowy Zheng
Acked-by: Chen-Yu Tsai
---
Changes in v5:
- Removed wrong snippet.
Changes in v4:
- Added a trailing comma for new cell, for easier further cell addition.
Changes in v3:
- Make the new cell one-liner
The Pine64 (including Pine64+) boards have an AXP803 as its main PMIC.
Add its device node.
Signed-off-by: Icenowy Zheng
---
Changes in v6:
- Rebase on next-20170517.
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch
The A31 NMI driver seems to be using wrong base address.
As we're going to convert to use a correct NMI base address (and
correctly name it to R_INTC as the datasheet suggests), add a new
compatible string for the "correct" R_INTC, which we will use for A64
SoC.
Signed-off-by
AXP20x regulatoe driver.
(The binding is already applied)
PATCH 6 enables the AXP803 regulator cell in MFD driver.
PATCH 7 adds a DTSI file for AXP803, like other older AXP PMICs.
PATCH 8 enables AXP803 regulators in Pine64 device tree.
PATCH 9 enables Wi-Fi for Pine64.
Icenowy Zheng (9
The Lichee Pi Zero Dock dtb file is not added to the Makefile, so that
it won't be built; and the file contains a problem that prevents it
from being correctly built.
Fix these issues.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/Makefile | 3 ++-
arch/arm
于 2017年5月18日 GMT+08:00 上午1:37:39, Maxime Ripard
写到:
>On Wed, May 17, 2017 at 10:47:16PM +0800, Icenowy Zheng wrote:
>> This patchset is the initial patchset for Allwinner DE2 support.
>>
>> As the DE2 CCU support is already applied, this patchset now contains
>>
From: Icenowy Zheng
Allwinner H3 SoC has two mixers, one has 1 VI channel and 3 UI channels,
and the other has 1 VI and 1 UI.
Add support for these two variants.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 18 ++
1 file changed, 18 insertions
.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-h3.dtsi | 189
1 file changed, 189 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index b36f9f423c39..20172ef92415 100644
--- a/arch/arm/boot/dts/sun8i-h3
The CLK_PLL_DE is needed to be referenced in device tree for H3, for
both forcing the parent of PLL_DE.
So export it to the device tree binding header.
Signed-off-by: Icenowy Zheng
---
drivers/clk/sunxi-ng/ccu-sun8i-h3.h | 3 +--
include/dt-bindings/clock/sun8i-h3-ccu.h | 2 ++
2 files
_DE to set CLK_PLL_DE (add CLK_SET_RATE_PARENT to it).
Signed-off-by: Icenowy Zheng
---
drivers/clk/sunxi-ng/ccu-sun8i-h3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
index 4cbc1b701b7c..6e39ba7cb173 10
The DE2 mixer can do color space correction needed by TV Encoder with
its DCSC sub-engine.
Add support for it.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 35 +++
drivers/gpu/drm/sun4i/sun8i_mixer.h | 6 +-
2 files changed, 40
Allwinner H3 features a TV encoder similar to the one in earlier SoCs,
but with some different points about clocks:
- It has a mod clock and a bus clock.
- The mod clock must be at a fixed rate to generate signal.
Add support for it.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i
From: Icenowy Zheng
Allwinner H3 has two special TCONs, both come without channel0. And the
TCON1 of H3 has no special clocks even for the channel1.
Add support for these kinds of TCON.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 78
they stands for the swapped
connection.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 27 ++
drivers/gpu/drm/sun4i/sun4i_tcon.c | 39 +-
drivers/gpu/drm/sun4i/sun4i_tcon.h | 2 ++
3 files changed, 59 insertions(
Add a compatible string for H3 display engine in sun4i_drv code.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c
b/drivers/gpu/drm/sun4i/sun4i_drv.c
index 29bf1325ded6..c0de0741c923 100644
Orange Pi PC features a 3.5mm jack with TV output in it.
Enable the TV output.
As it currently do not have jack detection feature, do not merge this
patch.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 12
1 file changed, 12 insertions(+)
diff
Allwinner H3 features a "DE2.0" and a TV Encoder.
Add device tree bindings for the following parts:
- H3 TCONs
- H3 Mixers
- The connection between H3 TCONs and H3 Mixers
- H3 TV Encoder
- H3 Display engine
Signed-off-by: Icenowy Zheng
---
.../bindings/display/sunxi/sun
utput shouldn't be defaultly enabled now.
[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2017-May/506806.html
Icenowy Zheng (11):
dt-bindings: update the binding for Allwinner H3 TVE support
drm: sun4i: add support for H3 mixers
drm: sun4i: ignore swapped mixer<->tcon connecti
ernal bridges' support is included
in this patchset, which makes it currently not usable on H3.
Thanks to Jean-Francois Moine and Jernej Skrabec for their efforts
to discover the internal of DE2!
[1] https://lists.freedesktop.org/archives/dri-devel/2016-December/126264.html
Icenowy Zheng (9):
A 480x272 QiaoDian QD43003C0-40-7LED panel is available from Lichee Pi.
This commit connects this panel to Lichee Pi Zero.
Lichee Pi also provides a 800x480 panel without accurate model number,
so do not merge this patch. It will finally come as device tree overlay.
Signed-off-by: Icenowy Zheng
Allwinner V3s SoC features a set of pins that have functionality of RGB
LCD, the pins are at different pin ban than other SoCs.
Add pinctrl node for them.
Signed-off-by: Icenowy Zheng
Acked-by: Chen-Yu Tsai
---
Changes in v7:
- Dropped the trailing "@0" in rgb666 pinmux node name.
-
Allwinner V3s SoC features a "Display Engine 2.0" with only one mixer
and only one TCON connected to this mixer, which have RGB LCD output.
Add device nodes for this display pipeline.
Signed-off-by: Icenowy Zheng
---
Changes in v8:
- Changed some label names.
Changes in v7:
- Change
Allwinner V3s SoC features a TCON without channel 1.
Add support for it.
Signed-off-by: Icenowy Zheng
Reviewed-by: Chen-Yu Tsai
---
Changes in v7:
- Added Chen-Yu's Reviewed-by.
drivers/gpu/drm/sun4i/sun4i_drv.c | 3 ++-
drivers/gpu/drm/sun4i/sun4i_tcon.c | 5 +
2 files chang
Allwinner V3s features the new "Display Engine 2.0", which can now also
be driven with our subdrivers in sun4i-drm.
Add the compatible string for in sun4i_drv.c, in order to make the
display engine and its components probed.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/s
missing -- more investigations
are needed to gain enough information for them.
Signed-off-by: Icenowy Zheng
---
Changes in v8:
- Set id manually to -1.
Changes in v7:
- Small fixed advised by Maxime Ripard.
- Added fixup on CRTC destination coordinate.
Changes in v6:
- Rebased on wens's mul
As sun4i-backend is now a dedicated module, add an Kconfig option for
it to make it optional, since some build may only use other engines.
Signed-off-by: Icenowy Zheng
---
Changes in v7:
- Adjusted the position of BACKEND makefile item. (It's now after
common codes shared between sun4i-ba
Currently the direct call from CRTC code to layer code has disappeared,
instead the layer's init function is called via the backend's ops.
Add a dedicated module for sun4i-backend and sun4i-layer, and drop the
EXPORT_SYMBOL from backend code to layer code.
Signed-off-by: Icenowy Zheng
nner, so I choose to call them both "engine" here.
Abstract the engine type to a new struct with an ops struct, which contains
functions that should be called outside the engine-specified code (in
TCON, CRTC or TV Encoder code).
Signed-off-by: Icenowy Zheng
Reviewed-by: Chen-Yu Tsa
: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 6ff50665e5e6..a49ebef53c91 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i
在 2017-05-17 17:27，icen...@aosc.io 写道：
在 2017-05-15 17:24，Maxime Ripard 写道：
On Mon, May 15, 2017 at 12:30:43AM +0800, Icenowy Zheng wrote:
+ de2_clocks: clock@100 {
display_clocks would be better there, we don't have to dissociate de1
with de2
How about de_clocks ?
在 2017-05-15 17:24，Maxime Ripard 写道：
On Mon, May 15, 2017 at 12:30:43AM +0800, Icenowy Zheng wrote:
+ de2_clocks: clock@100 {
display_clocks would be better there, we don't have to dissociate de1
with de2
How about de_clocks ? (See A80
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