> -Original Message-
> From: Frieder Schrempf [mailto:frieder.schre...@kontron.de]
> Sent: Thursday, February 25, 2021 4:23 PM
> To: Abel Vesa ; Dong Aisheng
> Cc: Aisheng Dong ; Rob Herring ;
> Peng Fan ; Jacky Bai ; Anson Huang
> ; devicetree ;
> Stephen B
> -Original Message-
> From: Richard Zhu
> Sent: Thursday, February 18, 2021 2:19 PM
> To: Jacky Bai ; shawn...@kernel.org
> Cc: dl-linux-imx ; linux-arm-ker...@lists.infradead.org;
> linux-kernel@vger.kernel.org
> Subject: RE: [PATCH] clk: imx8mp: Remove the n
> -Original Message-
> From: Richard Zhu [mailto:hongxing@nxp.com]
> Sent: Thursday, February 18, 2021 1:54 PM
> To: shawn...@kernel.org; Jacky Bai
> Cc: dl-linux-imx ; linux-arm-ker...@lists.infradead.org;
> linux-kernel@vger.kernel.org; Richard Zhu
> Subject
> -Original Message-
> From: Abel Vesa [mailto:abel.v...@nxp.com]
> Sent: Tuesday, November 3, 2020 7:18 PM
> To: Mike Turquette ; Stephen Boyd
> ; Adam Ford ; Marek Vasut
> ; Lucas Stach ; Rob
> Herring ; Shawn Guo ; Sascha
> Hauer ; Fabio Estevam ;
> Anson Hua
power-domain without having a cyclic dependency in the DT. I'm
> > > still thinking about how to solve this properly.
> > >
> >
> > I remember we had something similar in our internal tree with the
> > bus_blk_clk on 8MP, which was added by the media BLK_CTL. What I did
> > was to just drop the registration of that clock entirely. My rationale
> > was that if the clock is part of the BLK_CTL but also needed by the
> > BLK_CTL to work, I can leave it alone (that is, enabled by default)
> > since when the PD will be powered off the clock will gated too. I
> > guess another option would be to mark it as critical, that way, it
> > will never be disabled (will be left alone by the clk_disable_unused
> > too) but at the same time will be visible in the clock hierarchy.
> >
>
> Do ignore evrything I said about the bus_blk_ctl, that did work on our tree
> since the whole PD power on/off "magic" is done in TF-A.
>
> So the problem, as I understand it now, is the fact that the blk_ctl driver
> won't
> probe because it needs its PD, but the PD is not registered because the
> ADB400 can't power up since it needs the bus_blk_ctl clock enabled, clock
> which is registered by the blk_ctl.
1. For some MIX's BLK_CTL GPRs, it can only be accessed when the MIX PD is on
2. for some MIX's ADB handshake, need to config some BLK_CTL clock_en bit to
enable the MIX internal bus clock.
That's why I have concern on implementing such MIX GPR as clock & reset driver,
and implementing GPC PD in linux kernel.
It will introduce some chicken-egg issue that not easy to handle in linux
kernel.
BR
Jacky Bai
>
> > > Regards,
> > > Lucas
> > >
ernel.org; linux-arm-ker...@lists.infradead.org;
> linux-kernel@vger.kernel.org
> Cc: Jacky Bai ; Krzysztof Kozlowski
> Subject: [PATCH 3/3] arm64: dts: imx8mp: adjust GIC CPU mask to match
> number of CPUs
>
> i.MX 8M Plus has four Cortex-A CPUs, not six. Using higher value is
ion.
https://pci-ids.ucw.cz/v2.2/pci.ids
https://lore.kernel.org/patchwork/project/lkml/list/
Jacky
On Wed, Jun 17, 2020 at 05:54:36PM +0300, Alexander Monakov wrote:
> Hi,
>
> I've already said in my patch submission (which was Cc'ed to LKML,
> linux-edac and linux-hwmon so you
00 0043
0x059bb0: c1c0 00f9
0x059bc0:
0x059bd0:
0x059be0:
0x059bf0:
Jacky
On Wed, Jun 17, 2020 at 07:33:42AM -0700, G
0x05a3c0:
0x05a3d0:
0x05a3e0:
0x05a3f0:
Thanks.
Jacky
On Tue, Jun 16, 2020 at 08:40:28PM -0700, Guenter Roeck wrote:
> On Wed, Jun 17, 2020
With this patch applied, output from 4800H (idle) looks as follows:
k10temp-pci-00c3
Adapter: PCI adapter
Vcore: 1.55 V
Vsoc: 1.55 V
Tctl: +49.6°C
Tdie: +49.6°C
Icore: 0.00 A
Isoc: 0.00 A
Signed-off-by: Jacky Hu
---
drivers/hwmon/k10temp.c | 1
cording to the definition.
Signed-off-by: Jacky Hu
---
drivers/pinctrl/pinctrl-amd.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/pinctrl-amd.h b/drivers/pinctrl/pinctrl-amd.h
index 3e5760f1a715..d4a192df5fab 100644
--- a/drivers/pinctrl/pinctrl-amd.h
+++
Add the new Family 17h, Model 60h PCI IDs for AMD Zen2 APU systems.
Signed-off-by: Jacky Hu
---
arch/x86/kernel/amd_nb.c | 5 +
drivers/hwmon/k10temp.c | 2 ++
include/linux/pci_ids.h | 1 +
3 files changed, 8 insertions(+)
diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
Add family ops to support AMD Family 17h, Models 60h-6Fh systems.
Signed-off-by: Jacky Hu
---
drivers/edac/amd64_edac.c | 14 ++
drivers/edac/amd64_edac.h | 3 +++
2 files changed, 17 insertions(+)
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index
This patchset adds MCA and EDAC support for AMD Family 17h, Model 60h.
Also k10temp works with 4800h
k10temp-pci-00c3
Adapter: PCI adapter
Vcore: 1.55 V
Vsoc: 1.55 V
Tctl: +49.6°C
Tdie: +49.6°C
Icore: 0.00 A
Isoc: 0.00 A
Jacky Hu (2):
x86
OK for me.
BR
Jacky Bai
> -Original Message-
> From: anson.hu...@nxp.com [mailto:anson.hu...@nxp.com]
> Sent: Tuesday, June 25, 2019 3:06 PM
> To: mturque...@baylibre.com; sb...@kernel.org; shawn...@kernel.org;
> s.ha...@pengutronix.de; ker...@pengutronix.de; feste...@gmail
Jacky Bai would like to recall the message, "[PATCH 2/2] clk: imx8mm: GPT1
clock mux option #5 should be sys_pll1_80m".
From: Bai Ping
The system counter (sys_ctr) is a programmable system counter
which provides a shared time base to the Cortex A15, A7, A53 etc cores.
It is intended for use in applications where the counter is always
powered on and supports multiple, unrelated clocks. The sys_ctr hardware
supports
From: Bai Ping
Add the binding doc for nxp system counter timer module.
Signed-off-by: Bai Ping
Reviewed-by: Rob Herring
---
change v1->v2
- remove the blank line at EOF
change v2->v3
- update the binding example based on the driver change
change v3->v4
- no change
change v4->v5
- no chang
Add checksum support for gue encapsulation with the tun_flags parameter,
which could be one of the values below:
IP_VS_TUNNEL_ENCAP_FLAG_NOCSUM
IP_VS_TUNNEL_ENCAP_FLAG_CSUM
IP_VS_TUNNEL_ENCAP_FLAG_REMCSUM
Signed-off-by: Jacky Hu
---
v4->v3:
1) defer pd assignment after data += GUE_LEN_PRIV
Add checksum support for gue encapsulation with the tun_flags parameter,
which could be one of the values below:
IP_VS_TUNNEL_ENCAP_FLAG_NOCSUM
IP_VS_TUNNEL_ENCAP_FLAG_CSUM
IP_VS_TUNNEL_ENCAP_FLAG_REMCSUM
Signed-off-by: Jacky Hu
---
v3->v2:
1) fixed CHECK: spaces preferred around t
Add checksum support for gue encapsulation with the tun_flags parameter,
which could be one of the values below:
IP_VS_TUNNEL_ENCAP_FLAG_NOCSUM
IP_VS_TUNNEL_ENCAP_FLAG_CSUM
IP_VS_TUNNEL_ENCAP_FLAG_REMCSUM
Signed-off-by: Jacky Hu
---
v2->v1:
1) removed unnecessary changes to ip_vs_core.c
Add checksum support for gue encapsulation with the tun_flags parameter,
which could be one of the values below:
IP_VS_TUNNEL_ENCAP_FLAG_NOCSUM
IP_VS_TUNNEL_ENCAP_FLAG_CSUM
IP_VS_TUNNEL_ENCAP_FLAG_REMCSUM
Signed-off-by: Jacky Hu
---
include/net/ip_vs.h | 2 +
include/uapi/linux
> -Original Message-
> From: Daniel Lezcano [mailto:daniel.lezc...@linaro.org]
> Sent: Tuesday, May 21, 2019 8:20 PM
> To: Jacky Bai ; t...@linutronix.de; robh...@kernel.org;
> shawn...@kernel.org; mark.rutl...@arm.com; Aisheng Dong
>
> Cc: linux-kernel@vge
> -Original Message-
> From: Daniel Lezcano [mailto:daniel.lezc...@linaro.org]
> Sent: Tuesday, May 21, 2019 6:08 PM
> To: Jacky Bai ; t...@linutronix.de; robh...@kernel.org;
> shawn...@kernel.org; mark.rutl...@arm.com; Aisheng Dong
>
> Cc: linux-kernel@vge
From: Bai Ping
The system counter (sys_ctr) is a programmable system counter
which provides a shared time base to the Cortex A15, A7, A53 etc cores.
It is intended for use in applications where the counter is always
powered on and supports multiple, unrelated clocks. The sys_ctr hardware
supports
From: Bai Ping
Add the binding doc for nxp system counter timer module.
Signed-off-by: Bai Ping
Reviewed-by: Rob Herring
---
change v1->v2
- remove the blank line at EOF
change v2->v3
- update the binding example based on the driver change
change v3->v4
- no change
---
.../bindings/timer/n
Sorry for delayed response to you, my mail client did something wrong. :(
> On Wed, 3 Apr 2019, Jacky Bai wrote:
>
> > From: Bai Ping
> >
> > The system counter (sys_ctr) is a programmable system counter which
> > provides a shared time base to the Cortex A15
From: Bai Ping
The system counter (sys_ctr) is a programmable system counter
which provides a shared time base to the Cortex A15, A7, A53 etc cores.
It is intended for use in applications where the counter is always
powered on and supports multiple, unrelated clocks. The sys_ctr hardware
supports
From: Bai Ping
Add the binding doc for nxp system counter timer module.
Signed-off-by: Bai Ping
---
change v1->v2
- remove the blank line at EOF
change v2->v3
- update the binding example based on the driver change
---
.../devicetree/bindings/timer/nxp,sysctr-timer.txt | 25 +
On Mon, Mar 18, 2019 at 10:10:20AM +0800, kbuild test robot wrote:
> Hi Jacky,
>
> Thank you for the patch! Perhaps something to improve:
>
> [auto build test WARNING on ipvs-next/master]
> [also build test WARNING on v5.1-rc1 next-20190306]
> [if your patch is applied
> Subject: Re: [PATCH v2 2/2] driver: clocksource: Add nxp system counter timer
> driver support
>
> On 12/12/2018 06:28, Jacky Bai wrote:
> > The system counter (sys_ctr) is a programmable system counter which
> > provides a shared time base to the Cortex A15, A7,
Ping...
BR
Jacky Bai
> -Original Message-
> From: Jacky Bai
> Sent: 2018年12月12日 13:28
> To: daniel.lezc...@linaro.org; t...@linutronix.de; robh...@kernel.org;
> shawn...@kernel.org; mark.rutl...@arm.com; Aisheng Dong
>
> Cc: linux-kernel@vger.kernel.org; devicet..
> Subject: Re: [PATCH v2 2/2] driver: clocksource: Add nxp system counter timer
> driver support
>
> Hi,
>
> On 12/11/18 9:28 PM, Jacky Bai wrote:
> > diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
> > index c57b156..7e5f2de 100644
> &g
Add the binding doc for nxp system counter timer module.
Signed-off-by: Bai Ping
---
change v1->v2
- remove the blank line at EOF
---
.../devicetree/bindings/timer/nxp,sysctr_timer.txt | 26 ++
1 file changed, 26 insertions(+)
create mode 100644 Documentation/devicetree/bin
The system counter (sys_ctr) is a programmable system counter
which provides a shared time base to the Cortex A15, A7, A53 etc cores.
It is intended for use in applications where the counter is always
powered on and supports multiple, unrelated clocks. The sys_ctr hardware
supports:
- 56-bit count
The system counter (sys_ctr) is a programmable system counter
which provides a shared time base to the Cortex A15, A7, A53 etc cores.
It is intended for use in applications where the counter is always
powered on and supports multiple, unrelated clocks. The sys_ctr hardware
supports:
- 56-bit count
Add the binding doc for nxp system counter timer module.
Signed-off-by: Bai Ping
---
.../devicetree/bindings/timer/nxp,sysctr_timer.txt | 28 ++
1 file changed, 28 insertions(+)
create mode 100644 Documentation/devicetree/bindings/timer/nxp,sysctr_timer.txt
diff --git a/Doc
> Subject: Re: [PATCH] clk: imx6ull: use OSC clock during AXI rate change
>
> On 09.05.2018 03:26, Jacky Bai wrote:
> >> Subject: Re: [PATCH] clk: imx6ull: use OSC clock during AXI rate
> >> change
> >>
> >> Quoting Stefan Agner (2018-05-08 06:20:03
> Subject: Re: [PATCH] clk: imx6ull: use OSC clock during AXI rate change
>
> Quoting Stefan Agner (2018-05-08 06:20:03)
> > On 08.05.2018 09:32, Jacky Bai wrote:
> > >
> > > I have tried two 6ULL board, I don't meet such issue. System can
> > >
> Subject: Re: [PATCH] clk: imx6ull: use OSC clock during AXI rate change
>
> Hi Jacky,
>
> On 02.05.2018 09:38, Shawn Guo wrote:
> > Hi Jacky,
> >
> > Do you see this problem on i.MX6 ULL? What's your take on Stefan's fix?
>
> Any comment to th
Fixed coding style issue
Signed-off-by: Jacky Boen
---
drivers/staging/rtl8188eu/hal/usb_halinit.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/usb_halinit.c
b/drivers/staging/rtl8188eu/hal/usb_halinit.c
index 507e448..58d38d6 100644
Fixed coding style issue
Signed-off-by: Jacky Boen
---
drivers/staging/rtl8188eu/hal/usb_halinit.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/usb_halinit.c
b/drivers/staging/rtl8188eu/hal/usb_halinit.c
index 58d38d6..814ecec 100644
--- a
Fixed coding style issue
Signed-off-by: Jacky Boen
---
drivers/staging/rtl8188eu/hal/usb_halinit.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/staging/rtl8188eu/hal/usb_halinit.c
b/drivers/staging/rtl8188eu/hal/usb_halinit.c
index c37ba49..f5e8ac0 100644
--- a
Fix coding style issue
Signed-off-by: Jacky Boen
---
drivers/staging/rtl8188eu/hal/usb_halinit.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/usb_halinit.c
b/drivers/staging/rtl8188eu/hal/usb_halinit.c
index ef04638..13c1277 100644
--- a
Fixed typo
Signed-off-by: Jacky Boen
---
drivers/staging/rtl8188eu/hal/usb_halinit.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/staging/rtl8188eu/hal/usb_halinit.c
b/drivers/staging/rtl8188eu/hal/usb_halinit.c
index c5e5d52..7831f19 100644
--- a/drivers/staging
Fixed coding style issue
Signed-off-by: Jacky Boen
---
drivers/staging/rtl8188eu/hal/usb_halinit.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/usb_halinit.c
b/drivers/staging/rtl8188eu/hal/usb_halinit.c
index 814ecec..c37ba49 100644
Fixed coding style issue
Signed-off-by: Jacky Boen
---
drivers/staging/rtl8188eu/hal/usb_halinit.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/usb_halinit.c
b/drivers/staging/rtl8188eu/hal/usb_halinit.c
index 82269eb..ef04638 100644
Fix coding style issue
Signed-off-by: Jacky Boen
---
drivers/staging/rtl8188eu/hal/usb_halinit.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/usb_halinit.c
b/drivers/staging/rtl8188eu/hal/usb_halinit.c
index a3fffd7..82269eb 100644
--- a
Fix coding style issue
Signed-off-by: Jacky Boen
---
drivers/staging/rtl8188eu/hal/usb_halinit.c | 30 ++---
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/usb_halinit.c
b/drivers/staging/rtl8188eu/hal/usb_halinit.c
index
Fixed coding style issue
Signed-off-by: Jacky Boen
---
drivers/staging/rtl8188eu/hal/usb_halinit.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/usb_halinit.c
b/drivers/staging/rtl8188eu/hal/usb_halinit.c
index 7831f19..507e448
Fixed coding style issue
Signed-off-by: Jacky Boen
---
drivers/staging/rtl8188eu/hal/usb_halinit.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/usb_halinit.c
b/drivers/staging/rtl8188eu/hal/usb_halinit.c
index 07a61b8..c5e5d52 100644
Fixed parentheses, braces, comments, constants on the left side
comparisons, extra newlines and indentations, NULL comparisons,
and a typo.
Signed-off-by: Jacky Boen
---
drivers/staging/rtl8188eu/hal/usb_halinit.c | 73 ++---
1 file changed, 34 insertions(+), 39
interested, please contact us for more information.
Regards,
Jacky
Goto pharmaceuticals Co.,Ltd
Tel: +86 710 3423122, Fax: +86 710 3423124
Email:produ...@gotopharm.com
Msn:zhisheng...@hotmail.com
Add: 7-1602 New
Priority
/dev/sdc1 partition 2040064 0 -1
/tmp/swaH4mvTI/swapfilenext\040(deleted) file 48960 0 -31
/tmp/swa5TlBva/swapfilenext\040(deleted) file 49088 0 -118
#
many thanks,
--
Jacky Malcles B1-403 Emai
2)
reading your email I decide to start a test and get this:
(fs/jbd/transaction.c, 954): journal_dirty_data: jh: e023ee0f9a58,
tid:205049
kernel BUG at kernel/timer.c:416!
mkdir09[30886]: bugcheck! 0 [2]
/* Linux version 2.6.10 with CONFIG_JBD_DEBUG enable */
hope that it can help,
Jacky
-
machine. Thanks
alot for your time.
Best Regards,
Jacky Liu
>Date: Thu, 10 May 2001 23:20:17 -0400 (EDT)
>From: Mark Hahn <[EMAIL PROTECTED]>
>To: Jacky Liu <[EMAIL PROTECTED]>
>SUBJECT
>> You are right for the other assumption, I am running the harddisk in UDMA w/32bits
,
Jacky Liu
"Genius or Wacko? Majority or Minority?"
>Date: Thu, 10 May 2001 10:24:30 -0400 (EDT)
>From: Mark Hahn <[EMAIL PROTECTED]>
>To: Jacky Liu <[EMAIL PROTECTED]>
>SUBJECT
>> I would like to post a question regarding to a problem of unknown freeze
my game
machine was trying to establish connection to a game server).
If there is any information you would like to obtain, please let me know. I would like
to receive a copy of your reply, thank you very much for your kindly attention.
Best Regards,
Jacky Liu
"Ge
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