continue;
Shouldn't it be ntohl here ? The former code used the ntohs helper for
that command, and you're sending the magic in send_echo_msg with a
htonl() so I guess here you might want to convert the value back to
host endianness.
Thanks,
Maxime
Hello Michael,
On 2/1/24 09:40, Michael S. Tsirkin wrote:
On Thu, Feb 01, 2024 at 09:34:11AM +0100, Maxime Coquelin wrote:
Hi Jason,
It looks like all patches got acked by you.
Any blocker to queue the series for next release?
Thanks,
Maxime
I think it's good enough at this point. Wil
Hello Christoph,
On 2/20/24 10:01, Christoph Hellwig wrote:
On Mon, Feb 19, 2024 at 06:06:06PM +0100, Maxime Coquelin wrote:
Since commit 295525e29a5b ("virtio_net: merge dma
operations when filling mergeable buffers"), VDUSE device
require support for DMA's .sync_single_for_cpu
implements both .sync_single_for_cpu() and
.sync_single_for_device() callbacks, and also skip bounce
buffer copies during DMA map and unmap operations if the
DMA_ATTR_SKIP_CPU_SYNC attribute is set to avoid extra
copies of the same buffer.
Signed-off-by: Maxime Coquelin
---
drivers/vdpa/vdpa_user/iov
On 2/1/24 09:40, Michael S. Tsirkin wrote:
On Thu, Feb 01, 2024 at 09:34:11AM +0100, Maxime Coquelin wrote:
Hi Jason,
It looks like all patches got acked by you.
Any blocker to queue the series for next release?
Thanks,
Maxime
I think it's good enough at this point. Will put it in
Hi Jason,
It looks like all patches got acked by you.
Any blocker to queue the series for next release?
Thanks,
Maxime
On 1/9/24 12:10, Maxime Coquelin wrote:
This small series enables virtio-net device type in VDUSE.
With it, basic operation have been tested, both with
virtio-vdpa and vhost
Reviewed-by: Eugenio Pérez
Signed-off-by: Maxime Coquelin
---
drivers/vdpa/vdpa_user/vduse_dev.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/vdpa/vdpa_user/vduse_dev.c
b/drivers/vdpa/vdpa_user/vduse_dev.c
index 00f3f562ab5d..8924bbc55635 100644
--- a/drivers/vdpa
. Until it is completed,
let's fail features check if control-queue feature is
requested.
Signed-off-by: Maxime Coquelin
---
drivers/vdpa/vdpa_user/vduse_dev.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/vdpa/vdpa_user/vduse_dev.c
b/drivers/vdpa/vdpa_user/vduse_dev.c
-off-by: Maxime Coquelin
---
drivers/vdpa/vdpa_user/vduse_dev.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/vdpa/vdpa_user/vduse_dev.c
b/drivers/vdpa/vdpa_user/vduse_dev.c
index 0ddd4b8abecb..a5af6d4077b8 100644
--- a/drivers/vdpa/vdpa_user/vduse_dev.c
+++ b
Net device type (Jason).
- Rebased on latest master.
Changes in v5:
==
- Move control queue disablement patch before Net
devices enablement (Jason).
- Unify operations LSM hooks into a single hook.
- Rebase on latest master.
Maxime Coquelin (3):
vduse: validate block features
On 1/5/24 10:59, Eugenio Perez Martin wrote:
On Fri, Jan 5, 2024 at 9:12 AM Maxime Coquelin
wrote:
On 1/5/24 03:45, Jason Wang wrote:
On Thu, Jan 4, 2024 at 11:38 PM Maxime Coquelin
wrote:
Virtio-net driver control queue implementation is not safe
when used with VDUSE. If the VDUSE
On 1/5/24 03:45, Jason Wang wrote:
On Thu, Jan 4, 2024 at 11:38 PM Maxime Coquelin
wrote:
Virtio-net driver control queue implementation is not safe
when used with VDUSE. If the VDUSE application does not
reply to control queue messages, it currently ends up
hanging the kernel thread
This patch adds Virtio-net device type to the supported
devices types.
Initialization fails if the device does not support
VIRTIO_F_VERSION_1 feature, in order to guarantee the
configuration space is read-only. It also fails with
-EPERM if the CAP_NET_ADMIN is missing.
Signed-off-by: Maxime
. Until it is completed,
let's fail features check if any control-queue related
feature is requested.
Signed-off-by: Maxime Coquelin
---
drivers/vdpa/vdpa_user/vduse_dev.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/vdpa/vdpa_user/vduse_dev.c
b/drivers
This patch is preliminary work to enable network device
type support to VDUSE.
As VIRTIO_BLK_F_CONFIG_WCE shares the same value as
VIRTIO_NET_F_HOST_TSO4, we need to restrict its check
to Virtio-blk device type.
Acked-by: Jason Wang
Reviewed-by: Xie Yongji
Signed-off-by: Maxime Coquelin
(Jason).
- Rebased on latest master.
Changes in v5:
==
- Move control queue disablement patch before Net
devices enablement (Jason).
- Unify operations LSM hooks into a single hook.
- Rebase on latest master.
Maxime Coquelin (3):
vduse: validate block features only with block
On 12/18/23 18:33, Stephen Smalley wrote:
On Mon, Dec 18, 2023 at 12:21 PM Stephen Smalley
wrote:
On Tue, Dec 12, 2023 at 8:17 AM Maxime Coquelin
wrote:
This patch introduces a LSM hook for devices creation,
destruction (ioctl()) and opening (open()) operations,
checking the application
On 12/18/23 03:50, Jason Wang wrote:
On Wed, Dec 13, 2023 at 7:23 PM Maxime Coquelin
wrote:
Hi Jason,
On 12/13/23 05:52, Jason Wang wrote:
On Tue, Dec 12, 2023 at 9:17 PM Maxime Coquelin
wrote:
Virtio-net driver control queue implementation is not safe
when used with VDUSE. If the
Hi Jason,
On 12/13/23 05:52, Jason Wang wrote:
On Tue, Dec 12, 2023 at 9:17 PM Maxime Coquelin
wrote:
Virtio-net driver control queue implementation is not safe
when used with VDUSE. If the VDUSE application does not
reply to control queue messages, it currently ends up
hanging the kernel
This patch introduces a LSM hook for devices creation,
destruction (ioctl()) and opening (open()) operations,
checking the application is allowed to perform these
operations for the Virtio device type.
Signed-off-by: Maxime Coquelin
---
MAINTAINERS | 1 +
drivers/vdpa
. Until it is completed,
let's disable control virtqueue and features that depend on
it.
Signed-off-by: Maxime Coquelin
---
drivers/vdpa/vdpa_user/vduse_dev.c | 37 ++
1 file changed, 37 insertions(+)
diff --git a/drivers/vdpa/vdpa_user/vduse_dev.c
b/drivers
This patch adds Virtio-net device type to the supported
devices types. Initialization fails if the device does
not support VIRTIO_F_VERSION_1 feature, in order to
guarantee the configuration space is read-only.
Acked-by: Jason Wang
Reviewed-by: Xie Yongji
Signed-off-by: Maxime Coquelin
This patch is preliminary work to enable network device
type support to VDUSE.
As VIRTIO_BLK_F_CONFIG_WCE shares the same value as
VIRTIO_NET_F_HOST_TSO4, we need to restrict its check
to Virtio-blk device type.
Acked-by: Jason Wang
Reviewed-by: Xie Yongji
Signed-off-by: Maxime Coquelin
block device type,
- net: Virtio networking device type.
Changes in v5:
==
- Move control queue disablement patch before Net
devices enablement (Jason).
- Unify operations LSM hooks into a single hook.
- Rebase on latest master.
Maxime Coquelin (4):
vduse: validate block features
On 12/8/23 13:26, Michael S. Tsirkin wrote:
On Fri, Dec 08, 2023 at 01:23:00PM +0100, Maxime Coquelin wrote:
On 12/8/23 12:05, Michael S. Tsirkin wrote:
On Fri, Dec 08, 2023 at 12:01:15PM +0100, Maxime Coquelin wrote:
Hello Paul,
On 11/8/23 03:31, Paul Moore wrote:
On Oct 20, 2023
On 12/8/23 12:05, Michael S. Tsirkin wrote:
On Fri, Dec 08, 2023 at 12:01:15PM +0100, Maxime Coquelin wrote:
Hello Paul,
On 11/8/23 03:31, Paul Moore wrote:
On Oct 20, 2023 "Michael S. Tsirkin" wrote:
This patch introduces LSM hooks for devices creation,
destruction a
ned-off-by: Maxime Coquelin
---
drivers/vdpa/vdpa_user/vduse_dev.c | 12 +++
include/linux/lsm_hook_defs.h | 4 +++
include/linux/security.h| 15
security/security.c | 42 ++
security/selinux/hooks.c
#x27;d just change the condition from
if (state->crtc)
to
if (state->crtc && val != ipu->sharpness)
It's going to be easier to extend if you ever need to. Also, drivers
usually do this in atomic_check, is there a specific reason to do it in
atomic_set_property?
Maxime
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> call request_irq in your bind/probe with the interrupts enabled at the
> > controller level, and mask them when needed at the device level by
> > clearing / setting that bit.
> >
> Yeah, we have display controller interrupts setting and clear register.
> But the interrupts all been enabled in bootloader(eg, lk or uboot),
> if the interrupt handler is active in the probe/bind phase by request_irq,
> but the whole display pipeline is not ready, there maybe have some problems.
It's fairly common to clear / ack the interrupts from the device before
calling request_irq precisely to avoid that issue.
Maxime
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Hi,
On Thu, Apr 15, 2021 at 08:18:52AM +0800, Kevin Tang wrote:
> Maxime Ripard 于2021年3月24日周三 下午7:10写道：
> > > +static struct sprd_dpu *sprd_crtc_init(struct drm_device *drm,
> > > + struct drm_plane *primary)
> > > +{
> > > + struc
On Fri, Apr 09, 2021 at 08:23:19AM +0800, Kevin Tang wrote:
> Maxime Ripard 于2021年4月7日周三 下午6:46写道：
>
> > On Wed, Mar 31, 2021 at 09:49:14AM +0800, Kevin Tang wrote:
> > > Hi Maxime,
> > >
> > > Maxime Ripard 于2021年3月24日周三 下午7:13写道：
> > >
> &g
-by: Jernej Skrabec
Signed-off-by: Maxime Ripard
---
Changes from v1:
- Rebased on latest drm-misc-next tag
- Added the tags
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 +---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 3 +--
drivers/gpu/drm/drm_connector.c
those drivers.
Reviewed-by: Harry Wentland
Reviewed-by: Jernej Skrabec
Signed-off-by: Maxime Ripard
---
Changes from v1:
- Rebased on latest drm-misc-next tag
- Added the tags
- Fix build breakage on amdgpu
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 23 ++-
drivers/gp
The intel driver uses the same logic to attach the Colorspace property
in multiple places and we'll need it in vc4 too. Let's move that common
code in a helper.
Signed-off-by: Maxime Ripard
---
Changes from v1:
- New patch
---
drivers/gpu/drm/drm_connector.c
From: Dave Stevenson
Now that we can export deeper colour depths, add in the signalling
for HDR metadata.
Signed-off-by: Dave Stevenson
Signed-off-by: Maxime Ripard
---
Changes from v1:
- Rebased on latest drm-misc-next tag
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 53
Our driver while supporting HDR didn't send the proper colorimetry info
in the AVI infoframe.
Let's add the property needed so that the userspace can let us know what
the colorspace is supposed to be.
Signed-off-by: Maxime Ripard
---
Changes from v1:
- New patch
---
drivers/g
ll the requests are done.
* Similarly, clk_round_rate has been adjusted to take the requests
into account and return a rate that will be greater or equal to the
requested rates.
Signed-off-by: Maxime Ripard
---
drivers/clk/clk.c | 121
include/li
The new clock request API allows us to increase the rate of the HSM
clock to match our pixel rate requirements while decreasing it when
we're done, resulting in a better power-efficiency.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 19 ---
drivers/gp
x27;t have an use-case for something else, this should
maybe be made more flexible?
Let me know what you think
Maxime
Maxime Ripard (2):
clk: Introduce a clock request API
drm/vc4: hdmi: Convert to the new clock request API
drivers/clk/clk.c
e arm-soc-fixes tree.
>
> Thanks for the report, I've temporarily removed the sunx-fixes branch merge
> from the arm/fixes branch and will send the pull request without it.
>
> Maxime, can you fix it up and resend the pull request?
> Feel free to add any other fixes that have
updated a lot
> on the basic ip version,
> the entire control register is different, i have cc to drm/bridge reviewers
> and maintainers.
You should make it more obvious then in a comment or in the name of the
driver. If it's fairly different from the original IP from Synopsys,
maybe you should just drop the reference to the name?
Maxime
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On Wed, Mar 31, 2021 at 09:49:14AM +0800, Kevin Tang wrote:
> Hi Maxime,
>
> Maxime Ripard 于2021年3月24日周三 下午7:13写道：
>
> > On Mon, Feb 22, 2021 at 09:28:21PM +0800, Kevin Tang wrote:
> > > From: Kevin Tang
> > >
> > > Adds MIPI DSI Controller
ere is better?
This doesn't have any relationship to the htotal and vtotal though? it's
something that is carried over by the MIPI-DSI functions and struct
mipi_dsi_device.
> >
> > > + }
> > > +
> > > + return MODE_OK;
> > > +}
> > > +
> > > +static void sprd_crtc_atomic_enable(struct drm_crtc *crtc,
> > > +struct drm_atomic_state *state)
> > > +{
> > > + struct sprd_dpu *dpu = to_sprd_crtc(crtc);
> > > +
> > > + sprd_dpu_init(dpu);
> > > +
> > > + sprd_dpi_init(dpu);
> > > +
> > > + enable_irq(dpu->ctx.irq);
> >
> > Shouldn't this be in enable_vblank? And I would assume that you would
> > have the interrupts enabled all the time, but disabled in your device?
> >
> It seems better to put in enable_vblank, i will try and test it... Thks
>
> And I would assume that you would
> have the interrupts enabled all the time, but disabled in your device?
> [kevin]I don’t quite understand this, can you help me explain it in
> detail?
You seem to have a register that enables and disables the interrupt in
that device. The way we usually deal with them in this case is just to
call request_irq in your bind/probe with the interrupts enabled at the
controller level, and mask them when needed at the device level by
clearing / setting that bit.
Maxime
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nd related issues (HDMI-CEC and suspend/resume with
> > Crust) on all boards, switch to internal oscillator.
> >
> > Fixes: 32507b868119 ("arm64: dts: allwinner: h6: Move ext. oscillator to
> > board DTs")
> > Signed-off-by: Jernej Skrabec
>
> Tested-by: Clément Péron
Applied, thanks!
Maxime
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implemented with support for PAL and NTSC autodetection.
Signed-off-by: Maxime Chevallier
---
v1 -> v2: Set the media entity type to decoder, and implement the
s_std/g_std ops
V2 ->V3 : Fix coding-style issues, and remove the use of the bulk API
for regulators. Make the driver select the
Add prefix for Techwell, Inc.
Acked-by: Rob Herring
Signed-off-by: Maxime Chevallier
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml
b/Documentation/devicetree/bindings
he notable
addition of the querystd ops for standard detection.
Any feedback is appreciated,
Thanks,
Maxime
Maxime Chevallier (3):
dt-bindings: vendor-prefixes: Add techwell vendor prefix
media: dt-bindings: media: i2c: Add bindings for TW9900
media: i2c: Introduce a driver for the Techw
The Techwell TW9900 is a video decoder supporting multiple input
standards, such as PAL, NTSC and SECAM, and outputs a BT.656 video
signal.
It's designed to be low-power, posesses some features such as a
programmable comb-filter, and automatic input standard detection.
Signed-off-by: M
xi_scpi_psci_ops.validate_power_state, and updating psci_setup.c
>to also check for .validate_power_state when setting psci_caps.
> 3) Modify the Linux PSCI client to respect PSCI_FEATURES when setting
>psci_ops.cpu_suspend. cpuidle-psci checks for this function before
>setting up idle states.
> 4) Finally, after some time, add the idle states to the DTS.
>
> In fact, this solution solves both scenarios 2 and 3, because it also
> takes care of the native PM implementation, which doesn't implement
> CPU_SUSPEND at all.
>
> Does that sound workable?
If we can add the DT node at boot in crust (or in TF-A), then we don't
really need PSCI_FEATURES, and it would magically work once the firmware
is updated. It looks like a solid plan otherwise
Maxime
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On Mon, Mar 29, 2021 at 04:15:28PM +0100, Paul Cercueil wrote:
> Hi Maxime,
>
> Le lun. 29 mars 2021 à 16:07, Maxime Ripard a écrit :
> > On Sat, Mar 27, 2021 at 11:22:14AM +, Paul Cercueil wrote:
> > > The ingenic-drm driver has two mutually exclusive primary plane
a CRTC should only
have a single primary, so I'd say that the invalid assumption was that
it was possible to have multiple primary planes for a CRTC.
Since it looks like you have two mutually exclusive planes, just expose
one and be done with it?
Maxime
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e_rate % 4000 ? 22579200 : 24576000;
>^
>
> Signed-off-by: Pierre-Louis Bossart
Acked-by: Maxime Ripard
Thanks!
Maxime
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sociated DPU.
> + port@1:
> +type: object
> +description:
> + A port node with endpoint definitions as defined in
> + Documentation/devicetree/bindings/media/video-interfaces.txt.
> + That port should be the output endpoint, usually output to
> + the associated panel.
The DSI generic binding asks that peripherals that are controlled
through a DCS be a subnode of the MIPI-DSI bus, not through a port
endpoint.
Maxime
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gt;event = NULL;
> + }
> + spin_unlock_irq(&drm->event_lock);
> +}
> +
> +static int sprd_crtc_atomic_check(struct drm_crtc *crtc,
> + struct drm_atomic_state *state)
> +{
> + drm_dbg(crtc->dev, "%s()\n", __func__);
> +
> + return 0;
> +}
> +
> +static void sprd_crtc_atomic_flush(struct drm_crtc *crtc,
> + struct drm_atomic_state *state)
> +
> +{
> + struct sprd_dpu *dpu = to_sprd_crtc(crtc);
> + struct drm_device *drm = dpu->base.dev;
> +
> + sprd_dpu_flip(dpu);
> +
> + spin_lock_irq(&drm->event_lock);
> + if (crtc->state->event) {
> + drm_crtc_send_vblank_event(crtc, crtc->state->event);
> + crtc->state->event = NULL;
> + }
> + spin_unlock_irq(&drm->event_lock);
> +}
> +
> +static int sprd_crtc_enable_vblank(struct drm_crtc *crtc)
> +{
> + struct sprd_dpu *dpu = to_sprd_crtc(crtc);
> +
> + dpu_reg_set(&dpu->ctx, REG_DPU_INT_EN, BIT_DPU_INT_VSYNC);
> +
> + return 0;
> +}
> +
> +static void sprd_crtc_disable_vblank(struct drm_crtc *crtc)
> +{
> + struct sprd_dpu *dpu = to_sprd_crtc(crtc);
> +
> + dpu_reg_clr(&dpu->ctx, REG_DPU_INT_EN, BIT_DPU_INT_VSYNC);
> +}
> +
> +static const struct drm_crtc_helper_funcs sprd_crtc_helper_funcs = {
> + .mode_valid = sprd_crtc_mode_valid,
> + .atomic_check = sprd_crtc_atomic_check,
> + .atomic_flush = sprd_crtc_atomic_flush,
> + .atomic_enable = sprd_crtc_atomic_enable,
> + .atomic_disable = sprd_crtc_atomic_disable,
> +};
> +
> +static const struct drm_crtc_funcs sprd_crtc_funcs = {
> + .destroy= drm_crtc_cleanup,
> + .set_config = drm_atomic_helper_set_config,
> + .page_flip = drm_atomic_helper_page_flip,
> + .reset = drm_atomic_helper_crtc_reset,
> + .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
> + .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
> + .enable_vblank = sprd_crtc_enable_vblank,
> + .disable_vblank = sprd_crtc_disable_vblank,
> +};
> +
> +static struct sprd_dpu *sprd_crtc_init(struct drm_device *drm,
> + struct drm_plane *primary)
> +{
> + struct device_node *port;
> + struct sprd_dpu *dpu;
> +
> + /*
> + * set crtc port so that drm_of_find_possible_crtcs call works
> + */
> + port = of_parse_phandle(drm->dev->of_node, "ports", 0);
> + if (!port) {
> + drm_err(drm, "find 'ports' phandle of %s failed\n",
> + drm->dev->of_node->full_name);
> + return ERR_PTR(-EINVAL);
> + }
> + of_node_put(port);
The YAML binding should already make sure that your binding is sane, and
if you still get a DT that doesn't follow it, you have a whole lot of
other issues than whether ports is there :)
> + dpu = drmm_crtc_alloc_with_planes(drm, struct sprd_dpu, base,
> + primary, NULL,
> + &sprd_crtc_funcs, NULL);
> + if (IS_ERR(dpu)) {
> + drm_err(drm, "failed to init crtc.\n");
> + return dpu;
> + }
> +
> + dpu->base.port = port;
But you're still referencing it here, while you called of_node_put on it
already? You should only call it once you're done with it.
I'm not really sure why you would need drm_of_find_possible_crtcs to
work then if you don't follow the OF-Graph bindings.
Maxime
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_helper_poll_fini(drm);
> +err_unbind_all:
> + component_unbind_all(drm->dev, drm);
> + return ret;
> +}
> +
> +static void sprd_drm_unbind(struct device *dev)
> +{
> + struct drm_device *drm = dev_get_drvdata(dev);
> +
> + drm_dev_unregister(drm);
> +
> + drm_kms_helper_poll_fini(drm);
> +
> + component_unbind_all(drm->dev, drm);
> +}
> +
> +static const struct component_master_ops drm_component_ops = {
> + .bind = sprd_drm_bind,
> + .unbind = sprd_drm_unbind,
> +};
> +
> +static int compare_of(struct device *dev, void *data)
> +{
> + return dev->of_node == data;
> +}
> +
> +static int sprd_drm_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + int ret;
> +
> + ret = dma_set_mask_and_coherent(dev, ~0UL);
> + if (ret) {
> + dev_err(dev, "dma_set_mask_and_coherent failed (%d)\n", ret);
> + return ret;
> + }
It's not really clear to me what it's here for. Could you explain with a
comment here?
Thanks
Maxime
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aurent Pinchart
> Cc: Jonas Karlman
> Cc: Andrzej Hajda
> Cc: Jernej Škrabec
> Cc: Daniel Vetter
> Signed-off-by: Robert Foss
Acked-by: Maxime Ripard
Maxime
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onnect the panel. And it cannot work, because the
> > > > > DSI host's binding specifies a single port: the input port from the
> > > > > display engine.
> > > >
> > > > Thanks for noticing this. I did understand your point and yes, I did
> > > > mention the updated pipeline in previous versions and forgot to add it
> > > > to this series.
> > > >
> > > > Here is the updated pipeline to make it work:
> > > >
> > > > https://patchwork.kernel.org/project/dri-devel/patch/20190524104252.20236-1-ja...@amarulasolutions.com/
> > > >
> > > > Let me know your comments on this, so I will add a patch for the
> > > > above-affected DTS files.
> > >
> > > DT is an ABI, we need to ensure backward compatibility. Changes in
> > > kernel drivers can't break devices that have an old DT.
> >
> > Thanks for your point.
> >
> > So, we need to choose APIs that would compatible with the old DT and
> > new DT changes. Am I correct?
>
> Yes, that's correct.
However, I see no particular reason to change the DT binding in this
case. The DSI devices are supposed to be described through a subnode of
their DSI controller, that's the generic binding and except for very odd
devices (and a bridge like this one is certainly not one), I see no
reason to deviate from that.
Maxime
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hi,
On Tue, Mar 23, 2021 at 09:43:41PM +0100, Jernej Skrabec wrote:
> Beelink X2 has power button. Add node for it.
>
> Signed-off-by: Jernej Skrabec
Applied, thanks
Maxime
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On Sat, Mar 20, 2021 at 02:20:56AM +0200, Laurent Pinchart wrote:
> Hi Maxime,
>
> Thank you for the patch.
>
> On Fri, Mar 19, 2021 at 04:29:20PM +0100, Maxime Ripard wrote:
> > Commit 977697e20b3d ("drm/atomic: Pass the full state to planes atomic
> > disable
Remove it.
Fixes: 977697e20b3d ("drm/atomic: Pass the full state to planes atomic disable
and update")
Reported-by: Stephen Rothwell
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/r
From: Dave Stevenson
Now that we can export deeper colour depths, add in the signalling
for HDR metadata.
Signed-off-by: Dave Stevenson
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 53 ++
drivers/gpu/drm/vc4/vc4_hdmi.h | 3 ++
2 files
All the drivers that implement HDR output call pretty much the same
function to initialise the hdr_output_metadata property, and while the
creation of that property is in a helper, every driver uses the same
code to attach it.
Provide a helper for it as well
Signed-off-by: Maxime Ripard
those drivers.
Signed-off-by: Maxime Ripard
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 21 +-
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 17 +--
drivers/gpu/drm/drm_connector.c | 28 +++
drivers/gpu/drm/i915/display/intel_atomic.c
at all.
> In a couple of cases, fixing the compatible revealed some schema errors
> which are fixed.
>
> There's a bunch of others remaining after this which have bindings, but
> those aren't converted to schema yet.
>
> Cc: Stephen Boyd
> Cc: Maxime Ripard
>
t;
> Cc: Nicolas Saenz Julienne
> Cc: Maxime Ripard
> Cc: Linus Walleij
> Cc: Bartosz Golaszewski
> Cc: Bjorn Andersson
> Cc: Krzysztof Kozlowski
> Cc: Marc Kleine-Budde
> Cc: "David S. Miller"
> Cc: Jakub Kicinski
> Cc: Srinivas Kandagatla
>
r supports only the 32 first locks. This is the reason the
> first way (lock read/write) approach is used to be able to cover all 256
> locks in future devices. The driver also reports the amount of supported
> locks via debugfs.
>
> Signed-off-by: Wilken Gottwalt
Acked-by: Maxime Ripard
Maxime
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On Sun, Mar 14, 2021 at 10:30:49AM +0100, Wilken Gottwalt wrote:
> Adds documentation on how to use the sun6i_hwspinlock driver for sun6i
> compatible series SoCs.
>
> Signed-off-by: Wilken Gottwalt
Acked-by: Maxime Ripard
Maxime
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Hi!
On Mon, Mar 08, 2021 at 10:47:03AM +0800, 班涛 wrote:
> Maxime Ripard 于2021年3月5日周五 上午12:07写道：
>
> > Hi,
> >
> > On Tue, Mar 02, 2021 at 08:37:37PM +0800, Ban Tao wrote:
> > > From: Ban Tao
> > >
> > > The Allwinner R818, A133, R329, V536 and
Hi,
On Thu, Mar 11, 2021 at 10:59:35PM +0100, Jernej Škrabec wrote:
> Hi!
>
> Dne ponedeljek, 08. marec 2021 ob 14:05:06 CET je Maxime Ripard napisal(a):
> > Hi
> >
> > On Sat, Mar 06, 2021 at 09:36:11PM +0100, Jernej Skrabec wrote:
> > > Beelink
>
> Signed-off-by: Samuel Holland
Acked-by: Maxime Ripard
Thanks!
Maxime
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; Signed-off-by: Samuel Holland
Acked-by: Maxime Ripard
Thanks!
Maxime
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Hi Hans, and thanks for the review.
On Thu, 4 Mar 2021 16:37:53 +0100
Hans Verkuil wrote:
>Hi Maxime,
>
>Some more code review comments:
>
>> +static int tw9900_set_fmt(struct v4l2_subdev *sd,
>> + struct v4l2_subdev_pad_config *cfg,
>>
Hi,
On Tue, Mar 09, 2021 at 09:03:14AM +0100, Rasmus Villemoes wrote:
> On 03/09/2020 06.00, Samuel Holland wrote:
> > Stephen, Maxime,
> >
> > You previously asked me to implement the protected-clocks property in a
> > driver-independent way:
> >
> > h
;PH23", "PH24", "PH25",
> + "PH26", "PH27";
> + function = "emac";
> + };
> +
> + emac_pa_pins: emac-pa-pins {
> + pins = "PA0", "PA1", "PA2",
> +"PA3", "PA4", "PA5", "PA6",
> +"PA7", "PA8", "PA9", "PA10",
> +"PA11", "PA12", "PA13", "PA14",
> +"PA15", "PA16";
> + function = "emac";
> + };
> +
I guess you forgot to remove that node?
Maxime
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escription: Phandle to the device SRAM
> $ref: /schemas/types.yaml#/definitions/phandle-array
>
> + resets:
> +maxItems: 1
> +
You should make resets required for the R40 compatible too through an if
clause.
It looks good otherwise, thanks!
Maxime
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On Sat, Mar 06, 2021 at 12:05:22PM +0100, Wilken Gottwalt wrote:
> On Tue, 2 Mar 2021 18:20:02 +0100
> Maxime Ripard wrote:
>
> > Hi,
> >
> > On Mon, Mar 01, 2021 at 03:06:08PM +0100, Wilken Gottwalt wrote:
> > > On Mon, 1 Mar 2021 14:13:05 +0100
> >
0_get_apb1_factors'
> > drivers/clk/sunxi/clk-usb.c:22: warning: cannot understand function
> > prototype: 'struct usb_reset_data '
> > drivers/clk/sunxi/clk-sun6i-ar100.c:26: warning: Function parameter or
> > member 'req' not described in '
oller allows a higher bus frequency, and it is more CPU-efficient.
>
> Signed-off-by: Samuel Holland
Applied, thanks
Maxime
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: i2c0-pins {
> pins = "PB0", "PB1";
> function = "i2c0";
> @@ -885,6 +917,27 @@
> };
> };
>
> + emac: ethernet@1c0b000 {
> + syscon = <&ccu>;
Why is the syscon needed? You weren't using it in the driver
> + compatible = "allwinner,sun4i-a10-emac";
> + reg = <0x01c0b000 0x1000>;
> + interrupts = ;
> + clocks = <&ccu CLK_BUS_EMAC>;
> + resets = <&ccu RST_BUS_EMAC>;
> + allwinner,sram = <&emac_sram 1>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&emac_ph_pins>;
If there's several options, we really can't enforce a default here, it
should be in the board DTS.
Maxime
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mpatible requires a reset
line or not.
The dt binding should also be amended to allow the reset property
> + db->reset = reset;
> + ret = reset_control_deassert(db->reset);
> + if (ret) {
> + dev_err(&pdev->dev, "could not deassert EMAC reset\n&quo
ot;;
> +
> + power {
> + label = "power";
IIRC the node name is used as a fallback when the label isn't there?
Maxime
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e done using the YAML format now to enable the DT
validation.
Maxime
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e previous version though, without proper SoC support
upstream, that driver would effectively be dead code
Maxime
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On Fri, Feb 26, 2021 at 01:53:00PM +0100, Marjan Pascolo wrote:
> Hi Maxime,
>
> Il 17/02/2021 12:03, Maxime Ripard ha scritto:
> > Hi,
> >
> > On Wed, Feb 10, 2021 at 05:22:37PM +0100, Marjan Pascolo wrote:
> > > On Allwinner SoC interrupt debounce
Hi,
On Mon, Mar 01, 2021 at 03:06:08PM +0100, Wilken Gottwalt wrote:
> On Mon, 1 Mar 2021 14:13:05 +0100
> Maxime Ripard wrote:
>
> > On Sat, Feb 27, 2021 at 02:03:54PM +0100, Wilken Gottwalt wrote:
> > > Adds the sun6i_hwspinlock driver for the hardware spinlock unit fo
On Mon, Mar 01, 2021 at 03:06:35PM +0100, Wilken Gottwalt wrote:
> On Mon, 1 Mar 2021 14:12:44 +0100
> Maxime Ripard wrote:
>
> > On Sat, Feb 27, 2021 at 02:03:28PM +0100, Wilken Gottwalt wrote:
> > > Adds documentation on how to use the sun6i_hwspinlock driver for sun6i
On Fri, Feb 26, 2021 at 10:40:24PM +0530, Jagan Teki wrote:
> On Fri, Feb 26, 2021 at 10:27 PM Maxime Ripard wrote:
> >
> > Hi,
> >
> > On Mon, Feb 15, 2021 at 01:11:01AM +0530, Jagan Teki wrote:
> > > Use drm_panel_bridge to replace manual panel handling c
RSB clock support patch.
> This should be merged for v5.12.
It's not really a fix but something we can live with, so I've merged it
to sunxi/dt-for-5.13
Thanks!
Maxime
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d-dai-cells = <0>;
> + compatible = "allwinner,sun8i-h3-i2s";
We should also have a v3 specific compatible here in addition to the H3
(and document it in the bindings).
Maxime
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On Fri, Feb 26, 2021 at 11:30:26AM +0100, Tobias Schramm wrote:
> The V3s, V3 and S3 SoCs have a dma controller. Add it to the dts.
>
> Signed-off-by: Tobias Schramm
Applied, thanks
Maxime
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r supports only the 32 first locks. This is the reason the
> first way (lock read/write) approach is used to be able to cover all 256
> locks in future devices. The driver also reports the amount of supported
> locks via debugfs.
>
> Signed-off-by: Wilken Gottwalt
Didn't I review this one already?
Maxime
ion
>
> Changes in v5:
> - changed binding to earliest known supported SoC sun6i-a31
> - dropped unnecessary entries
>
> Changes in v4:
> - changed binding to sun8i-a33-hwpinlock
> - added changes suggested by Maxime Ripard
>
> Changes in v3:
> -
ll connector operations
> internally.
>
> Signed-off-by: Jagan Teki
Most of the code removed in that patch was actually introduced earlier
which feels a bit weird. Is there a reason we can't do that one first,
and then introduce the bridge support?
Maxime
ges from v4:
> * Reorder nodes alphabetically
>
> Changes from v3:
> * Fix DT validation warnings
> * Remove leftover labels
>
> Changes from v2:
> * Collected acked-by.
Queued for 5.13, thanks!
Maxime
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Hi,
On Wed, Feb 24, 2021 at 12:33:45PM +0100, Thomas Zimmermann wrote:
> Hi Maxime,
>
> for the whole series:
>
> Acked-by: Thomas Zimmermann
Applied the whole series, thanks to everyone involved in the review,
it's been a pretty daunting one :)
Maxime
signature.
linux,code = ;
> + channel = <0>;
> + voltage = <761904>;
> + };
> +
> + button-571 {
> + label = "Volume Up";
> + linux,code = ;
> + channel = <0>;
> +
Hi Thomas,
On Mon, Feb 22, 2021 at 10:12:49AM +0100, Thomas Zimmermann wrote:
> Am 19.02.21 um 13:00 schrieb Maxime Ripard:
> > Many drivers reference the plane->state pointer in order to get the
> > current plane state in their atomic_check hook, which would be the old
>
named old_state, so I was
actually trying to make the drivers consistent here: having one variable
with old_state and new_plane_state felt weird.
The heuristic is thus to use the convention of the driver if one exists
already, and if there's none pick new_plane_state.
It makes it indeed inconsi
Reviewed-by: Ville Syrjälä
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/arc/arcpgu_crtc.c | 4 +++-
drivers/gpu/drm/arm/hdlcd_crtc.c| 3 ++-
drivers/gpu/drm/arm/malidp_planes.c | 3 ++-
drivers/gpu/drm/armada/armada_overlay.c | 3 ++-
drivers/
->state
+ state
...+>
}
Reviewed-by: Laurent Pinchart
Signed-off-by: Maxime Ripard
---
Changes from v1:
- Reintroduce the old_plane_state check in zynqmp_disp_crtc_atomic_disable
---
drivers/gpu/drm/arc/arcpgu_crtc.c | 2 +-
drivers/gpu/drm/arm/disp
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