[PATCH] mmc: dw_mmc-k3: Fix DDR52 mode by setting required clock divisor

2018-03-29 Thread oscardagrach
Signed-off-by: oscardagrach <r...@edited.us> --- drivers/mmc/host/dw_mmc-k3.c | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/dw_mmc-k3.c b/drivers/mmc/host/dw_mmc-k3.c index 89cdb3d533bb..efc546cb4db8 100644 --- a/drivers/mmc/host/dw_mmc-k3.c

[PATCH] mmc: dw_mmc-k3: Fix DDR52 mode by setting required clock divisor

2018-03-29 Thread oscardagrach
Signed-off-by: oscardagrach --- drivers/mmc/host/dw_mmc-k3.c | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/dw_mmc-k3.c b/drivers/mmc/host/dw_mmc-k3.c index 89cdb3d533bb..efc546cb4db8 100644 --- a/drivers/mmc/host/dw_mmc-k3.c +++ b/drivers/mmc

[PATCH] arm64: dts: hikey: Enable HS200 mode on eMMC

2018-01-17 Thread oscardagrach
According to the hi6220 datasheet, the MMC controller is JEDEC eMMC 4.5 compliant, in addition to supporting a clock of up to 150MHz. The Hikey schematic also indicates the device utilizes 1.8v signaling. Define these parameters in the device tree to enable HS200 mode. Signed-off-by: Ryan Grachek

[PATCH] arm64: dts: hikey: Enable HS200 mode on eMMC

2018-01-17 Thread oscardagrach
According to the hi6220 datasheet, the MMC controller is JEDEC eMMC 4.5 compliant, in addition to supporting a clock of up to 150MHz. The Hikey schematic also indicates the device utilizes 1.8v signaling. Define these parameters in the device tree to enable HS200 mode. Signed-off-by: Ryan Grachek