m-ker...@lists.infradead.org (moderated list:ARM64 PORT (AARCH64
ARCHITECTURE))
linux-kernel@vger.kernel.org (open list)
I'll send to Will and Catalin next time.
On Sun, Mar 24, 2019 at 08:58:03AM +0800, qiaozhou wrote:
From: Qiao Zhou
Add ARCH_ASR
You'll need to expand this.
Yes
From: Qiao Zhou
Add ARCH_ASR
Signed-off-by: qiaozhou
---
arch/arm64/Kconfig.platforms | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 70498a0..da8d43a 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64
From: Qiao Zhou
Add ARCH_ASR
Signed-off-by: qiaozhou
---
arch/arm64/Kconfig.platforms | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 70498a0..da8d43a 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64
From: Qiao Zhou
Add initial dtsi file to support ASR Aquilac SoC. It has two clusters.
Cluster0 has 4 * Cortex-A53 and Cluster1 has 4 * Cortex-A73.
Also add dts file to support ASR Aquilac SoC development board which is
based on ASR AquilaC SoC.
Signed-off-by: qiaozhou
---
arch/arm64/boot
From: Qiao Zhou
Add ARCH_ASR
Signed-off-by: qiaozhou
---
arch/arm64/Kconfig.platforms | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 70498a0..da8d43a 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64
Add dtsi file for ASR8751C SoC and dts file for ASR8751C AquilaC development
board. Also add necessary dt-bindings document, header files.
Will add more driver of ASR8751C SoC in later patches.
Qiao Zhou (7):
dt-bindings: arm: asr: add ASR8751C bindings
dt-bindings: bus: add ASR8751C APB/AXI
-by: qiaozhou
---
.../devicetree/bindings/clock/asr,clock.txt| 31 ++
1 file changed, 31 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/asr,clock.txt
diff --git a/Documentation/devicetree/bindings/clock/asr,clock.txt
b/Documentation/devicetree
From: Qiao Zhou
Add binding documentation for ASR8751C AXI/APB bus that are used
to interface with peripherals. AXI/APB bus follow standard AXI/APB
protocols.
Signed-off-by: qiaozhou
---
Documentation/devicetree/bindings/bus/asr,bus.txt | 42 +++
1 file changed, 42
.
3. clk-pll driver is for pll configuration.
Signed-off-by: qiaozhou
---
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile | 1 +
drivers/clk/asr/Kconfig | 17 ++
drivers/clk/asr/Makefile | 6 +
drivers/clk/asr/clk-aquilac.c | 595
From: Qiao Zhou
Add header file used by both ASR8751C clock driver and device tree file.
Signed-off-by: qiaozhou
---
include/dt-bindings/clock/asr8751c-clk.h | 252 +++
1 file changed, 252 insertions(+)
create mode 100644 include/dt-bindings/clock/asr8751c-clk.h
From: Qiao Zhou
Add binding documentation for ASR8751C serial device.
Signed-off-by: qiaozhou
---
.../devicetree/bindings/serial/asr-serial.txt | 23 ++
1 file changed, 23 insertions(+)
create mode 100644 Documentation/devicetree/bindings/serial/asr-serial.txt
diff
From: Qiao Zhou
Add new vendor for ASR and add binding document for ASR8751C SoC and initial
board: aquilac-evb
Signed-off-by: qiaozhou
---
Documentation/devicetree/bindings/arm/asr/asr-8751c.txt | 9 +
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
2 files changed, 10
From: Qiao Zhou
Add pinctrl definition and configuration of ASR8751C pins. The
configuration contains pull up/down, driver strength, edge detection,
multiple function etc.
Signed-off-by: qiaozhou
---
include/dt-bindings/pinctrl/asr8751c-pinfunc.h | 341 +
1 file
Hi,
This patch needs refine and I'll check more. Thanks a lot.
On 2018年02月05日 10:17, kbuild test robot wrote:
Hi Qiao,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on tip/timers/nohz]
[also build test ERROR on v4.15]
[if your patch is applied to the wrong git tree
Hi Will,
On 2017年10月02日 22:14, Will Deacon wrote:
Hi Qiao,
On Mon, Sep 25, 2017 at 07:02:03PM +0800, qiaozhou wrote:
Will this bodging patch be merged? It can solve the livelock issue on arm64
platforms(at least improve a lot).
Whilst it seemed to help in some cases, I'm not keen to
Hi Will,
Will this bodging patch be merged? It can solve the livelock issue on
arm64 platforms(at least improve a lot).
I suspected that CCI-freq might impact the contention between little and
big core, but on my platform, it impacts little. In fact the frequency
of external DDR controller i
On 2017年08月29日 07:12, Vikram Mulukutla wrote:
Well here's something interesting. I tried a different platform and
found that
the workaround doesn't help much at all, similar to Qiao's observation
on his b.L
chipset. Something to do with the WFE implementation or event-stream?
Hi Vikram,
On 2017年08月04日 07:32, Vikram Mulukutla wrote:
Hi Qiao,
On 2017-08-01 00:37, qiaozhou wrote:
On 2017年07月31日 19:20, qiaozhou wrote:
=
Also apply Vikram's patch and have a test.
cpu2: a53, 832MHz, cpu7: a73, 1.75Hz
Wi
On 2017年07月31日 19:20, qiaozhou wrote:
On 2017年07月29日 03:09, Vikram Mulukutla wrote:
On 2017-07-28 02:28, Will Deacon wrote:
On Thu, Jul 27, 2017 at 06:10:34PM -0700, Vikram Mulukutla wrote:
Does bodging cpu_relax to back-off to wfe after a while help? The event
stream will wake it up
On 2017年07月29日 03:09, Vikram Mulukutla wrote:
On 2017-07-28 02:28, Will Deacon wrote:
On Thu, Jul 27, 2017 at 06:10:34PM -0700, Vikram Mulukutla wrote:
I think we should have this discussion now - I brought this up
earlier [1]
and I promised a test case that I completely forgot about -
On 2017年07月26日 22:16, Thomas Gleixner wrote:
On Wed, 26 Jul 2017, qiaozhou wrote:
Cc'ed ARM folks.
I want to ask you for suggestions about how to fix one contention between
expire_timers and try_to_del_timer_sync. Thanks in advance.
The issue is a hard-lockup issue detected on our pla
On 2017年07月21日 16:32, Will Deacon wrote:
On Fri, Jul 21, 2017 at 07:38:42AM +, Zhou Qiao(周侨) wrote:
Could you please help to take a look and give some comments? Thanks in
advance.
I've queued this on the arm64 for-next/fixes/core branch.
Got it. Thanks!
Will
Best Regards
Qiao
On 2017年07月05日 01:17, Will Deacon wrote:
On Wed, Jun 28, 2017 at 05:04:12PM +0800, Qiao Zhou wrote:
In current die(), the irq is disabled for __die() handle, not
including the possible panic() handling. Since the log in __die()
can take several hundreds ms, new irq might come and interrupt
cur
On 2016年09月02日 22:21, Tejun Heo wrote:
> On Fri, Sep 02, 2016 at 09:50:07AM -0400, Tejun Heo wrote:
>> Hello,
>>
>> On Fri, Sep 02, 2016 at 09:17:04AM +0800, qiaozhou wrote:
>>>>> I don't know whether it's meaningful to still check pending
On 2016年09月02日 22:21, Tejun Heo wrote:
On Fri, Sep 02, 2016 at 09:50:07AM -0400, Tejun Heo wrote:
Hello,
On Fri, Sep 02, 2016 at 09:17:04AM +0800, qiaozhou wrote:
I don't know whether it's meaningful to still check pending work here, or
it's not suggested to use pm_qos_update_
On 2016年09月02日 22:21, Tejun Heo wrote:
On Fri, Sep 02, 2016 at 09:50:07AM -0400, Tejun Heo wrote:
Hello,
On Fri, Sep 02, 2016 at 09:17:04AM +0800, qiaozhou wrote:
I don't know whether it's meaningful to still check pending work here, or
it's not suggested to use pm_qos_up
On 2016年09月02日 02:45, Tejun Heo wrote:
Hello,
On Thu, Sep 01, 2016 at 05:09:36PM +0800, qiaozhou wrote:
In our system, we do cpu clock init in of_clk_init path, and use pm qos to
maintain cpu/cci clock. Firstly we init a CCI_CLK_QOS and set a default
value, then update CCI_CLK_QOS to limit
Hi Tejun,
I have a question related with below patch, and need your suggestion.
In our system, we do cpu clock init in of_clk_init path, and use pm qos
to maintain cpu/cci clock. Firstly we init a CCI_CLK_QOS and set a
default value, then update CCI_CLK_QOS to limit CCI min frequency
accordin
28 matches
Mail list logo