Re: [PATCH] PPC64 collect and export low-level cpu usage statistics

2005-02-09 Thread Benjamin Herrenschmidt
On Wed, 2005-02-09 at 15:06 -0800, Andrew Morton wrote: > Paul Mackerras <[EMAIL PROTECTED]> wrote: > > > > POWER5 machines have a per-hardware-thread register which counts at a > > rate which is proportional to the percentage of cycles on which the > > cpu dispatches an instruction for this

Re: [PATCH] PPC64 collect and export low-level cpu usage statistics

2005-02-09 Thread Andrew Morton
Paul Mackerras <[EMAIL PROTECTED]> wrote: > > POWER5 machines have a per-hardware-thread register which counts at a > rate which is proportional to the percentage of cycles on which the > cpu dispatches an instruction for this thread (if the thread gets all > the dispatch cycles it counts at the

[PATCH] PPC64 collect and export low-level cpu usage statistics

2005-02-09 Thread Paul Mackerras
POWER5 machines have a per-hardware-thread register which counts at a rate which is proportional to the percentage of cycles on which the cpu dispatches an instruction for this thread (if the thread gets all the dispatch cycles it counts at the same rate as the timebase register). This register

[PATCH] PPC64 collect and export low-level cpu usage statistics

2005-02-09 Thread Paul Mackerras
POWER5 machines have a per-hardware-thread register which counts at a rate which is proportional to the percentage of cycles on which the cpu dispatches an instruction for this thread (if the thread gets all the dispatch cycles it counts at the same rate as the timebase register). This register

Re: [PATCH] PPC64 collect and export low-level cpu usage statistics

2005-02-09 Thread Andrew Morton
Paul Mackerras [EMAIL PROTECTED] wrote: POWER5 machines have a per-hardware-thread register which counts at a rate which is proportional to the percentage of cycles on which the cpu dispatches an instruction for this thread (if the thread gets all the dispatch cycles it counts at the same

Re: [PATCH] PPC64 collect and export low-level cpu usage statistics

2005-02-09 Thread Benjamin Herrenschmidt
On Wed, 2005-02-09 at 15:06 -0800, Andrew Morton wrote: Paul Mackerras [EMAIL PROTECTED] wrote: POWER5 machines have a per-hardware-thread register which counts at a rate which is proportional to the percentage of cycles on which the cpu dispatches an instruction for this thread (if the