On Wed, Aug 26, 2020 at 03:14:07PM +0800, peng@nxp.com wrote:
> From: Peng Fan
>
> According to RM, for peripheral clock slice,
> "IP clock slices must be stopped to change the clock source.".
>
> So we must have CLK_SET_PARENT_GATE flag to avoid glitch.
>
> Signed-off-by: Peng Fan
Applie
From: Peng Fan
According to RM, for peripheral clock slice,
"IP clock slices must be stopped to change the clock source.".
So we must have CLK_SET_PARENT_GATE flag to avoid glitch.
Signed-off-by: Peng Fan
---
drivers/clk/imx/clk-composite-8m.c | 1 +
1 file changed, 1 insertion(+)
diff --git
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