Re: [PATCH] net: stmmac: dwmac-meson8b: fix mask definition of the m250_sel mux

2020-12-07 Thread Jakub Kicinski
On Mon, 07 Dec 2020 10:31:46 +0100 Jerome Brunet wrote: > > The m250_sel mux clock uses bit 4 in the PRG_ETH0 register. Fix this by > > shifting the PRG_ETH0_CLK_M250_SEL_MASK accordingly as the "mask" in > > struct clk_mux expects the mask relative to the "shift" field in the > > same struct. > >

Re: [PATCH] net: stmmac: dwmac-meson8b: fix mask definition of the m250_sel mux

2020-12-07 Thread Jerome Brunet
On Sat 05 Dec 2020 at 22:32, Martin Blumenstingl wrote: > The m250_sel mux clock uses bit 4 in the PRG_ETH0 register. Fix this by > shifting the PRG_ETH0_CLK_M250_SEL_MASK accordingly as the "mask" in > struct clk_mux expects the mask relative to the "shift" field in the > same struct. > >

[PATCH] net: stmmac: dwmac-meson8b: fix mask definition of the m250_sel mux

2020-12-05 Thread Martin Blumenstingl
The m250_sel mux clock uses bit 4 in the PRG_ETH0 register. Fix this by shifting the PRG_ETH0_CLK_M250_SEL_MASK accordingly as the "mask" in struct clk_mux expects the mask relative to the "shift" field in the same struct. While here, get rid of the PRG_ETH0_CLK_M250_SEL_SHIFT macro and use