On 21.08.2015 17:49, Joonyoung Shim wrote:
> On 08/21/2015 04:25 PM, Krzysztof Kozlowski wrote:
>> On 21.08.2015 15:58, Joonyoung Shim wrote:
>>> On 08/21/2015 10:21 AM, Krzysztof Kozlowski wrote:
On 21.08.2015 10:00, Joonyoung Shim wrote:
> On 08/21/2015 09:44 AM, Krzysztof Kozlowski
On 08/21/2015 04:25 PM, Krzysztof Kozlowski wrote:
> On 21.08.2015 15:58, Joonyoung Shim wrote:
>> On 08/21/2015 10:21 AM, Krzysztof Kozlowski wrote:
>>> On 21.08.2015 10:00, Joonyoung Shim wrote:
On 08/21/2015 09:44 AM, Krzysztof Kozlowski wrote:
> On 21.08.2015 08:15, Alexandre Belloni
On 21.08.2015 15:58, Joonyoung Shim wrote:
> On 08/21/2015 10:21 AM, Krzysztof Kozlowski wrote:
>> On 21.08.2015 10:00, Joonyoung Shim wrote:
>>> On 08/21/2015 09:44 AM, Krzysztof Kozlowski wrote:
On 21.08.2015 08:15, Alexandre Belloni wrote:
> Hi,
>
> On 13/08/2015 at 17:49:24
On 08/21/2015 10:21 AM, Krzysztof Kozlowski wrote:
> On 21.08.2015 10:00, Joonyoung Shim wrote:
>> On 08/21/2015 09:44 AM, Krzysztof Kozlowski wrote:
>>> On 21.08.2015 08:15, Alexandre Belloni wrote:
Hi,
On 13/08/2015 at 17:49:24 +0900, Joonyoung Shim wrote :
> According to
On 08/21/2015 10:21 AM, Krzysztof Kozlowski wrote:
On 21.08.2015 10:00, Joonyoung Shim wrote:
On 08/21/2015 09:44 AM, Krzysztof Kozlowski wrote:
On 21.08.2015 08:15, Alexandre Belloni wrote:
Hi,
On 13/08/2015 at 17:49:24 +0900, Joonyoung Shim wrote :
According to datasheet, the S2MPS13X and
On 21.08.2015 17:49, Joonyoung Shim wrote:
On 08/21/2015 04:25 PM, Krzysztof Kozlowski wrote:
On 21.08.2015 15:58, Joonyoung Shim wrote:
On 08/21/2015 10:21 AM, Krzysztof Kozlowski wrote:
On 21.08.2015 10:00, Joonyoung Shim wrote:
On 08/21/2015 09:44 AM, Krzysztof Kozlowski wrote:
On
On 21.08.2015 15:58, Joonyoung Shim wrote:
On 08/21/2015 10:21 AM, Krzysztof Kozlowski wrote:
On 21.08.2015 10:00, Joonyoung Shim wrote:
On 08/21/2015 09:44 AM, Krzysztof Kozlowski wrote:
On 21.08.2015 08:15, Alexandre Belloni wrote:
Hi,
On 13/08/2015 at 17:49:24 +0900, Joonyoung Shim wrote
On 08/21/2015 04:25 PM, Krzysztof Kozlowski wrote:
On 21.08.2015 15:58, Joonyoung Shim wrote:
On 08/21/2015 10:21 AM, Krzysztof Kozlowski wrote:
On 21.08.2015 10:00, Joonyoung Shim wrote:
On 08/21/2015 09:44 AM, Krzysztof Kozlowski wrote:
On 21.08.2015 08:15, Alexandre Belloni wrote:
Hi,
On 21.08.2015 10:00, Joonyoung Shim wrote:
> On 08/21/2015 09:44 AM, Krzysztof Kozlowski wrote:
>> On 21.08.2015 08:15, Alexandre Belloni wrote:
>>> Hi,
>>>
>>> On 13/08/2015 at 17:49:24 +0900, Joonyoung Shim wrote :
According to datasheet, the S2MPS13X and S2MPS14X should update write
On 08/21/2015 09:44 AM, Krzysztof Kozlowski wrote:
> On 21.08.2015 08:15, Alexandre Belloni wrote:
>> Hi,
>>
>> On 13/08/2015 at 17:49:24 +0900, Joonyoung Shim wrote :
>>> According to datasheet, the S2MPS13X and S2MPS14X should update write
>>> buffer via setting WUDR bit to high after ctrl
On 21.08.2015 08:15, Alexandre Belloni wrote:
> Hi,
>
> On 13/08/2015 at 17:49:24 +0900, Joonyoung Shim wrote :
>> According to datasheet, the S2MPS13X and S2MPS14X should update write
>> buffer via setting WUDR bit to high after ctrl register is updated.
>>
>> If not, ALARM interrupt of rtc-s5m
Hi,
On 13/08/2015 at 17:49:24 +0900, Joonyoung Shim wrote :
> According to datasheet, the S2MPS13X and S2MPS14X should update write
> buffer via setting WUDR bit to high after ctrl register is updated.
>
> If not, ALARM interrupt of rtc-s5m doesn't happen first time when i use
>
On 08/21/2015 09:44 AM, Krzysztof Kozlowski wrote:
On 21.08.2015 08:15, Alexandre Belloni wrote:
Hi,
On 13/08/2015 at 17:49:24 +0900, Joonyoung Shim wrote :
According to datasheet, the S2MPS13X and S2MPS14X should update write
buffer via setting WUDR bit to high after ctrl register is
On 21.08.2015 08:15, Alexandre Belloni wrote:
Hi,
On 13/08/2015 at 17:49:24 +0900, Joonyoung Shim wrote :
According to datasheet, the S2MPS13X and S2MPS14X should update write
buffer via setting WUDR bit to high after ctrl register is updated.
If not, ALARM interrupt of rtc-s5m doesn't
On 21.08.2015 10:00, Joonyoung Shim wrote:
On 08/21/2015 09:44 AM, Krzysztof Kozlowski wrote:
On 21.08.2015 08:15, Alexandre Belloni wrote:
Hi,
On 13/08/2015 at 17:49:24 +0900, Joonyoung Shim wrote :
According to datasheet, the S2MPS13X and S2MPS14X should update write
buffer via setting
Hi,
On 13/08/2015 at 17:49:24 +0900, Joonyoung Shim wrote :
According to datasheet, the S2MPS13X and S2MPS14X should update write
buffer via setting WUDR bit to high after ctrl register is updated.
If not, ALARM interrupt of rtc-s5m doesn't happen first time when i use
On 17.08.2015 11:28, Joonyoung Shim wrote:
> On 08/17/2015 11:00 AM, Krzysztof Kozlowski wrote:
>> On 17.08.2015 10:47, Joonyoung Shim wrote:
>>> Hi,
>>>
>>> On 08/13/2015 07:02 PM, Krzysztof Kozlowski wrote:
W dniu 13.08.2015 o 17:49, Joonyoung Shim pisze:
> According to datasheet, the
On 08/17/2015 11:00 AM, Krzysztof Kozlowski wrote:
> On 17.08.2015 10:47, Joonyoung Shim wrote:
>> Hi,
>>
>> On 08/13/2015 07:02 PM, Krzysztof Kozlowski wrote:
>>> W dniu 13.08.2015 o 17:49, Joonyoung Shim pisze:
According to datasheet, the S2MPS13X and S2MPS14X should update write
On 17.08.2015 10:47, Joonyoung Shim wrote:
> Hi,
>
> On 08/13/2015 07:02 PM, Krzysztof Kozlowski wrote:
>> W dniu 13.08.2015 o 17:49, Joonyoung Shim pisze:
>>> According to datasheet, the S2MPS13X and S2MPS14X should update write
>>> buffer via setting WUDR bit to high after ctrl register is
Hi,
On 08/13/2015 07:02 PM, Krzysztof Kozlowski wrote:
> W dniu 13.08.2015 o 17:49, Joonyoung Shim pisze:
>> According to datasheet, the S2MPS13X and S2MPS14X should update write
>> buffer via setting WUDR bit to high after ctrl register is updated.
>
> Hi,
>
> I cannot find this information in
On 08/13/2015 07:42 PM, Krzysztof Kozlowski wrote:
> W dniu 13.08.2015 o 19:02, Krzysztof Kozlowski pisze:
>> W dniu 13.08.2015 o 17:49, Joonyoung Shim pisze:
>>> According to datasheet, the S2MPS13X and S2MPS14X should update write
>>> buffer via setting WUDR bit to high after ctrl register is
Hi,
On 08/13/2015 07:02 PM, Krzysztof Kozlowski wrote:
W dniu 13.08.2015 o 17:49, Joonyoung Shim pisze:
According to datasheet, the S2MPS13X and S2MPS14X should update write
buffer via setting WUDR bit to high after ctrl register is updated.
Hi,
I cannot find this information in S2MPS14
On 08/13/2015 07:42 PM, Krzysztof Kozlowski wrote:
W dniu 13.08.2015 o 19:02, Krzysztof Kozlowski pisze:
W dniu 13.08.2015 o 17:49, Joonyoung Shim pisze:
According to datasheet, the S2MPS13X and S2MPS14X should update write
buffer via setting WUDR bit to high after ctrl register is updated.
On 17.08.2015 10:47, Joonyoung Shim wrote:
Hi,
On 08/13/2015 07:02 PM, Krzysztof Kozlowski wrote:
W dniu 13.08.2015 o 17:49, Joonyoung Shim pisze:
According to datasheet, the S2MPS13X and S2MPS14X should update write
buffer via setting WUDR bit to high after ctrl register is updated.
Hi,
On 08/17/2015 11:00 AM, Krzysztof Kozlowski wrote:
On 17.08.2015 10:47, Joonyoung Shim wrote:
Hi,
On 08/13/2015 07:02 PM, Krzysztof Kozlowski wrote:
W dniu 13.08.2015 o 17:49, Joonyoung Shim pisze:
According to datasheet, the S2MPS13X and S2MPS14X should update write
buffer via setting WUDR
On 17.08.2015 11:28, Joonyoung Shim wrote:
On 08/17/2015 11:00 AM, Krzysztof Kozlowski wrote:
On 17.08.2015 10:47, Joonyoung Shim wrote:
Hi,
On 08/13/2015 07:02 PM, Krzysztof Kozlowski wrote:
W dniu 13.08.2015 o 17:49, Joonyoung Shim pisze:
According to datasheet, the S2MPS13X and S2MPS14X
W dniu 13.08.2015 o 19:02, Krzysztof Kozlowski pisze:
> W dniu 13.08.2015 o 17:49, Joonyoung Shim pisze:
>> According to datasheet, the S2MPS13X and S2MPS14X should update write
>> buffer via setting WUDR bit to high after ctrl register is updated.
>
> Hi,
>
> I cannot find this information in
W dniu 13.08.2015 o 17:49, Joonyoung Shim pisze:
> According to datasheet, the S2MPS13X and S2MPS14X should update write
> buffer via setting WUDR bit to high after ctrl register is updated.
Hi,
I cannot find this information in S2MPS14 datasheet. On which page is it?
>
> If not, ALARM
According to datasheet, the S2MPS13X and S2MPS14X should update write
buffer via setting WUDR bit to high after ctrl register is updated.
If not, ALARM interrupt of rtc-s5m doesn't happen first time when i use
tools/testing/selftests/timers/rtctest.c test program and hour format is
used to 12
According to datasheet, the S2MPS13X and S2MPS14X should update write
buffer via setting WUDR bit to high after ctrl register is updated.
If not, ALARM interrupt of rtc-s5m doesn't happen first time when i use
tools/testing/selftests/timers/rtctest.c test program and hour format is
used to 12
W dniu 13.08.2015 o 17:49, Joonyoung Shim pisze:
According to datasheet, the S2MPS13X and S2MPS14X should update write
buffer via setting WUDR bit to high after ctrl register is updated.
Hi,
I cannot find this information in S2MPS14 datasheet. On which page is it?
If not, ALARM interrupt
W dniu 13.08.2015 o 19:02, Krzysztof Kozlowski pisze:
W dniu 13.08.2015 o 17:49, Joonyoung Shim pisze:
According to datasheet, the S2MPS13X and S2MPS14X should update write
buffer via setting WUDR bit to high after ctrl register is updated.
Hi,
I cannot find this information in S2MPS14
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