On 5/1/2015 2:18 AM, Ingo Molnar wrote:
* Aravind Gopalakrishnan wrote:
Newer AMD processors can generate deferred errors and can be configured
to generate APIC interrupts on such events.
What's the wider context of this? What is it good for?
I suspect it's MCE related, but only from the dif
* Aravind Gopalakrishnan wrote:
> Newer AMD processors can generate deferred errors and can be configured
> to generate APIC interrupts on such events.
What's the wider context of this? What is it good for?
I suspect it's MCE related, but only from the diffstat:
> arch/x86/kernel/cpu/mcheck/
Newer AMD processors can generate deferred errors and can be configured
to generate APIC interrupts on such events.
This patchset introduces a new interrupt handler for deferred errors and
configures the HW if the feature is present.
Patch1: Defines SUCCOR cpuid bit. This indicates prescence of f
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