On Oct 19, 2017 at 19:09, Russell King - ARM Linux
[mailto:li...@armlinux.org.uk] wrote:
>On Wed, Oct 11, 2017 at 04:22:17PM +0800, Abbott Liu wrote:
>> +#else
>> +#define pud_populate(mm,pmd,pte)do { } while (0)
>> +#endif
>
>Please explain this change - we don't have a "pud" as far as the re
On Nov 23, 2017 23:22 Russell King - ARM Linux [mailto:li...@armlinux.org.uk]
wrote:
>Please pay attention to the project coding style whenever creating code
>for a program. It doesn't matter what the project coding style is, as
>long as you write your code to match the style that is already t
On Wed, Nov 22, 2017 at 12:56:44PM +, Liuwenliang (Abbott Liu) wrote:
> +static inline u64 get_ttbr0(void)
> +{
> + if (IS_ENABLED(CONFIG_ARM_LPAE))
> + return read_sysreg(TTBR0_64);
> + else
> + return (u64)read_sysreg(TTBR0_32);
> +}
> +static inline u64 get_ttbr1(void)
> +{
On Thu, Nov 23, 2017 at 01:54:59AM +, Liuwenliang (Abbott Liu) wrote:
> On Nov 23, 2017 20:30 Marc Zyngier [mailto:marc.zyng...@arm.com] wrote:
> >Please define both PAR accessors. Yes, I know the 32bit version is not
> >used yet, but it doesn't hurt to make it visible.
>
> Thanks for your
.com; ard.biesheu...@linaro.org;
linux-kernel@vger.kernel.org; Jiazhenghua; a...@linux-foundation.org;
robin.mur...@arm.com; thgar...@google.com; kirill.shute...@linux.intel.com
主题: Re: [PATCH 01/11] Initialize the mapping of KASan shadow memory
On 22/11/17 12:56, Liuwenliang (Abbott Liu) wrote:
> On
On 22/11/17 12:56, Liuwenliang (Abbott Liu) wrote:
> On Nov 22, 2017 20:30 Mark Rutland [mailto:mark.rutl...@arm.com] wrote:
>> On Tue, Nov 21, 2017 at 07:59:01AM +, Liuwenliang (Abbott Liu) wrote:
>>> On Nov 17, 2017 21:49 Marc Zyngier [mailto:marc.zyng...@arm.com] wrote:
On Sat, 18
On Nov 22, 2017 20:30 Mark Rutland [mailto:mark.rutl...@arm.com] wrote:
>On Tue, Nov 21, 2017 at 07:59:01AM +, Liuwenliang (Abbott Liu) wrote:
>> On Nov 17, 2017 21:49 Marc Zyngier [mailto:marc.zyng...@arm.com] wrote:
>> >On Sat, 18 Nov 2017 10:40:08 +
>> >"Liuwenliang (Abbott Liu)" w
On Tue, Nov 21, 2017 at 07:59:01AM +, Liuwenliang (Abbott Liu) wrote:
> On Nov 17, 2017 21:49 Marc Zyngier [mailto:marc.zyng...@arm.com] wrote:
> >On Sat, 18 Nov 2017 10:40:08 +
> >"Liuwenliang (Abbott Liu)" wrote:
> >> On Nov 17, 2017 15:36 Christoffer Dall [mailto:cd...@linaro.org]
On 21/11/17 07:59, Liuwenliang (Abbott Liu) wrote:
> On Nov 17, 2017 21:49 Marc Zyngier [mailto:marc.zyng...@arm.com] wrote:
>> On Sat, 18 Nov 2017 10:40:08 +
>> "Liuwenliang (Abbott Liu)" wrote:
>
>>> On Nov 17, 2017 15:36 Christoffer Dall [mailto:cd...@linaro.org] wrote:
If your p
On Tue, Nov 21, 2017 at 07:59:01AM +, Liuwenliang (Abbott Liu) wrote:
> On Nov 17, 2017 21:49 Marc Zyngier [mailto:marc.zyng...@arm.com] wrote:
> >On Sat, 18 Nov 2017 10:40:08 +
> >"Liuwenliang (Abbott Liu)" wrote:
>
> >> On Nov 17, 2017 15:36 Christoffer Dall [mailto:cd...@linaro.org
On Sat, 18 Nov 2017 10:40:08 +
"Liuwenliang (Abbott Liu)" wrote:
> On Nov 17, 2017 15:36 Christoffer Dall [mailto:cd...@linaro.org] wrote:
> >If your processor does support LPAE (like a Cortex-A15 for example),
> >then you have both the 32-bit accessors (MRC and MCR) and the 64-bit
> >acces
On Nov 17, 2017 15:36 Christoffer Dall [mailto:cd...@linaro.org] wrote:
>If your processor does support LPAE (like a Cortex-A15 for example),
>then you have both the 32-bit accessors (MRC and MCR) and the 64-bit
>accessors (MRRC, MCRR), and using the 32-bit accessor will simply access
>the lower
On Fri, Nov 17, 2017 at 07:18:45AM +, Liuwenliang (Abbott Liu) wrote:
> On 16/11/17 22:41 Marc Zyngier [mailto:marc.zyng...@arm.com] wrote:
> >No, it doesn't. It cannot work, because Cortex-A9 predates the invention
> >of the 64bit accessor. I suspect that you are testing stuff in QEMU,
> >whi
On 16/11/17 22:41 Marc Zyngier [mailto:marc.zyng...@arm.com] wrote:
>No, it doesn't. It cannot work, because Cortex-A9 predates the invention
>of the 64bit accessor. I suspect that you are testing stuff in QEMU,
>which is giving you a SW model that always supports LPAE. I suggest you
>test this co
On 16/11/17 22:41 Marc Zyngier [mailto:marc.zyng...@arm.com] wrote:
>- If the CPU supports LPAE, then both 32 and 64bit accessors work
I don't how 32bit accessor can work on CPU supporting LPAE, give me your
solution.
Thanks.
On Thu, Nov 16 2017 at 2:24:31 pm GMT, "Liuwenliang (Abbott Liu)"
wrote:
> On 16/11/17 17:54 Marc Zyngier [mailto:marc.zyng...@arm.com] wrote:
>>On Thu, Nov 16 2017 at 3:07:54 am GMT, "Liuwenliang (Abbott Liu)"
>> wrote:
On 15/11/17 13:16, Liuwenliang (Abbott Liu) wrote:
> On 09/11/17
On 16/11/17 17:54 Marc Zyngier [mailto:marc.zyng...@arm.com] wrote:
>On Thu, Nov 16 2017 at 3:07:54 am GMT, "Liuwenliang (Abbott Liu)"
> wrote:
>>>On 15/11/17 13:16, Liuwenliang (Abbott Liu) wrote:
On 09/11/17 18:36 Marc Zyngier [mailto:marc.zyng...@arm.com] wrote:
> On Wed, Nov 15 201
On Thu, Nov 16 2017 at 3:07:54 am GMT, "Liuwenliang (Abbott Liu)"
wrote:
>>On 15/11/17 13:16, Liuwenliang (Abbott Liu) wrote:
>>> On 09/11/17 18:36 Marc Zyngier [mailto:marc.zyng...@arm.com] wrote:
On Wed, Nov 15 2017 at 10:20:02 am GMT, "Liuwenliang (Abbott Liu)"
wrote:
> diff -
>On 15/11/17 13:16, Liuwenliang (Abbott Liu) wrote:
>> On 09/11/17 18:36 Marc Zyngier [mailto:marc.zyng...@arm.com] wrote:
>>> On Wed, Nov 15 2017 at 10:20:02 am GMT, "Liuwenliang (Abbott Liu)"
>>> wrote:
diff --git a/arch/arm/include/asm/cp15.h b/arch/arm/include/asm/cp15.h
index dbd
On 15/11/17 13:16, Liuwenliang (Abbott Liu) wrote:
> On 09/11/17 18:36 Marc Zyngier [mailto:marc.zyng...@arm.com] wrote:
>> On Wed, Nov 15 2017 at 10:20:02 am GMT, "Liuwenliang (Abbott Liu)"
>> wrote:
>>> On 09/11/17 18:11, Marc Zyngier [mailto:marc.zyng...@arm.com] wrote:
On 09/11/17 07:46
On 09/11/17 18:36 Marc Zyngier [mailto:marc.zyng...@arm.com] wrote:
>On Wed, Nov 15 2017 at 10:20:02 am GMT, "Liuwenliang (Abbott Liu)"
> wrote:
>> On 09/11/17 18:11, Marc Zyngier [mailto:marc.zyng...@arm.com] wrote:
>>>On 09/11/17 07:46, Liuwenliang (Abbott Liu) wrote:
diff --git a/arch/arm
On Wed, Nov 15 2017 at 10:20:02 am GMT, "Liuwenliang (Abbott Liu)"
wrote:
> On 09/11/17 18:11, Marc Zyngier [mailto:marc.zyng...@arm.com] wrote:
>>On 09/11/17 07:46, Liuwenliang (Abbott Liu) wrote:
>>> diff --git a/arch/arm/mm/kasan_init.c b/arch/arm/mm/kasan_init.c
>>> index 049ee0a..359a782 100
On 09/11/17 18:11, Marc Zyngier [mailto:marc.zyng...@arm.com] wrote:
>On 09/11/17 07:46, Liuwenliang (Abbott Liu) wrote:
>> diff --git a/arch/arm/mm/kasan_init.c b/arch/arm/mm/kasan_init.c
>> index 049ee0a..359a782 100644
>> --- a/arch/arm/mm/kasan_init.c
>> +++ b/arch/arm/mm/kasan_init.c
>> @@ -15
On 09/11/17 07:46, Liuwenliang (Abbott Liu) wrote:
> On 12/10/17 15:59, Marc Zyngier [mailto:marc.zyng...@arm.com] wrote:
>> On 11/10/17 09:22, Abbott Liu wrote:
>>> diff --git a/arch/arm/include/asm/proc-fns.h
>>> b/arch/arm/include/asm/proc-fns.h
>>> index f2e1af4..6e26714 100644
>>> --- a/arch/
On 12/10/17 15:59, Marc Zyngier [mailto:marc.zyng...@arm.com] wrote:
> On 11/10/17 09:22, Abbott Liu wrote:
>> diff --git a/arch/arm/include/asm/proc-fns.h
>> b/arch/arm/include/asm/proc-fns.h
>> index f2e1af4..6e26714 100644
>> --- a/arch/arm/include/asm/proc-fns.h
>> +++ b/arch/arm/include/asm/p
On Thu, Oct 12, 2017 at 02:42:49AM +0300, Dmitry Osipenko wrote:
> On 11.10.2017 11:22, Abbott Liu wrote:
> > +void __init kasan_map_early_shadow(pgd_t *pgdp)
> > +{
> > + int i;
> > + unsigned long start = KASAN_SHADOW_START;
> > + unsigned long end = KASAN_SHADOW_END;
> > + unsigned long
On Wed, Oct 11, 2017 at 04:22:17PM +0800, Abbott Liu wrote:
> diff --git a/arch/arm/include/asm/pgalloc.h b/arch/arm/include/asm/pgalloc.h
> index b2902a5..10cee6a 100644
> --- a/arch/arm/include/asm/pgalloc.h
> +++ b/arch/arm/include/asm/pgalloc.h
> @@ -50,8 +50,11 @@ static inline void pud_popula
On 2017.10.12 7:43AM Dmitry Osipenko [mailto:dig...@gmail.com] wrote:
>Shouldn't all __pgprot's contain L_PTE_MT_WRITETHROUGH ?
>
>[...]
>
>--
>Dmitry
Thanks for your review. I'm sorry that my replay is so late.
I don't think L_PTE_MT_WRITETHROUGH is need for all arm soc. So I think kasan's
mapp
2017.10.12 05:42 AM Russell King - ARM Linux [mailto:li...@armlinux.org.uk]
wrote:
>> Please don't make this "exclusive" just conditionally call
>> kasan_early_init(), remove the call to start_kernel from
>> kasan_early_init and keep the call to start_kernel here.
>iow:
>
>#ifdef CONFIG_KASAN
On 11/10/17 09:22, Abbott Liu wrote:
> From: Andrey Ryabinin
>
> This patch initializes KASan shadow region's page table and memory.
> There are two stage for KASan initializing:
> 1. At early boot stage the whole shadow region is mapped to just
>one physical page (kasan_zero_page). It's fini
On 11.10.2017 11:22, Abbott Liu wrote:
> From: Andrey Ryabinin
>
> This patch initializes KASan shadow region's page table and memory.
> There are two stage for KASan initializing:
> 1. At early boot stage the whole shadow region is mapped to just
>one physical page (kasan_zero_page). It's fi
On Wed, Oct 11, 2017 at 12:39:39PM -0700, Florian Fainelli wrote:
> On 10/11/2017 01:22 AM, Abbott Liu wrote:
> > diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S
> > index 8733012..c17f4a2 100644
> > --- a/arch/arm/kernel/head-common.S
> > +++ b/arch/arm/kernel/head-commo
On 10/11/2017 01:22 AM, Abbott Liu wrote:
> From: Andrey Ryabinin
>
> This patch initializes KASan shadow region's page table and memory.
> There are two stage for KASan initializing:
> 1. At early boot stage the whole shadow region is mapped to just
>one physical page (kasan_zero_page). It's
From: Andrey Ryabinin
This patch initializes KASan shadow region's page table and memory.
There are two stage for KASan initializing:
1. At early boot stage the whole shadow region is mapped to just
one physical page (kasan_zero_page). It's finished by the function
kasan_early_init which is
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