On Friday, September 26, 2014 at 10:39:38 AM, bpqw wrote:
> >> + /* set EVCR ,enable quad I/O */
> >> + nor->cmd_buf[0] = val & ~EVCR_QUAD_EN_MICRON;
> >> + ret = nor->write_reg(nor, SPINOR_OP_WD_EVCR, nor->cmd_buf, 1, 0);
> >> + if (ret < 0) {
> >> + dev_err(nor->dev,
> >> +
>> +/* set EVCR ,enable quad I/O */
>> +nor->cmd_buf[0] = val & ~EVCR_QUAD_EN_MICRON;
>> +ret = nor->write_reg(nor, SPINOR_OP_WD_EVCR, nor->cmd_buf, 1, 0);
>> +if (ret < 0) {
>> +dev_err(nor->dev,
>> +"error while writing EVCR register\n");
>> +
On Thursday, September 25, 2014 at 08:20:35 AM, bpqw wrote:
> For Micron spi norflash,you can enable Quad spi transfer
> by clear EVCR(Enhanced Volatile Configuration Register)
> Quad I/O protocol bit.
>
> Signed-off-by: bean huo
> ---
> drivers/mtd/spi-nor/spi-nor.c | 45
> +++
For Micron spi norflash,you can enable Quad spi transfer
by clear EVCR(Enhanced Volatile Configuration Register)
Quad I/O protocol bit.
Signed-off-by: bean huo
---
drivers/mtd/spi-nor/spi-nor.c | 45 +
include/linux/mtd/spi-nor.h |6 ++
2 files
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