Re: [PATCH 1/1] i2c: omap: correct usage of the interrupt enable register

2013-05-30 Thread Oleksandr Dmytryshyn
On 05/30/2013 05:18 PM, Kevin Hilman wrote: Oleksandr Dmytryshyn writes: On 05/29/2013 08:22 PM, Kevin Hilman wrote: Oleksandr Dmytryshyn writes: Starting from the OMAP chips with version2 registers scheme there are 2 registers (I2C_IRQENABLE_SET and I2C_IRQENABLE_CLR) to manage interrupts

Re: [PATCH 1/1] i2c: omap: correct usage of the interrupt enable register

2013-05-30 Thread Kevin Hilman
Oleksandr Dmytryshyn writes: > On 05/29/2013 08:22 PM, Kevin Hilman wrote: >> Oleksandr Dmytryshyn writes: >> >>> Starting from the OMAP chips with version2 registers scheme there are >>> 2 registers (I2C_IRQENABLE_SET and I2C_IRQENABLE_CLR) to manage >>> interrupts instead of the older OMAP chi

Re: [PATCH 1/1] i2c: omap: correct usage of the interrupt enable register

2013-05-30 Thread Oleksandr Dmytryshyn
On 05/29/2013 08:22 PM, Kevin Hilman wrote: Oleksandr Dmytryshyn writes: Starting from the OMAP chips with version2 registers scheme there are 2 registers (I2C_IRQENABLE_SET and I2C_IRQENABLE_CLR) to manage interrupts instead of the older OMAP chips with old scheme which have only one register

Re: [PATCH 1/1] i2c: omap: correct usage of the interrupt enable register

2013-05-29 Thread Kevin Hilman
Oleksandr Dmytryshyn writes: > Starting from the OMAP chips with version2 registers scheme there are > 2 registers (I2C_IRQENABLE_SET and I2C_IRQENABLE_CLR) to manage > interrupts instead of the older OMAP chips with old scheme which have > only one register (I2C_IE). Now we should use I2C_IRQEN

[PATCH 1/1] i2c: omap: correct usage of the interrupt enable register

2013-05-29 Thread Oleksandr Dmytryshyn
Starting from the OMAP chips with version2 registers scheme there are 2 registers (I2C_IRQENABLE_SET and I2C_IRQENABLE_CLR) to manage interrupts instead of the older OMAP chips with old scheme which have only one register (I2C_IE). Now we should use I2C_IRQENABLE_SET register for enabling interrupt