On Sat, Oct 05, 2019 at 10:12:11PM +0530, Vidya Sagar wrote:
> Corrects the programming to provide REFCLK to the downstream device
> when there is no CLKREQ sideband signal routing present from root port
> to the endpont.
>
> Signed-off-by: Vidya Sagar
> ---
> drivers/pci/controller/dwc/pcie-teg
On Sat, Oct 05, 2019 at 10:12:11PM +0530, Vidya Sagar wrote:
> Corrects the programming to provide REFCLK to the downstream device
> when there is no CLKREQ sideband signal routing present from root port
> to the endpont.
>
> Signed-off-by: Vidya Sagar
> ---
> drivers/pci/controller/dwc/pcie-teg
Corrects the programming to provide REFCLK to the downstream device
when there is no CLKREQ sideband signal routing present from root port
to the endpont.
Signed-off-by: Vidya Sagar
---
drivers/pci/controller/dwc/pcie-tegra194.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff -
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