On Tue, Sep 17, 2013 at 05:53:31PM +0200, Tomasz Figa wrote:
> Hi Felipe,
>
> On Tuesday 17 of September 2013 10:36:16 Felipe Balbi wrote:
> > Hi,
> >
> > On Tue, Aug 27, 2013 at 01:27:48PM -0700, Julius Werner wrote:
> > > *Ping!*
> > >
> > > Are there still unanswered concerns left with this p
Hi Felipe,
On Tuesday 17 of September 2013 10:36:16 Felipe Balbi wrote:
> Hi,
>
> On Tue, Aug 27, 2013 at 01:27:48PM -0700, Julius Werner wrote:
> > *Ping!*
> >
> > Are there still unanswered concerns left with this patch? I hope my
> > prior mails could clear up why I think that the PMU registe
Hi,
On Tue, Aug 27, 2013 at 01:27:48PM -0700, Julius Werner wrote:
> *Ping!*
>
> Are there still unanswered concerns left with this patch? I hope my
> prior mails could clear up why I think that the PMU register
> description in the device tree for a specific PHY is represents the
> hardware more
*Ping!*
Are there still unanswered concerns left with this patch? I hope my
prior mails could clear up why I think that the PMU register
description in the device tree for a specific PHY is represents the
hardware more accurately after my patch, and my analysis of the
Exynos4 situation currently n
> Sorry, I don't understand what is not implemented. Without your patch, the
> PHY driver handles both PMU registers of Exynos4.
I don't have an Exynos4 to actually test this, so please let me know
if I'm missing something here... but in order to hit the right HOST
PHY register in the current upst
Hi Julius,
On Thursday 08 of August 2013 11:06:54 Julius Werner wrote:
> > I'm not sure I understand. The old documentation referred to the
> > USBDEVICE_PHY_CONTROL and USBHOST_PHY_CONTROL registers for a phy, and
> > your new version only refers to (usb device) PHY_CONTROL. Regardless
> > of
> >
> I'm not sure I understand. The old documentation referred to the
> USBDEVICE_PHY_CONTROL and USBHOST_PHY_CONTROL registers for a phy, and
> your new version only refers to (usb device) PHY_CONTROL. Regardless of
> multiple phys, you're suggesting that we describe less of each phy.
> That seems li
On Thu, Aug 8, 2013 at 2:56 PM, Mark Rutland wrote:
> On Wed, Aug 07, 2013 at 06:06:05PM +0100, Julius Werner wrote:
>> > This breaks compatibility, both for an old kernel and a new dt and a new
>> > kernel with an old dt. Is anyone using these bindings?
>>
>> They only affect Samsung SoCs and hav
On Wed, Aug 07, 2013 at 06:06:05PM +0100, Julius Werner wrote:
> > This breaks compatibility, both for an old kernel and a new dt and a new
> > kernel with an old dt. Is anyone using these bindings?
>
> They only affect Samsung SoCs and have only been upstream for half a
> year, so I doubt it's he
On 08/07/2013 07:06 PM, Julius Werner wrote:
>> This breaks compatibility, both for an old kernel and a new dt and a new
>> kernel with an old dt. Is anyone using these bindings?
>
> They only affect Samsung SoCs and have only been upstream for half a
> year, so I doubt it's heavily used.
It prob
> This breaks compatibility, both for an old kernel and a new dt and a new
> kernel with an old dt. Is anyone using these bindings?
They only affect Samsung SoCs and have only been upstream for half a
year, so I doubt it's heavily used.
> Why are we describing fewer registers now? Are they descri
On Tue, Aug 06, 2013 at 07:00:17PM +0100, Julius Werner wrote:
> This patch simplifies the way the phy-samsung-usb code finds the correct
> power management register to enable PHY clock gating. Previously, the
> code would calculate the register address from a device tree supplied
> base address an
This patch simplifies the way the phy-samsung-usb code finds the correct
power management register to enable PHY clock gating. Previously, the
code would calculate the register address from a device tree supplied
base address and add an offset based on the PHY type.
Since every PHY has its own dev
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