On Mon, Jun 12, 2017 at 10:37 AM, Lothar Waßmann
wrote:
> Hi,
>
> On Mon, 12 Jun 2017 10:22:45 -0300 Fabio Estevam wrote:
>> On Mon, Jun 12, 2017 at 8:47 AM, Leonard Crestez
>> wrote:
>>
>> > However it seems that this might be accidental, it
On Mon, Jun 12, 2017 at 10:37 AM, Lothar Waßmann
wrote:
> Hi,
>
> On Mon, 12 Jun 2017 10:22:45 -0300 Fabio Estevam wrote:
>> On Mon, Jun 12, 2017 at 8:47 AM, Leonard Crestez
>> wrote:
>>
>> > However it seems that this might be accidental, it just happens that
>> > the OCOTP clock starts as
Hi,
On Mon, 12 Jun 2017 10:22:45 -0300 Fabio Estevam wrote:
> On Mon, Jun 12, 2017 at 8:47 AM, Leonard Crestez
> wrote:
>
> > However it seems that this might be accidental, it just happens that
> > the OCOTP clock starts as enabled and is only disabled later in the
>
Hi,
On Mon, 12 Jun 2017 10:22:45 -0300 Fabio Estevam wrote:
> On Mon, Jun 12, 2017 at 8:47 AM, Leonard Crestez
> wrote:
>
> > However it seems that this might be accidental, it just happens that
> > the OCOTP clock starts as enabled and is only disabled later in the
>
> Most likely because
On Mon, Jun 12, 2017 at 8:47 AM, Leonard Crestez
wrote:
> However it seems that this might be accidental, it just happens that
> the OCOTP clock starts as enabled and is only disabled later in the
Most likely because U-Boot enabled the OCOTP clock as it reads the
speed
On Mon, Jun 12, 2017 at 8:47 AM, Leonard Crestez
wrote:
> However it seems that this might be accidental, it just happens that
> the OCOTP clock starts as enabled and is only disabled later in the
Most likely because U-Boot enabled the OCOTP clock as it reads the
speed grading fuse.
On Mon, 2017-06-12 at 12:40 +0200, Lothar Waßmann wrote:
> On Fri, 9 Jun 2017 18:34:44 +0300 Leonard Crestez wrote:
> >
> > On Fri, 2017-06-09 at 15:46 +0200, Lothar Waßmann wrote:
> > >
> > > On Fri, 9 Jun 2017 13:58:15 +0300 Leonard Crestez wrote:
> > > >
> > > > On Thu, 2017-06-08 at 13:45
On Mon, 2017-06-12 at 12:40 +0200, Lothar Waßmann wrote:
> On Fri, 9 Jun 2017 18:34:44 +0300 Leonard Crestez wrote:
> >
> > On Fri, 2017-06-09 at 15:46 +0200, Lothar Waßmann wrote:
> > >
> > > On Fri, 9 Jun 2017 13:58:15 +0300 Leonard Crestez wrote:
> > > >
> > > > On Thu, 2017-06-08 at 13:45
Hi,
On Fri, 9 Jun 2017 18:34:44 +0300 Leonard Crestez wrote:
> On Fri, 2017-06-09 at 15:46 +0200, Lothar Waßmann wrote:
> > On Fri, 9 Jun 2017 13:58:15 +0300 Leonard Crestez wrote:
> > > On Thu, 2017-06-08 at 13:45 -0300, Fabio Estevam wrote:
> > > > On Thu, Jun 8, 2017 at 1:26 PM, Leonard
Hi,
On Fri, 9 Jun 2017 18:34:44 +0300 Leonard Crestez wrote:
> On Fri, 2017-06-09 at 15:46 +0200, Lothar Waßmann wrote:
> > On Fri, 9 Jun 2017 13:58:15 +0300 Leonard Crestez wrote:
> > > On Thu, 2017-06-08 at 13:45 -0300, Fabio Estevam wrote:
> > > > On Thu, Jun 8, 2017 at 1:26 PM, Leonard
On Fri, 2017-06-09 at 15:46 +0200, Lothar Waßmann wrote:
> On Fri, 9 Jun 2017 13:58:15 +0300 Leonard Crestez wrote:
> > On Thu, 2017-06-08 at 13:45 -0300, Fabio Estevam wrote:
> > > On Thu, Jun 8, 2017 at 1:26 PM, Leonard Crestez wrote:
> > > > + tempmon: tempmon {
> > > > +
On Fri, 2017-06-09 at 15:46 +0200, Lothar Waßmann wrote:
> On Fri, 9 Jun 2017 13:58:15 +0300 Leonard Crestez wrote:
> > On Thu, 2017-06-08 at 13:45 -0300, Fabio Estevam wrote:
> > > On Thu, Jun 8, 2017 at 1:26 PM, Leonard Crestez wrote:
> > > > + tempmon: tempmon {
> > > > +
Hi,
On Fri, 9 Jun 2017 13:58:15 +0300 Leonard Crestez wrote:
> On Thu, 2017-06-08 at 13:45 -0300, Fabio Estevam wrote:
> > On Thu, Jun 8, 2017 at 1:26 PM, Leonard Crestez wrote:
> >
> > >
> > > + tempmon: tempmon {
> > > + compatible =
Hi,
On Fri, 9 Jun 2017 13:58:15 +0300 Leonard Crestez wrote:
> On Thu, 2017-06-08 at 13:45 -0300, Fabio Estevam wrote:
> > On Thu, Jun 8, 2017 at 1:26 PM, Leonard Crestez wrote:
> >
> > >
> > > + tempmon: tempmon {
> > > + compatible =
On Fri, Jun 9, 2017 at 7:58 AM, Leonard Crestez wrote:
> Yes, as far as I can tell the tempmon block uses the 480 Mhz PLL3 clock
> directly. This is similar to other imx6 SOCs. This PLL is used for
> stuff like USB but not only that. My understanding is the _USB_OTG
>
On Fri, Jun 9, 2017 at 7:58 AM, Leonard Crestez wrote:
> Yes, as far as I can tell the tempmon block uses the 480 Mhz PLL3 clock
> directly. This is similar to other imx6 SOCs. This PLL is used for
> stuff like USB but not only that. My understanding is the _USB_OTG
> suffix is descriptive,
On Thu, 2017-06-08 at 13:45 -0300, Fabio Estevam wrote:
> On Thu, Jun 8, 2017 at 1:26 PM, Leonard Crestez wrote:
>
> >
> > + tempmon: tempmon {
> > + compatible = "fsl,imx6ul-tempmon",
> > "fsl,imx6sx-tempmon";
> > +
On Thu, 2017-06-08 at 13:45 -0300, Fabio Estevam wrote:
> On Thu, Jun 8, 2017 at 1:26 PM, Leonard Crestez wrote:
>
> >
> > + tempmon: tempmon {
> > + compatible = "fsl,imx6ul-tempmon",
> > "fsl,imx6sx-tempmon";
> > +
On Thu, Jun 8, 2017 at 1:26 PM, Leonard Crestez wrote:
> + tempmon: tempmon {
> + compatible = "fsl,imx6ul-tempmon",
> "fsl,imx6sx-tempmon";
> + interrupts = ;
> +
On Thu, Jun 8, 2017 at 1:26 PM, Leonard Crestez wrote:
> + tempmon: tempmon {
> + compatible = "fsl,imx6ul-tempmon",
> "fsl,imx6sx-tempmon";
> + interrupts = ;
> + fsl,tempmon = <>;
>
This seems to work fine with the existing imx thermal driver on both 6ul
and 6ull. It was just missing in dts.
Signed-off-by: Leonard Crestez
---
arch/arm/boot/dts/imx6ul.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi
This seems to work fine with the existing imx thermal driver on both 6ul
and 6ull. It was just missing in dts.
Signed-off-by: Leonard Crestez
---
arch/arm/boot/dts/imx6ul.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi
22 matches
Mail list logo