Re: [PATCH 3/5] ARM: sa1100: use ioremapped memory to access SC registers

2015-01-24 Thread Thomas Gleixner
On Sat, 24 Jan 2015, Dmitry Eremin-Solenikov wrote: > 2015-01-24 20:48 GMT+03:00 Thomas Gleixner : > > On Thu, 15 Jan 2015, Dmitry Eremin-Solenikov wrote: > >> static void sa1100_mask_irq(struct irq_data *d) > >> { > >> - ICMR &= ~BIT(d->hwirq); > >> + u32 reg; > >> + unsigned long f

Re: [PATCH 3/5] ARM: sa1100: use ioremapped memory to access SC registers

2015-01-24 Thread Dmitry Eremin-Solenikov
2015-01-24 22:24 GMT+03:00 Thomas Gleixner : > On Sat, 24 Jan 2015, Dmitry Eremin-Solenikov wrote: > >> 2015-01-24 20:48 GMT+03:00 Thomas Gleixner : >> > On Thu, 15 Jan 2015, Dmitry Eremin-Solenikov wrote: >> >> static void sa1100_mask_irq(struct irq_data *d) >> >> { >> >> - ICMR &= ~BIT(d->h

Re: [PATCH 3/5] ARM: sa1100: use ioremapped memory to access SC registers

2015-01-24 Thread Dmitry Eremin-Solenikov
2015-01-24 20:48 GMT+03:00 Thomas Gleixner : > On Thu, 15 Jan 2015, Dmitry Eremin-Solenikov wrote: >> static void sa1100_mask_irq(struct irq_data *d) >> { >> - ICMR &= ~BIT(d->hwirq); >> + u32 reg; >> + unsigned long flags; >> + >> + raw_spin_lock_irqsave(&lock, flags); > > What's

Re: [PATCH 3/5] ARM: sa1100: use ioremapped memory to access SC registers

2015-01-24 Thread Thomas Gleixner
On Thu, 15 Jan 2015, Dmitry Eremin-Solenikov wrote: > static void sa1100_mask_irq(struct irq_data *d) > { > - ICMR &= ~BIT(d->hwirq); > + u32 reg; > + unsigned long flags; > + > + raw_spin_lock_irqsave(&lock, flags); What's the exact point of that lock? And how is it related to t

[PATCH 3/5] ARM: sa1100: use ioremapped memory to access SC registers

2015-01-15 Thread Dmitry Eremin-Solenikov
Use ioremap() and readl/writel_relaxed() to access IRQ controller registers. Signed-off-by: Dmitry Eremin-Solenikov --- arch/arm/mach-sa1100/irq.c | 63 +- 1 file changed, 45 insertions(+), 18 deletions(-) diff --git a/arch/arm/mach-sa1100/irq.c b/arc