Le jeu. 25 juil. 2019 à 19:09, Chen-Yu Tsai a écrit :
>
> On Thu, Jul 25, 2019 at 10:50 PM Jerome Brunet wrote:
> >
> > On Mon 22 Jul 2019 at 11:54, Alexandre Mergnat
> > wrote:
> >
> >
> > > @@ -1592,13 +1737,29 @@ static struct clk_regmap gxbb_vid_pll_div = {
> > > .hw.init = &(struct c
On Thu, Jul 25, 2019 at 10:50 PM Jerome Brunet wrote:
>
> On Mon 22 Jul 2019 at 11:54, Alexandre Mergnat wrote:
>
>
> > @@ -1592,13 +1737,29 @@ static struct clk_regmap gxbb_vid_pll_div = {
> > .hw.init = &(struct clk_init_data) {
> > .name = "vid_pll_div",
> > .
On Mon 22 Jul 2019 at 11:54, Alexandre Mergnat wrote:
> @@ -1592,13 +1737,29 @@ static struct clk_regmap gxbb_vid_pll_div = {
> .hw.init = &(struct clk_init_data) {
> .name = "vid_pll_div",
> .ops = &meson_vid_pll_div_ro_ops,
> - .parent_names = (con
This clock controller use the string comparison method to describe parent
relation between the clocks, which is not optimized.
Migrate to the new way by using .parent_hws where possible (ie. when
all clocks are local to the controller) and use .parent_data otherwise.
Signed-off-by: Alexandre Merg
4 matches
Mail list logo
