On 4/7/21 2:32 AM, Andrew Lunn wrote:
case PHY_INTERFACE_MODE_RGMII:
case PHY_INTERFACE_MODE_RGMII_ID:
case PHY_INTERFACE_MODE_RGMII_RXID:
case PHY_INTERFACE_MODE_RGMII_TXID:
miicfg |= GSWIP_MII_CFG_MODE_RGMII;
+
+ if
Hello,
On Wed, Apr 7, 2021 at 6:47 PM Florian Fainelli wrote:
>
>
>
> On 4/6/2021 5:32 PM, Andrew Lunn wrote:
> >> case PHY_INTERFACE_MODE_RGMII:
> >> case PHY_INTERFACE_MODE_RGMII_ID:
> >> case PHY_INTERFACE_MODE_RGMII_RXID:
> >> case PHY_INTERFACE_MODE_RGMII_TXID:
> >>
On 4/6/2021 5:32 PM, Andrew Lunn wrote:
>> case PHY_INTERFACE_MODE_RGMII:
>> case PHY_INTERFACE_MODE_RGMII_ID:
>> case PHY_INTERFACE_MODE_RGMII_RXID:
>> case PHY_INTERFACE_MODE_RGMII_TXID:
>> miicfg |= GSWIP_MII_CFG_MODE_RGMII;
>> +
>> +if
> case PHY_INTERFACE_MODE_RGMII:
> case PHY_INTERFACE_MODE_RGMII_ID:
> case PHY_INTERFACE_MODE_RGMII_RXID:
> case PHY_INTERFACE_MODE_RGMII_TXID:
> miicfg |= GSWIP_MII_CFG_MODE_RGMII;
> +
> + if (phylink_autoneg_inband(mode))
> +
On 4/6/21 10:35 PM, Martin Blumenstingl wrote:
There are a few more bits in the GSWIP_MII_CFG register for which we
did rely on the boot-loader (or the hardware defaults) to set them up
properly.
For some external RMII PHYs we need to select the GSWIP_MII_CFG_RMII_CLK
bit and also we should
There are a few more bits in the GSWIP_MII_CFG register for which we
did rely on the boot-loader (or the hardware defaults) to set them up
properly.
For some external RMII PHYs we need to select the GSWIP_MII_CFG_RMII_CLK
bit and also we should un-set it for non-RMII PHYs. The GSWIP IP also
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