Re: [PATCH RFC net 2/2] net: dsa: lantiq_gswip: Configure all remaining GSWIP_MII_CFG bits

2021-04-07 Thread Hauke Mehrtens
On 4/7/21 2:32 AM, Andrew Lunn wrote: case PHY_INTERFACE_MODE_RGMII: case PHY_INTERFACE_MODE_RGMII_ID: case PHY_INTERFACE_MODE_RGMII_RXID: case PHY_INTERFACE_MODE_RGMII_TXID: miicfg |= GSWIP_MII_CFG_MODE_RGMII; + + if

Re: [PATCH RFC net 2/2] net: dsa: lantiq_gswip: Configure all remaining GSWIP_MII_CFG bits

2021-04-07 Thread Martin Blumenstingl
Hello, On Wed, Apr 7, 2021 at 6:47 PM Florian Fainelli wrote: > > > > On 4/6/2021 5:32 PM, Andrew Lunn wrote: > >> case PHY_INTERFACE_MODE_RGMII: > >> case PHY_INTERFACE_MODE_RGMII_ID: > >> case PHY_INTERFACE_MODE_RGMII_RXID: > >> case PHY_INTERFACE_MODE_RGMII_TXID: > >>

Re: [PATCH RFC net 2/2] net: dsa: lantiq_gswip: Configure all remaining GSWIP_MII_CFG bits

2021-04-07 Thread Florian Fainelli
On 4/6/2021 5:32 PM, Andrew Lunn wrote: >> case PHY_INTERFACE_MODE_RGMII: >> case PHY_INTERFACE_MODE_RGMII_ID: >> case PHY_INTERFACE_MODE_RGMII_RXID: >> case PHY_INTERFACE_MODE_RGMII_TXID: >> miicfg |= GSWIP_MII_CFG_MODE_RGMII; >> + >> +if

Re: [PATCH RFC net 2/2] net: dsa: lantiq_gswip: Configure all remaining GSWIP_MII_CFG bits

2021-04-06 Thread Andrew Lunn
> case PHY_INTERFACE_MODE_RGMII: > case PHY_INTERFACE_MODE_RGMII_ID: > case PHY_INTERFACE_MODE_RGMII_RXID: > case PHY_INTERFACE_MODE_RGMII_TXID: > miicfg |= GSWIP_MII_CFG_MODE_RGMII; > + > + if (phylink_autoneg_inband(mode)) > +

Re: [PATCH RFC net 2/2] net: dsa: lantiq_gswip: Configure all remaining GSWIP_MII_CFG bits

2021-04-06 Thread Hauke Mehrtens
On 4/6/21 10:35 PM, Martin Blumenstingl wrote: There are a few more bits in the GSWIP_MII_CFG register for which we did rely on the boot-loader (or the hardware defaults) to set them up properly. For some external RMII PHYs we need to select the GSWIP_MII_CFG_RMII_CLK bit and also we should

[PATCH RFC net 2/2] net: dsa: lantiq_gswip: Configure all remaining GSWIP_MII_CFG bits

2021-04-06 Thread Martin Blumenstingl
There are a few more bits in the GSWIP_MII_CFG register for which we did rely on the boot-loader (or the hardware defaults) to set them up properly. For some external RMII PHYs we need to select the GSWIP_MII_CFG_RMII_CLK bit and also we should un-set it for non-RMII PHYs. The GSWIP IP also