Hi guys,
Sorry to revisit this way late, and sorry for not paying as much
attention initially. I'm prepped to merge v4, but some of the
conversation matches what I was just thinking.
On Mon, Apr 28, 2014 at 07:06:17AM +0200, Marek Vasut wrote:
> On Saturday, April 26, 2014 at 05:10:13 AM, Huang
Hi guys,
Sorry to revisit this way late, and sorry for not paying as much
attention initially. I'm prepped to merge v4, but some of the
conversation matches what I was just thinking.
On Mon, Apr 28, 2014 at 07:06:17AM +0200, Marek Vasut wrote:
On Saturday, April 26, 2014 at 05:10:13 AM, Huang
On Mon, Apr 28, 2014 at 09:22:58AM -0500, Graham Moore wrote:
> On Mon, Apr 28, 2014 at 2:06 AM, Huang Shijie wrote:
> > On Mon, Apr 28, 2014 at 07:06:17AM +0200, Marek Vasut wrote:
> >>
> >> Two things competing over the same pointer looks misdesigned to me. I will
> >> need
> >> to dig into
On Mon, Apr 28, 2014 at 2:06 AM, Huang Shijie wrote:
> On Mon, Apr 28, 2014 at 07:06:17AM +0200, Marek Vasut wrote:
>>
>> Two things competing over the same pointer looks misdesigned to me. I will
>> need
>> to dig into this one more time ...
> Please refer to the code for NAND chip, the
On Mon, Apr 28, 2014 at 07:06:17AM +0200, Marek Vasut wrote:
> On Saturday, April 26, 2014 at 05:10:13 AM, Huang Shijie wrote:
> > On Sat, Apr 26, 2014 at 12:12:24AM +0200, Marek Vasut wrote:
> > > > > > the drivers may fills this hook itself, so the code should like
> > > > > > this:
> > > > > >
On Mon, Apr 28, 2014 at 07:06:17AM +0200, Marek Vasut wrote:
On Saturday, April 26, 2014 at 05:10:13 AM, Huang Shijie wrote:
On Sat, Apr 26, 2014 at 12:12:24AM +0200, Marek Vasut wrote:
the drivers may fills this hook itself, so the code should like
this:
On Mon, Apr 28, 2014 at 2:06 AM, Huang Shijie b32...@freescale.com wrote:
On Mon, Apr 28, 2014 at 07:06:17AM +0200, Marek Vasut wrote:
Two things competing over the same pointer looks misdesigned to me. I will
need
to dig into this one more time ...
Please refer to the code for NAND chip,
On Mon, Apr 28, 2014 at 09:22:58AM -0500, Graham Moore wrote:
On Mon, Apr 28, 2014 at 2:06 AM, Huang Shijie b32...@freescale.com wrote:
On Mon, Apr 28, 2014 at 07:06:17AM +0200, Marek Vasut wrote:
Two things competing over the same pointer looks misdesigned to me. I will
need
to dig
On Saturday, April 26, 2014 at 05:10:13 AM, Huang Shijie wrote:
> On Sat, Apr 26, 2014 at 12:12:24AM +0200, Marek Vasut wrote:
> > > > > the drivers may fills this hook itself, so the code should like this:
> > > > >--
> > > > >
> > > > >
On Saturday, April 26, 2014 at 05:10:13 AM, Huang Shijie wrote:
On Sat, Apr 26, 2014 at 12:12:24AM +0200, Marek Vasut wrote:
the drivers may fills this hook itself, so the code should like this:
--
if ((info-flags
On Sat, Apr 26, 2014 at 12:12:24AM +0200, Marek Vasut wrote:
> > > > the drivers may fills this hook itself, so the code should like this:
> > > >--
> > > >
> > > > if ((info->flags & USE_FSR) &&
> > > >
> > > >
On Friday, April 25, 2014 at 03:52:46 AM, Huang Shijie wrote:
> On Fri, Apr 25, 2014 at 04:42:33AM +0200, Marek Vasut wrote:
> > On Friday, April 25, 2014 at 03:34:36 AM, Huang Shijie wrote:
> > > On Tue, Apr 22, 2014 at 09:03:16AM -0500, Graham Moore wrote:
> > > > Some new Micron flash chips
On Friday, April 25, 2014 at 06:47:04 AM, Huang Shijie wrote:
> On Tue, Apr 22, 2014 at 01:48:21PM -0500, Graham Moore wrote:
> > On Tue, Apr 22, 2014 at 11:55 AM, Marek Vasut wrote:
> > > Are you sure the n25q512a doesn't use FSR ? Do n25q512a{1,8}3 share the
> > > same IDs?
> >
> > I looked at
On Friday, April 25, 2014 at 06:47:04 AM, Huang Shijie wrote:
On Tue, Apr 22, 2014 at 01:48:21PM -0500, Graham Moore wrote:
On Tue, Apr 22, 2014 at 11:55 AM, Marek Vasut ma...@denx.de wrote:
Are you sure the n25q512a doesn't use FSR ? Do n25q512a{1,8}3 share the
same IDs?
I looked at
On Friday, April 25, 2014 at 03:52:46 AM, Huang Shijie wrote:
On Fri, Apr 25, 2014 at 04:42:33AM +0200, Marek Vasut wrote:
On Friday, April 25, 2014 at 03:34:36 AM, Huang Shijie wrote:
On Tue, Apr 22, 2014 at 09:03:16AM -0500, Graham Moore wrote:
Some new Micron flash chips require
On Sat, Apr 26, 2014 at 12:12:24AM +0200, Marek Vasut wrote:
the drivers may fills this hook itself, so the code should like this:
--
if ((info-flags USE_FSR)
nor-wait_till_ready
On Tue, Apr 22, 2014 at 01:48:21PM -0500, Graham Moore wrote:
> On Tue, Apr 22, 2014 at 11:55 AM, Marek Vasut wrote:
> > Are you sure the n25q512a doesn't use FSR ? Do n25q512a{1,8}3 share the same
> > IDs?
>
> I looked at the datasheet and the n25q512a *does* have the same FSR
> usage note, so
On Fri, Apr 25, 2014 at 04:42:33AM +0200, Marek Vasut wrote:
> On Friday, April 25, 2014 at 03:34:36 AM, Huang Shijie wrote:
> > On Tue, Apr 22, 2014 at 09:03:16AM -0500, Graham Moore wrote:
> > > Some new Micron flash chips require reading the flag
> > > status register to determine when
On Fri, Apr 25, 2014 at 04:42:33AM +0200, Marek Vasut wrote:
> On Friday, April 25, 2014 at 03:34:36 AM, Huang Shijie wrote:
> > On Tue, Apr 22, 2014 at 09:03:16AM -0500, Graham Moore wrote:
> > > Some new Micron flash chips require reading the flag
> > > status register to determine when
On Tue, Apr 22, 2014 at 09:03:16AM -0500, Graham Moore wrote:
> Some new Micron flash chips require reading the flag
> status register to determine when operations have completed.
>
> Furthermore, chips with multi-die stacks of the 65nm 256Mb QSPI also
> require reading the status register before
On Friday, April 25, 2014 at 03:34:36 AM, Huang Shijie wrote:
> On Tue, Apr 22, 2014 at 09:03:16AM -0500, Graham Moore wrote:
> > Some new Micron flash chips require reading the flag
> > status register to determine when operations have completed.
> >
> > Furthermore, chips with multi-die stacks
On Friday, April 25, 2014 at 03:34:36 AM, Huang Shijie wrote:
On Tue, Apr 22, 2014 at 09:03:16AM -0500, Graham Moore wrote:
Some new Micron flash chips require reading the flag
status register to determine when operations have completed.
Furthermore, chips with multi-die stacks of the
On Tue, Apr 22, 2014 at 09:03:16AM -0500, Graham Moore wrote:
Some new Micron flash chips require reading the flag
status register to determine when operations have completed.
Furthermore, chips with multi-die stacks of the 65nm 256Mb QSPI also
require reading the status register before
On Fri, Apr 25, 2014 at 04:42:33AM +0200, Marek Vasut wrote:
On Friday, April 25, 2014 at 03:34:36 AM, Huang Shijie wrote:
On Tue, Apr 22, 2014 at 09:03:16AM -0500, Graham Moore wrote:
Some new Micron flash chips require reading the flag
status register to determine when operations have
On Fri, Apr 25, 2014 at 04:42:33AM +0200, Marek Vasut wrote:
On Friday, April 25, 2014 at 03:34:36 AM, Huang Shijie wrote:
On Tue, Apr 22, 2014 at 09:03:16AM -0500, Graham Moore wrote:
Some new Micron flash chips require reading the flag
status register to determine when operations have
On Tue, Apr 22, 2014 at 01:48:21PM -0500, Graham Moore wrote:
On Tue, Apr 22, 2014 at 11:55 AM, Marek Vasut ma...@denx.de wrote:
Are you sure the n25q512a doesn't use FSR ? Do n25q512a{1,8}3 share the same
IDs?
I looked at the datasheet and the n25q512a *does* have the same FSR
usage
On Tue, Apr 22, 2014 at 1:45 PM, Gerhard Sittig wrote:
> the patch appears to not have dev_err() references, were they
> removed? see below
[...]
> this emits a message that an error has occured, but doesn't tell
> where it occured -- can you dev_err() here to make the message
> even more
On Tuesday, April 22, 2014 at 08:48:21 PM, Graham Moore wrote:
> On Tue, Apr 22, 2014 at 11:55 AM, Marek Vasut wrote:
> > Are you sure the n25q512a doesn't use FSR ? Do n25q512a{1,8}3 share the
> > same IDs?
>
> I looked at the datasheet and the n25q512a *does* have the same FSR
> usage note, so
On Tue, Apr 22, 2014 at 11:55 AM, Marek Vasut wrote:
> Are you sure the n25q512a doesn't use FSR ? Do n25q512a{1,8}3 share the same
> IDs?
I looked at the datasheet and the n25q512a *does* have the same FSR
usage note, so I suppose I should add USE_FSR to it as well. But how
is it working now?
On Tue, 2014-04-22 at 09:03 -0500, Graham Moore wrote:
>
> ---
> V3:
> Rebase to l2-mtd spinor branch.
> V2:
> Remove leading underscore in function names.
> Remove type cast in dev_err call and use the proper format
> specifier instead.
the patch appears to not have dev_err() references, were
On Tuesday, April 22, 2014 at 04:03:16 PM, Graham Moore wrote:
[...]
> #define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
> @@ -488,6 +534,8 @@ const struct spi_device_id spi_nor_ids[] = {
> { "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, 0) },
> { "n25q256a",
Some new Micron flash chips require reading the flag
status register to determine when operations have completed.
Furthermore, chips with multi-die stacks of the 65nm 256Mb QSPI also
require reading the status register before reading the flag status register.
This patch adds support for the flag
I rebased this patch onto the l2-mtd spinor branch. Sorry it took so long, had
to patch for our SoC, corporate network issues, etc.
The change to read the flag status register is, afaik, specific to Micron
chips. So, imo, the fsr ready check should be in the m25p80.c file. But I put
it into
I rebased this patch onto the l2-mtd spinor branch. Sorry it took so long, had
to patch for our SoC, corporate network issues, etc.
The change to read the flag status register is, afaik, specific to Micron
chips. So, imo, the fsr ready check should be in the m25p80.c file. But I put
it into
Some new Micron flash chips require reading the flag
status register to determine when operations have completed.
Furthermore, chips with multi-die stacks of the 65nm 256Mb QSPI also
require reading the status register before reading the flag status register.
This patch adds support for the flag
On Tuesday, April 22, 2014 at 04:03:16 PM, Graham Moore wrote:
[...]
#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
@@ -488,6 +534,8 @@ const struct spi_device_id spi_nor_ids[] = {
{ n25q128a13, INFO(0x20ba18, 0, 64 * 1024, 256, 0) },
{ n25q256a,
On Tue, 2014-04-22 at 09:03 -0500, Graham Moore wrote:
---
V3:
Rebase to l2-mtd spinor branch.
V2:
Remove leading underscore in function names.
Remove type cast in dev_err call and use the proper format
specifier instead.
the patch appears to not have dev_err() references, were they
On Tue, Apr 22, 2014 at 11:55 AM, Marek Vasut ma...@denx.de wrote:
Are you sure the n25q512a doesn't use FSR ? Do n25q512a{1,8}3 share the same
IDs?
I looked at the datasheet and the n25q512a *does* have the same FSR
usage note, so I suppose I should add USE_FSR to it as well. But how
is it
On Tuesday, April 22, 2014 at 08:48:21 PM, Graham Moore wrote:
On Tue, Apr 22, 2014 at 11:55 AM, Marek Vasut ma...@denx.de wrote:
Are you sure the n25q512a doesn't use FSR ? Do n25q512a{1,8}3 share the
same IDs?
I looked at the datasheet and the n25q512a *does* have the same FSR
usage
On Tue, Apr 22, 2014 at 1:45 PM, Gerhard Sittig g...@denx.de wrote:
the patch appears to not have dev_err() references, were they
removed? see below
[...]
this emits a message that an error has occured, but doesn't tell
where it occured -- can you dev_err() here to make the message
even more
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