On Mon, Sep 18, 2017 at 03:03:30PM +0800, 陈华才 wrote:
> I don't think dma_get_cache_alignment is the "absolute minimum alignment" in
> all cases. At least on MIPS/Loongson, if we use I/O coherent mode (Cached DMA
> mode), align block queue to 4Bytes is enough. If we align block queue to
> dma_ge
quot;James E . J . Bottomley"; "Martin K .
Petersen"; "Andrew
Morton"; "Fuxin Zhang";
"linux-scsi";
"linux-kernel"; "stable";
Subject: Re: [PATCH V5 3/3] scsi: Align queue to ARCH_DMA_MINALIGN
innon-coherent DMA mode
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