05.02.2019 4:37, Sowjanya Komatineni пишет:
>> I know that APB DMA driver enables flow control based on the channels spec,
>> but still won't hurt to explicitly show that channels are flow-controlled.
>> Ideally APB DMA driver should respect the device_fc field.
>>
>> dma_sconfig.dev
> I know that APB DMA driver enables flow control based on the channels spec,
> but still won't hurt to explicitly show that channels are flow-controlled.
> Ideally APB DMA driver should respect the device_fc field.
>
> dma_sconfig.device_fc = true;
Dmitry,
Thanks for all feedback
03.02.2019 17:47, Dmitry Osipenko пишет:
> 01.02.2019 20:07, Sowjanya Komatineni пишет:
>> This patch adds DMA support for Tegra I2C.
>>
>> Tegra I2C TX and RX FIFO depth is 8 words. PIO mode is used for
>> transfer size of the max FIFO depth and DMA mode is used for
>> transfer size higher than ma
On Sun, Feb 03, 2019 at 07:48:09PM +0300, Dmitry Osipenko wrote:
> 02.02.2019 21:32, Sowjanya Komatineni пишет:
> >>> This patch adds DMA support for Tegra I2C.
> >>>
> >>> Tegra I2C TX and RX FIFO depth is 8 words. PIO mode is used for
> >>> transfer size of the max FIFO depth and DMA mode is use
On Fri, Feb 01, 2019 at 09:07:45AM -0800, Sowjanya Komatineni wrote:
> This patch adds DMA support for Tegra I2C.
>
> Tegra I2C TX and RX FIFO depth is 8 words. PIO mode is used for
> transfer size of the max FIFO depth and DMA mode is used for
> transfer size higher than max FIFO depth to save CP
02.02.2019 21:32, Sowjanya Komatineni пишет:
>>> This patch adds DMA support for Tegra I2C.
>>>
>>> Tegra I2C TX and RX FIFO depth is 8 words. PIO mode is used for
>>> transfer size of the max FIFO depth and DMA mode is used for transfer
>>> size higher than max FIFO depth to save CPU overhead.
>
02.02.2019 21:43, Sowjanya Komatineni пишет:
>
>> +static int tegra_i2c_init_dma(struct tegra_i2c_dev *i2c_dev) {
>> +struct dma_chan *dma_chan;
>> +u32 *dma_buf;
>> +dma_addr_t dma_phys;
>> +int err = 0;
>> +
>> +if (!IS_ENABLED(
03.02.2019 17:47, Dmitry Osipenko пишет:
> 01.02.2019 20:07, Sowjanya Komatineni пишет:
>> This patch adds DMA support for Tegra I2C.
>>
>> Tegra I2C TX and RX FIFO depth is 8 words. PIO mode is used for
>> transfer size of the max FIFO depth and DMA mode is used for
>> transfer size higher than ma
01.02.2019 20:07, Sowjanya Komatineni пишет:
> This patch adds DMA support for Tegra I2C.
>
> Tegra I2C TX and RX FIFO depth is 8 words. PIO mode is used for
> transfer size of the max FIFO depth and DMA mode is used for
> transfer size higher than max FIFO depth to save CPU overhead.
>
> PIO mod
01.02.2019 20:07, Sowjanya Komatineni пишет:
> This patch adds DMA support for Tegra I2C.
>
> Tegra I2C TX and RX FIFO depth is 8 words. PIO mode is used for
> transfer size of the max FIFO depth and DMA mode is used for
> transfer size higher than max FIFO depth to save CPU overhead.
>
> PIO mod
> +static int tegra_i2c_init_dma(struct tegra_i2c_dev *i2c_dev) {
> +struct dma_chan *dma_chan;
> +u32 *dma_buf;
> +dma_addr_t dma_phys;
> +int err = 0;
> +
> +if (!IS_ENABLED(CONFIG_TEGRA20_APB_DMA))
> +
> > This patch adds DMA support for Tegra I2C.
> >
> > Tegra I2C TX and RX FIFO depth is 8 words. PIO mode is used for
> > transfer size of the max FIFO depth and DMA mode is used for transfer
> > size higher than max FIFO depth to save CPU overhead.
> >
> > PIO mode needs full intervention of
01.02.2019 22:22, Dmitry Osipenko пишет:
> 01.02.2019 22:20, Sowjanya Komatineni пишет:
>>
+static int tegra_i2c_init_dma(struct tegra_i2c_dev *i2c_dev) {
+ struct dma_chan *dma_chan;
+ u32 *dma_buf;
+ dma_addr_t dma_phys;
+ int err = 0;
+
+ if (!IS_ENABLED(C
01.02.2019 20:07, Sowjanya Komatineni пишет:
> This patch adds DMA support for Tegra I2C.
>
> Tegra I2C TX and RX FIFO depth is 8 words. PIO mode is used for
> transfer size of the max FIFO depth and DMA mode is used for
> transfer size higher than max FIFO depth to save CPU overhead.
>
> PIO mod
02.02.2019 0:36, Sowjanya Komatineni пишет:
>
>>>
rx_chan = dma_request_slave_channel_reason(i2c_dev->dev, "rx");
if (IS_ERR(rx_chan))
return PTR_ERR(rx_chan);
> +
> + dma_chan = dma_request_slave_channel_reason(i2c_dev->dev, "tx");
> + if (IS
> >
> >>rx_chan = dma_request_slave_channel_reason(i2c_dev->dev, "rx");
> >>if (IS_ERR(rx_chan))
> >>return PTR_ERR(rx_chan);
> >>
> >>
> >>> +
> >>> + dma_chan = dma_request_slave_channel_reason(i2c_dev->dev, "tx");
> >>> + if (IS_ERR(dma_chan)) {
> >>> + err = PTR_E
01.02.2019 23:21, Sowjanya Komatineni пишет:
>
>> rx_chan = dma_request_slave_channel_reason(i2c_dev->dev, "rx");
>> if (IS_ERR(rx_chan))
>> return PTR_ERR(rx_chan);
>>
>>
>>> +
>>> + dma_chan = dma_request_slave_channel_reason(i2c_dev->dev, "tx");
>>> + if (IS_ERR(dma_c
> rx_chan = dma_request_slave_channel_reason(i2c_dev->dev, "rx");
> if (IS_ERR(rx_chan))
> return PTR_ERR(rx_chan);
>
>
> > +
> > + dma_chan = dma_request_slave_channel_reason(i2c_dev->dev, "tx");
> > + if (IS_ERR(dma_chan)) {
> > + err = PTR_ERR(dma_chan);
01.02.2019 22:20, Sowjanya Komatineni пишет:
>
>>> +static int tegra_i2c_init_dma(struct tegra_i2c_dev *i2c_dev) {
>>> + struct dma_chan *dma_chan;
>>> + u32 *dma_buf;
>>> + dma_addr_t dma_phys;
>>> + int err = 0;
>>> +
>>> + if (!IS_ENABLED(CONFIG_TEGRA20_APB_DMA))
>>> + retur
> > +static int tegra_i2c_init_dma(struct tegra_i2c_dev *i2c_dev) {
> > + struct dma_chan *dma_chan;
> > + u32 *dma_buf;
> > + dma_addr_t dma_phys;
> > + int err = 0;
> > +
> > + if (!IS_ENABLED(CONFIG_TEGRA20_APB_DMA))
> > + return -ENODEV;
>
> Driver shall not fail to probe i
01.02.2019 20:07, Sowjanya Komatineni пишет:
> This patch adds DMA support for Tegra I2C.
>
> Tegra I2C TX and RX FIFO depth is 8 words. PIO mode is used for
> transfer size of the max FIFO depth and DMA mode is used for
> transfer size higher than max FIFO depth to save CPU overhead.
>
> PIO mod
This patch adds DMA support for Tegra I2C.
Tegra I2C TX and RX FIFO depth is 8 words. PIO mode is used for
transfer size of the max FIFO depth and DMA mode is used for
transfer size higher than max FIFO depth to save CPU overhead.
PIO mode needs full intervention of CPU to fill or empty FIFO's
an
22 matches
Mail list logo
