Re: [PATCH for 4.9 07/59] clk: sunxi-ng: set the parent rate when adjustin CPUX clock on A33

2017-09-14 Thread Levin, Alexander (Sasha Levin)
On Fri, Sep 15, 2017 at 10:02:04AM +0800, icen...@aosc.io wrote: >在 2017-09-14 23:51，Levin, Alexander (Sasha Levin) 写道： >>From: Icenowy Zheng >> >>[ Upstream commit bb021cda2ccf45ee9470bf0f8c55323ad1c761ae ] > >As DVFS for A33 doesn't exist in 4.9, this patch doesn't affect 4.9

Re: [PATCH for 4.9 07/59] clk: sunxi-ng: set the parent rate when adjustin CPUX clock on A33

2017-09-14 Thread Levin, Alexander (Sasha Levin)
On Fri, Sep 15, 2017 at 10:02:04AM +0800, icen...@aosc.io wrote: >在 2017-09-14 23:51，Levin, Alexander (Sasha Levin) 写道： >>From: Icenowy Zheng >> >>[ Upstream commit bb021cda2ccf45ee9470bf0f8c55323ad1c761ae ] > >As DVFS for A33 doesn't exist in 4.9, this patch doesn't affect 4.9 >at all. Dropped,

Re: [PATCH for 4.9 07/59] clk: sunxi-ng: set the parent rate when adjustin CPUX clock on A33

2017-09-14 Thread icenowy
在 2017-09-14 23:51，Levin, Alexander (Sasha Levin) 写道： From: Icenowy Zheng [ Upstream commit bb021cda2ccf45ee9470bf0f8c55323ad1c761ae ] As DVFS for A33 doesn't exist in 4.9, this patch doesn't affect 4.9 at all. The CPUX clock on A33, which is for the Cortex-A7 cores, is

Re: [PATCH for 4.9 07/59] clk: sunxi-ng: set the parent rate when adjustin CPUX clock on A33

2017-09-14 Thread icenowy
在 2017-09-14 23:51，Levin, Alexander (Sasha Levin) 写道： From: Icenowy Zheng [ Upstream commit bb021cda2ccf45ee9470bf0f8c55323ad1c761ae ] As DVFS for A33 doesn't exist in 4.9, this patch doesn't affect 4.9 at all. The CPUX clock on A33, which is for the Cortex-A7 cores, is designed to be

[PATCH for 4.9 07/59] clk: sunxi-ng: set the parent rate when adjustin CPUX clock on A33

2017-09-14 Thread Levin, Alexander (Sasha Levin)
From: Icenowy Zheng [ Upstream commit bb021cda2ccf45ee9470bf0f8c55323ad1c761ae ] The CPUX clock on A33, which is for the Cortex-A7 cores, is designed to be changeable by changing the rate of PLL_CPUX. Add CLK_SET_RATE_PARENT flag to this clock. Signed-off-by: Icenowy Zheng

[PATCH for 4.9 07/59] clk: sunxi-ng: set the parent rate when adjustin CPUX clock on A33

2017-09-14 Thread Levin, Alexander (Sasha Levin)
From: Icenowy Zheng [ Upstream commit bb021cda2ccf45ee9470bf0f8c55323ad1c761ae ] The CPUX clock on A33, which is for the Cortex-A7 cores, is designed to be changeable by changing the rate of PLL_CPUX. Add CLK_SET_RATE_PARENT flag to this clock. Signed-off-by: Icenowy Zheng Signed-off-by: