Re: [PATCH net] net: eth: altera: Change access ports to mdio for all xMII applications

2015-02-19 Thread David Miller
From: Vince Bridgers Date: Thu, 12 Feb 2015 10:47:33 -0600 > Change use of Altera TSE's MDIO access from phy 0 registers to phy 1 > registers. This allows support for GMII, MII, RGMII, and SGMII > designs where the external PHY is always accesible through > Altera TSE's MDIO phy 1 registers and A

[PATCH net] net: eth: altera: Change access ports to mdio for all xMII applications

2015-02-12 Thread Vince Bridgers
Change use of Altera TSE's MDIO access from phy 0 registers to phy 1 registers. This allows support for GMII, MII, RGMII, and SGMII designs where the external PHY is always accesible through Altera TSE's MDIO phy 1 registers and Altera's PCS is accessible through MDIO phy 0 registers for SGMII appl