Re: [PATCH v2] RISC-V: Break load reservations during switch_to

On Wed, 19 Jun 2019 00:36:01 PDT (-0700), mark.rutl...@arm.com wrote: On Fri, Jun 07, 2019 at 03:22:22PM -0700, Palmer Dabbelt wrote: The comment describes why in detail. This was found because QEMU never gives up load reservations, the issue is unlikely to manifest on real hardware. Thanks

Re: [PATCH v2] RISC-V: Break load reservations during switch_to

On Fri, Jun 07, 2019 at 03:22:22PM -0700, Palmer Dabbelt wrote: > The comment describes why in detail. This was found because QEMU never > gives up load reservations, the issue is unlikely to manifest on real > hardware. > > Thanks to Carlos Eduardo for finding the bug! > @@ -330,6 +330,17 @@

Re: [PATCH v2] RISC-V: Break load reservations during switch_to

On Sun, 16 Jun 2019 10:54:06 PDT (-0700), j...@sing.id.au wrote: On 19-06-07 15:22:22, Palmer Dabbelt wrote: The comment describes why in detail. This was found because QEMU never gives up load reservations, the issue is unlikely to manifest on real hardware. Makes sense, however it

Re: [PATCH v2] RISC-V: Break load reservations during switch_to

On 19-06-07 15:22:22, Palmer Dabbelt wrote: > The comment describes why in detail. This was found because QEMU never > gives up load reservations, the issue is unlikely to manifest on real > hardware. Makes sense, however it obviously will not help until qemu actually clears load reservations on

Re: [PATCH v2] RISC-V: Break load reservations during switch_to

Looks good, Reviewed-by: Christoph Hellwig

[PATCH v2] RISC-V: Break load reservations during switch_to

The comment describes why in detail. This was found because QEMU never gives up load reservations, the issue is unlikely to manifest on real hardware. Thanks to Carlos Eduardo for finding the bug! Signed-off-by: Palmer Dabbelt --- Changes since v1 <20190605231735.26581-1-pal...@sifive.com>: *