Re: [PATCH v2 00/10] PCID and improved laziness

2017-06-18 Thread Andy Lutomirski
On Sun, Jun 18, 2017 at 2:29 PM, Levin, Alexander (Sasha Levin) wrote: > On Tue, Jun 13, 2017 at 09:56:18PM -0700, Andy Lutomirski wrote: >>There are three performance benefits here: >> >>1. TLB flushing is slow. (I.e. the flush itself takes a while.) >> This

Re: [PATCH v2 00/10] PCID and improved laziness

2017-06-18 Thread Andy Lutomirski
On Sun, Jun 18, 2017 at 2:29 PM, Levin, Alexander (Sasha Levin) wrote: > On Tue, Jun 13, 2017 at 09:56:18PM -0700, Andy Lutomirski wrote: >>There are three performance benefits here: >> >>1. TLB flushing is slow. (I.e. the flush itself takes a while.) >> This avoids many of them when switching

Re: [PATCH v2 00/10] PCID and improved laziness

2017-06-18 Thread Levin, Alexander (Sasha Levin)
On Tue, Jun 13, 2017 at 09:56:18PM -0700, Andy Lutomirski wrote: >There are three performance benefits here: > >1. TLB flushing is slow. (I.e. the flush itself takes a while.) > This avoids many of them when switching tasks by using PCID. In > a stupid little benchmark I did, it saves about

Re: [PATCH v2 00/10] PCID and improved laziness

2017-06-18 Thread Levin, Alexander (Sasha Levin)
On Tue, Jun 13, 2017 at 09:56:18PM -0700, Andy Lutomirski wrote: >There are three performance benefits here: > >1. TLB flushing is slow. (I.e. the flush itself takes a while.) > This avoids many of them when switching tasks by using PCID. In > a stupid little benchmark I did, it saves about

Re: [PATCH v2 00/10] PCID and improved laziness

2017-06-14 Thread Andy Lutomirski
On Wed, Jun 14, 2017 at 3:18 PM, Dave Hansen wrote: > On 06/13/2017 09:56 PM, Andy Lutomirski wrote: >> 2. Mms that have been used recently on a given CPU might get to keep >>their TLB entries alive across process switches with this patch >>set. TLB fills are

Re: [PATCH v2 00/10] PCID and improved laziness

2017-06-14 Thread Andy Lutomirski
On Wed, Jun 14, 2017 at 3:18 PM, Dave Hansen wrote: > On 06/13/2017 09:56 PM, Andy Lutomirski wrote: >> 2. Mms that have been used recently on a given CPU might get to keep >>their TLB entries alive across process switches with this patch >>set. TLB fills are pretty fast on modern CPUs,

Re: [PATCH v2 00/10] PCID and improved laziness

2017-06-14 Thread Dave Hansen
On 06/13/2017 09:56 PM, Andy Lutomirski wrote: > 2. Mms that have been used recently on a given CPU might get to keep >their TLB entries alive across process switches with this patch >set. TLB fills are pretty fast on modern CPUs, but they're even >faster when they don't happen.

Re: [PATCH v2 00/10] PCID and improved laziness

2017-06-14 Thread Dave Hansen
On 06/13/2017 09:56 PM, Andy Lutomirski wrote: > 2. Mms that have been used recently on a given CPU might get to keep >their TLB entries alive across process switches with this patch >set. TLB fills are pretty fast on modern CPUs, but they're even >faster when they don't happen.

[PATCH v2 00/10] PCID and improved laziness

2017-06-13 Thread Andy Lutomirski
There are three performance benefits here: 1. TLB flushing is slow. (I.e. the flush itself takes a while.) This avoids many of them when switching tasks by using PCID. In a stupid little benchmark I did, it saves about 100ns on my laptop per context switch. I'll try to improve that

[PATCH v2 00/10] PCID and improved laziness

2017-06-13 Thread Andy Lutomirski
There are three performance benefits here: 1. TLB flushing is slow. (I.e. the flush itself takes a while.) This avoids many of them when switching tasks by using PCID. In a stupid little benchmark I did, it saves about 100ns on my laptop per context switch. I'll try to improve that