On Fri, Oct 10, 2014 at 05:20:56PM -0700, Stephen Boyd wrote:
> On 10/10, Peter De Schrijver wrote:
> > > > drivers/clk/tegra/clk-pll.c:732:unsigned long input_rate =
> > > > clk_get_rate(clk_get_parent(hw->clk));
> > > > drivers/clk/tegra/clk-pll.c:1288:unsigned long input_rate =
> > > >
On 10/10, Peter De Schrijver wrote:
> > > drivers/clk/tegra/clk-pll.c:732:unsigned long input_rate =
> > > clk_get_rate(clk_get_parent(hw->clk));
> > > drivers/clk/tegra/clk-pll.c:1288:unsigned long input_rate =
> > > clk_get_rate(clk_get_parent(hw->clk));
>
> This is not so easy to chan
On Wed, Oct 08, 2014 at 07:59:23PM -0700, Mike Turquette wrote:
> Quoting Stephen Boyd (2014-10-07 18:09:22)
> > On 09/29/2014 05:12 PM, Stephen Boyd wrote:
> > > I'm also auditing clock
> > > drivers to find potential brokenness.
> > >
> >
> > These are places where we re-enter the framework un
On 09/29/2014 05:12 PM, Stephen Boyd wrote:
I'm also auditing clock
drivers to find potential brokenness.
These are places where we re-enter the framework under drivers/clk/. It
looks like sirf can be ported to use determine_rate() and something like
my "safe parent" patch. Tegra is concer
On 09/27/14 19:41, Mike Turquette wrote:
> Quoting Stephen Boyd (2014-09-03 18:01:06)
>> @@ -1069,11 +1305,24 @@ static void __clk_recalc_accuracies(struct clk *clk)
>> */
>> long clk_get_accuracy(struct clk *clk)
>> {
>> + struct ww_acquire_ctx ctx;
>> + LIST_HEAD(list);
>>
Hi Stephen,
On Wednesday, September 3, 2014 9:01pm, "Stephen Boyd"
said:
> Changing the rate of a "slow" clock can take 10s of milliseconds
> while changing the rate of a "fast" clock can be done in a few
> -static void clk_prepare_lock(void)
> +static void __clk_unlock(struct list_head *lis
Changing the rate of a "slow" clock can take 10s of milliseconds
while changing the rate of a "fast" clock can be done in a few
microseconds. With one prepare mutex a task that's trying to
change the rate of a fast clock may have to wait for a slow
clock's rate to change before it can proceed. Cons
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