Re: [PATCH v3] mtd: rawnand: mxc: set spare area size register explicitly

2018-06-20 Thread Boris Brezillon
On Tue, 19 Jun 2018 11:07:41 +0200 Miquel Raynal wrote: > On Mon, 18 Jun 2018 22:41:03 +0200, Martin Kaiser > wrote: > > > The v21 version of the NAND flash controller contains a Spare Area Size > > Register (SPAS) at offset 0x10. Its setting defaults to the maximum > > spare area size of 218

Re: [PATCH v3] mtd: rawnand: mxc: set spare area size register explicitly

2018-06-20 Thread Boris Brezillon
On Tue, 19 Jun 2018 11:07:41 +0200 Miquel Raynal wrote: > On Mon, 18 Jun 2018 22:41:03 +0200, Martin Kaiser > wrote: > > > The v21 version of the NAND flash controller contains a Spare Area Size > > Register (SPAS) at offset 0x10. Its setting defaults to the maximum > > spare area size of 218

Re: [PATCH v3] mtd: rawnand: mxc: set spare area size register explicitly

2018-06-19 Thread Miquel Raynal
On Mon, 18 Jun 2018 22:41:03 +0200, Martin Kaiser wrote: > The v21 version of the NAND flash controller contains a Spare Area Size > Register (SPAS) at offset 0x10. Its setting defaults to the maximum > spare area size of 218 bytes. The size that is set in this register is > used by the

Re: [PATCH v3] mtd: rawnand: mxc: set spare area size register explicitly

2018-06-19 Thread Miquel Raynal
On Mon, 18 Jun 2018 22:41:03 +0200, Martin Kaiser wrote: > The v21 version of the NAND flash controller contains a Spare Area Size > Register (SPAS) at offset 0x10. Its setting defaults to the maximum > spare area size of 218 bytes. The size that is set in this register is > used by the

Re: [PATCH v3] mtd: rawnand: mxc: set spare area size register explicitly

2018-06-18 Thread Boris Brezillon
On Mon, 18 Jun 2018 22:41:03 +0200 Martin Kaiser wrote: > The v21 version of the NAND flash controller contains a Spare Area Size > Register (SPAS) at offset 0x10. Its setting defaults to the maximum > spare area size of 218 bytes. The size that is set in this register is > used by the

Re: [PATCH v3] mtd: rawnand: mxc: set spare area size register explicitly

2018-06-18 Thread Boris Brezillon
On Mon, 18 Jun 2018 22:41:03 +0200 Martin Kaiser wrote: > The v21 version of the NAND flash controller contains a Spare Area Size > Register (SPAS) at offset 0x10. Its setting defaults to the maximum > spare area size of 218 bytes. The size that is set in this register is > used by the

[PATCH v3] mtd: rawnand: mxc: set spare area size register explicitly

2018-06-18 Thread Martin Kaiser
The v21 version of the NAND flash controller contains a Spare Area Size Register (SPAS) at offset 0x10. Its setting defaults to the maximum spare area size of 218 bytes. The size that is set in this register is used by the controller when it calculates the ECC bytes internally in hardware.

[PATCH v3] mtd: rawnand: mxc: set spare area size register explicitly

2018-06-18 Thread Martin Kaiser
The v21 version of the NAND flash controller contains a Spare Area Size Register (SPAS) at offset 0x10. Its setting defaults to the maximum spare area size of 218 bytes. The size that is set in this register is used by the controller when it calculates the ECC bytes internally in hardware.