Re: [PATCH v3 02/10] clk: sunxi: Add support for sun9i A80 USB clocks and resets

2015-02-01 Thread Maxime Ripard
On Wed, Jan 28, 2015 at 03:54:07AM +0800, Chen-Yu Tsai wrote: > The USB controller/phy clocks and reset controls are in a separate > address block, unlike previous SoCs where they were in the clock > controller. Also, access to the address block is controlled by a > clock gate to AHB. > > Add supp

[PATCH v3 02/10] clk: sunxi: Add support for sun9i A80 USB clocks and resets

2015-01-27 Thread Chen-Yu Tsai
The USB controller/phy clocks and reset controls are in a separate address block, unlike previous SoCs where they were in the clock controller. Also, access to the address block is controlled by a clock gate to AHB. Add support for resets requiring a clock to be enabled when asserting/deasserting