Re: [PATCH v3 5/8] rtc: ac100: Add clk output support

On Tue, Jun 28, 2016 at 3:23 AM, Maxime Ripard wrote: > On Wed, Jun 22, 2016 at 06:11:55PM +0800, Chen-Yu Tsai wrote: >> On Wed, Jun 22, 2016 at 6:02 PM, Maxime Ripard >> wrote: >> > Hi, >> > >> > On Mon, Jun 20, 2016 at

Re: [PATCH v3 5/8] rtc: ac100: Add clk output support

On Tue, Jun 28, 2016 at 3:23 AM, Maxime Ripard wrote: > On Wed, Jun 22, 2016 at 06:11:55PM +0800, Chen-Yu Tsai wrote: >> On Wed, Jun 22, 2016 at 6:02 PM, Maxime Ripard >> wrote: >> > Hi, >> > >> > On Mon, Jun 20, 2016 at 10:52:15AM +0800, Chen-Yu Tsai wrote: >> >> + /* >> >> + * The

Re: [PATCH v3 5/8] rtc: ac100: Add clk output support

On Wed, Jun 22, 2016 at 06:11:55PM +0800, Chen-Yu Tsai wrote: > On Wed, Jun 22, 2016 at 6:02 PM, Maxime Ripard > wrote: > > Hi, > > > > On Mon, Jun 20, 2016 at 10:52:15AM +0800, Chen-Yu Tsai wrote: > >> + /* > >> + * The ADDA 4 MHz clock is from the

Re: [PATCH v3 5/8] rtc: ac100: Add clk output support

On Wed, Jun 22, 2016 at 06:11:55PM +0800, Chen-Yu Tsai wrote: > On Wed, Jun 22, 2016 at 6:02 PM, Maxime Ripard > wrote: > > Hi, > > > > On Mon, Jun 20, 2016 at 10:52:15AM +0800, Chen-Yu Tsai wrote: > >> + /* > >> + * The ADDA 4 MHz clock is from the codec side of the AC100, > >> + *

Re: [PATCH v3 5/8] rtc: ac100: Add clk output support

On Sun, Jun 26, 2016 at 8:45 AM, Alexandre Belloni wrote: > On 20/06/2016 at 10:52:15 +0800, Chen-Yu Tsai wrote : >> +struct ac100_clk32k { >> + struct clk_hw hw; >> + struct regmap *regmap; >> + u8 offset; >> +}; >> + >> +#define

Re: [PATCH v3 5/8] rtc: ac100: Add clk output support

On Sun, Jun 26, 2016 at 8:45 AM, Alexandre Belloni wrote: > On 20/06/2016 at 10:52:15 +0800, Chen-Yu Tsai wrote : >> +struct ac100_clk32k { >> + struct clk_hw hw; >> + struct regmap *regmap; >> + u8 offset; >> +}; >> + >> +#define to_ac100_clk32k(_hw) container_of(_hw, struct

Re: [PATCH v3 5/8] rtc: ac100: Add clk output support

On 20/06/2016 at 10:52:15 +0800, Chen-Yu Tsai wrote : > +struct ac100_clk32k { > + struct clk_hw hw; > + struct regmap *regmap; > + u8 offset; > +}; > + > +#define to_ac100_clk32k(_hw) container_of(_hw, struct ac100_clk32k, hw) > + > +#define AC100_RTC_32K_NAME "ac100-rtc-32k" >

Re: [PATCH v3 5/8] rtc: ac100: Add clk output support

On 20/06/2016 at 10:52:15 +0800, Chen-Yu Tsai wrote : > +struct ac100_clk32k { > + struct clk_hw hw; > + struct regmap *regmap; > + u8 offset; > +}; > + > +#define to_ac100_clk32k(_hw) container_of(_hw, struct ac100_clk32k, hw) > + > +#define AC100_RTC_32K_NAME "ac100-rtc-32k" >

Re: [PATCH v3 5/8] rtc: ac100: Add clk output support

On Wed, Jun 22, 2016 at 6:02 PM, Maxime Ripard wrote: > Hi, > > On Mon, Jun 20, 2016 at 10:52:15AM +0800, Chen-Yu Tsai wrote: >> + /* >> + * The ADDA 4 MHz clock is from the codec side of the AC100, >> + * which is likely a different power domain.

Re: [PATCH v3 5/8] rtc: ac100: Add clk output support

On Wed, Jun 22, 2016 at 6:02 PM, Maxime Ripard wrote: > Hi, > > On Mon, Jun 20, 2016 at 10:52:15AM +0800, Chen-Yu Tsai wrote: >> + /* >> + * The ADDA 4 MHz clock is from the codec side of the AC100, >> + * which is likely a different power domain. However, boards >> + * always

Re: [PATCH v3 5/8] rtc: ac100: Add clk output support

Hi, On Mon, Jun 20, 2016 at 10:52:15AM +0800, Chen-Yu Tsai wrote: > + /* > + * The ADDA 4 MHz clock is from the codec side of the AC100, > + * which is likely a different power domain. However, boards > + * always have both sides powered on, so it is impossible to > + *

Re: [PATCH v3 5/8] rtc: ac100: Add clk output support

Hi, On Mon, Jun 20, 2016 at 10:52:15AM +0800, Chen-Yu Tsai wrote: > + /* > + * The ADDA 4 MHz clock is from the codec side of the AC100, > + * which is likely a different power domain. However, boards > + * always have both sides powered on, so it is impossible to > + *

[PATCH v3 5/8] rtc: ac100: Add clk output support

The AC100's RTC side has 3 clock outputs on external pins, which can provide a clock signal to the SoC or other modules, such as WiFi or GSM modules. Support this with a custom clk driver integrated with the rtc driver. Signed-off-by: Chen-Yu Tsai --- Changes since v2: none

[PATCH v3 5/8] rtc: ac100: Add clk output support

The AC100's RTC side has 3 clock outputs on external pins, which can provide a clock signal to the SoC or other modules, such as WiFi or GSM modules. Support this with a custom clk driver integrated with the rtc driver. Signed-off-by: Chen-Yu Tsai --- Changes since v2: none Changes since v1: