Re: [PATCH v3 6/6] irqchip: sifive-plic: Implement irq_set_affinity() for SMP host

On Tue, Dec 18, 2018 at 12:02 AM Christoph Hellwig wrote: > > On Fri, Nov 30, 2018 at 01:32:07PM +0530, Anup Patel wrote: > > This patch provides irq_set_affinity() implementation for PLIC driver. > > It also updates irq_enable() such that PLIC interrupts are only enabled > > for one of CPUs speci

Re: [PATCH v3 6/6] irqchip: sifive-plic: Implement irq_set_affinity() for SMP host

On Fri, Nov 30, 2018 at 01:32:07PM +0530, Anup Patel wrote: > This patch provides irq_set_affinity() implementation for PLIC driver. > It also updates irq_enable() such that PLIC interrupts are only enabled > for one of CPUs specified in IRQ affinity mask. But normally our affinity masks are that

[PATCH v3 6/6] irqchip: sifive-plic: Implement irq_set_affinity() for SMP host

Currently on SMP host, all CPUs take external interrupts routed via PLIC. All CPUs will try to claim a given external interrupt but only one of them will succeed while other CPUs would simply resume whatever they were doing before. This means if we have N CPUs then for every external interrupt N-1