Re: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory Access Engine driver support

2015-10-05 Thread Vinod Koul
On Mon, Sep 07, 2015 at 06:03:18PM +0530, Kedareswara rao Appana wrote: > +static struct xilinx_cdma_tx_segment * > +xilinx_cdma_alloc_tx_segment(struct xilinx_cdma_chan *chan) > +{ > + struct xilinx_cdma_tx_segment *segment; > + dma_addr_t phys; > + > + segment =

RE: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory Access Engine driver support

2015-10-05 Thread Appana Durga Kedareswara Rao
angi; Michal Simek; Williams, > Dan > J; Soren Brinkmann; dmaeng...@vger.kernel.org; linux-arm- > ker...@lists.infradead.org; a...@arndb.de > Subject: Re: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory > Access Engine driver support > > On Mon, 2015-10-05 at 13:50 +0

Re: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory Access Engine driver support

2015-10-05 Thread Koul, Vinod
On Mon, 2015-10-05 at 13:50 +, Appana Durga Kedareswara Rao wrote: > > > > On Mon, Sep 07, 2015 at 06:03:18PM +0530, Kedareswara rao Appana wrote: > > > This is the driver for the AXI Central Direct Memory Access (AXI > > > CDMA) core, which is a soft Xilinx IP core that provides > > >

RE: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory Access Engine driver support

2015-10-05 Thread Appana Durga Kedareswara Rao
eswara Rao; dmaeng...@vger.kernel.org; linux-arm- > ker...@lists.infradead.org; linux-kernel@vger.kernel.org > Subject: Re: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory > Access Engine driver support > > On Mon, Sep 07, 2015 at 06:03:18PM +0530, Kedareswara rao App

Re: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory Access Engine driver support

2015-10-05 Thread Vinod Koul
On Mon, Sep 07, 2015 at 06:03:18PM +0530, Kedareswara rao Appana wrote: > This is the driver for the AXI Central Direct Memory Access (AXI > CDMA) core, which is a soft Xilinx IP core that provides high-bandwidth > Direct Memory Access (DMA) between a memory-mapped source address and a >

RE: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory Access Engine driver support

2015-10-05 Thread Appana Durga Kedareswara Rao
angi; Michal Simek; Williams, > Dan > J; Soren Brinkmann; dmaeng...@vger.kernel.org; linux-arm- > ker...@lists.infradead.org; a...@arndb.de > Subject: Re: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory > Access Engine driver support > > On Mon, 2015-10-05 at 13:50 +0

Re: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory Access Engine driver support

2015-10-05 Thread Koul, Vinod
On Mon, 2015-10-05 at 13:50 +, Appana Durga Kedareswara Rao wrote: > > > > On Mon, Sep 07, 2015 at 06:03:18PM +0530, Kedareswara rao Appana wrote: > > > This is the driver for the AXI Central Direct Memory Access (AXI > > > CDMA) core, which is a soft Xilinx IP core that provides > > >

Re: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory Access Engine driver support

2015-10-05 Thread Vinod Koul
On Mon, Sep 07, 2015 at 06:03:18PM +0530, Kedareswara rao Appana wrote: > This is the driver for the AXI Central Direct Memory Access (AXI > CDMA) core, which is a soft Xilinx IP core that provides high-bandwidth > Direct Memory Access (DMA) between a memory-mapped source address and a >

Re: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory Access Engine driver support

2015-10-05 Thread Vinod Koul
On Mon, Sep 07, 2015 at 06:03:18PM +0530, Kedareswara rao Appana wrote: > +static struct xilinx_cdma_tx_segment * > +xilinx_cdma_alloc_tx_segment(struct xilinx_cdma_chan *chan) > +{ > + struct xilinx_cdma_tx_segment *segment; > + dma_addr_t phys; > + > + segment =

RE: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory Access Engine driver support

2015-10-05 Thread Appana Durga Kedareswara Rao
eswara Rao; dmaeng...@vger.kernel.org; linux-arm- > ker...@lists.infradead.org; linux-kernel@vger.kernel.org > Subject: Re: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory > Access Engine driver support > > On Mon, Sep 07, 2015 at 06:03:18PM +0530, Kedareswara rao App

[PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory Access Engine driver support

2015-09-07 Thread Kedareswara rao Appana
This is the driver for the AXI Central Direct Memory Access (AXI CDMA) core, which is a soft Xilinx IP core that provides high-bandwidth Direct Memory Access (DMA) between a memory-mapped source address and a memory-mapped destination address. This module works on Zynq (ARM Based SoC) and

[PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory Access Engine driver support

2015-09-07 Thread Kedareswara rao Appana
This is the driver for the AXI Central Direct Memory Access (AXI CDMA) core, which is a soft Xilinx IP core that provides high-bandwidth Direct Memory Access (DMA) between a memory-mapped source address and a memory-mapped destination address. This module works on Zynq (ARM Based SoC) and