jingooh...@gmail.com; bhelg...@google.com; robh...@kernel.org;
> mark.rutl...@arm.com; shawn...@kernel.org; Leo Li
> ; lorenzo.pieral...@arm.com;
> andrew.mur...@arm.com; M.h. Lian ; Z.q. Hou
>
> Subject: Re: [PATCHv2 1/4] dt-bindings: PCI: designware: Remove the
> num-lanes from
On Tue, 20 Aug 2019 07:28:43 +, "Z.q. Hou" wrote:
> From: Hou Zhiqiang
>
> The num-lanes is not a mandatory property, e.g. on FSL
> Layerscape SoCs, the PCIe link training is completed
> automatically base on the selected SerDes protocol, it
> doesn't need the num-lanes to set-up the link
On Tue, Aug 20, 2019 at 07:28:43AM +, Z.q. Hou wrote:
> From: Hou Zhiqiang
>
> The num-lanes is not a mandatory property, e.g. on FSL
> Layerscape SoCs, the PCIe link training is completed
> automatically base on the selected SerDes protocol, it
> doesn't need the num-lanes to set-up the
sys.com;
> jingooh...@gmail.com; bhelg...@google.com; robh...@kernel.org;
> mark.rutl...@arm.com; shawn...@kernel.org; Leo Li
> ; lorenzo.pieral...@arm.com; M.h. Lian
>
> Subject: Re: [PATCHv2 1/4] dt-bindings: PCI: designware: Remove the
> num-lanes from Required properties
>
> On
On Tue, Aug 20, 2019 at 07:28:43AM +, Z.q. Hou wrote:
> From: Hou Zhiqiang
>
> The num-lanes is not a mandatory property, e.g. on FSL
> Layerscape SoCs, the PCIe link training is completed
> automatically base on the selected SerDes protocol, it
> doesn't need the num-lanes to set-up the
5 matches
Mail list logo