On 07.08.2020 22:20, Stephen Boyd wrote:
> Quoting Sylwester Nawrocki (2020-08-07 10:06:08)
>> On 8/6/20 18:11, Tomasz Figa wrote:
--- a/drivers/clk/samsung/clk-pll.c
+++ b/drivers/clk/samsung/clk-pll.c
@@ -63,6 +63,27 @@ static long samsung_pll_round_rate(struct clk_hw *hw,
2020年8月7日(金) 19:06 Sylwester Nawrocki :
>
> Hi Tomasz,
>
> On 8/6/20 18:11, Tomasz Figa wrote:
> >> --- a/drivers/clk/samsung/clk-pll.c
> >> +++ b/drivers/clk/samsung/clk-pll.c
> >> @@ -63,6 +63,27 @@ static long samsung_pll_round_rate(struct clk_hw *hw,
> >> return rate_table[i - 1].rate;
Hi Tomasz,
On 8/6/20 18:11, Tomasz Figa wrote:
>> --- a/drivers/clk/samsung/clk-pll.c
>> +++ b/drivers/clk/samsung/clk-pll.c
>> @@ -63,6 +63,27 @@ static long samsung_pll_round_rate(struct clk_hw *hw,
>> return rate_table[i - 1].rate;
>> }
>>
>> +static int samsung_pll_lock_wait(struct sa
Hi Sylwester,
On 8/7/20 1:06 AM, Sylwester Nawrocki wrote:
> In the .set_rate callback for some PLLs there is a loop polling state
> of the PLL lock bit and it may become an endless loop when something
> goes wrong with the PLL. For some PLLs there is already (duplicated)
> code for polling with a
Hi Sylwester,
2020年8月6日(木) 18:06 Sylwester Nawrocki :
>
> In the .set_rate callback for some PLLs there is a loop polling state
> of the PLL lock bit and it may become an endless loop when something
> goes wrong with the PLL. For some PLLs there is already (duplicated)
> code for polling with a ti
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