Device timer12 is automatically disabled on all HS devices via DTS property
ti,timer-secure in file omap3.dtsi so it can be safely removed. We do not
need to disable it on another place.
Signed-off-by: Pali Rohár pali.ro...@gmail.com
---
arch/arm/boot/dts/omap34xx-hs.dtsi |4
Function pm_runtime_get_sync could fail and we need to check return
value to prevent kernel crash.
Signed-off-by: Pali Rohár pali.ro...@gmail.com
---
drivers/crypto/omap-sham.c |9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/omap-sham.c
Currently, fscache_cancel_op() only cancels pending operations - attempts to
cancel in-progress operations are ignored. This leads to a problem in
fscache_wait_for_operation_activation() whereby the wait is terminated, but
the object has been killed.
The check at the end of the function now
Any time an incomplete operation is cancelled, the operation cancellation
function needs to be called to clean up. This is currently being passed
directly to some of the functions that might want to call it, but not all.
Instead, pass the cancellation method pointer to the
On 24.02.15 23:21, J. German Rivera wrote:
Platform device driver that sets up the basic bus infrastructure
for the fsl-mc bus type, including support for adding/removing
fsl-mc devices, register/unregister of fsl-mc drivers, and bus
match support to bind devices to drivers.
On 24.02.15 23:50, J. German Rivera wrote:
The fsl-mc object allocator driver manages allocatable fsl-mc
objects such as DPBPs, DPMCPs and DPCONs. It provides services to
other fsl-mc drivers to allocate/deallocate these types of objects.
Oh sorry, what I forgot to mention in the other mail
Hi,
Here we have three patches that add a DMA driver for the Ingenic JZ4780 SoC.
JZ4780 support is still in-flight.
See http://patchwork.linux-mips.org/bundle/paulburton/ci20-v3.20/
These are based on 4.0-rc1.
Apart from the channel numbers, jz4740 and jz4780 are quite different.
The
From: Alex Smith alex.sm...@imgtec.com
This patch adds a driver for the DMA controller found in the Ingenic
JZ4780.
It currently does not implement any support for the programmable firmware
feature of the controller - this is not necessary for most uses. It also
does not take priority into
On Thu, Feb 26, 2015 at 09:16:27AM +, Srinivas Kandagatla wrote:
I think we are making simple eeprom framework too smart which will
break in future.
IMHO, Anything on top of eeprom interface that interprets the data should
not go into the eeprom framework itself, it can either live some
The documentation for /proc/pid/status does not mention that the value of
VmSwap counts only swapped out anonymous private pages and not shmem. This is
not obvious, so document this limitation.
Signed-off-by: Vlastimil Babka vba...@suse.cz
---
I've noticed that proc(5) manpage is currently
Currently, /proc/pid/smaps will always show Swap: 0 kB for shmem-backed
mappings, even if the mapped portion does contain pages that were swapped out.
This is because unlike private anonymous mappings, shmem does not change pte
to swap entry, but pte_none when swapping the page out. In the smaps
This patch just move content of file omap34xx-hs.dtsi into omap3-tao3530.dts.
There is no code change, patch is just preparation for removing -hs file.
Signed-off-by: Pali Rohár pali.ro...@gmail.com
---
arch/arm/boot/dts/omap3-tao3530.dtsi | 11 ++-
1 file changed, 10 insertions(+), 1
This series is based on Jerome Marchand's [1] so let me quote the first
paragraph from there:
There are several shortcomings with the accounting of shared memory
(sysV shm, shared anonymous mapping, mapping to a tmpfs file). The
values in /proc/pid/status and statm don't allow to distinguish
Presented patches add support for Odroid's U3 optional CPU FAN, which uses PWM
subsystem for low level control.
After successful probe it registers itself as a cooling device for thermal
subsystem.
This driver also supports devices without DTS specified.
To provide correct functionality, new
On 02/21/2015 05:16 PM, Pavol Cupka wrote:
Hi list,
I am encountering a bug on my desktop PC. Running gentoo-sources
(patches for gentoo) 3.19.0, gcc 4.8.4, glibc 2.19
Although there don't seem to be many gentoo patches on top, you should try
reproducing this with vanilla 3.19 kernel first.
On 26/02/15 12:31, Rameshwar Sahu wrote:
Hi Vinod,
On Tue, Feb 24, 2015 at 6:23 PM, Rameshwar Prasad Sahu rs...@apm.com wrote:
This patch implements the APM X-Gene SoC DMA engine driver. The APM X-Gene
SoC DMA engine consists of 4 DMA channels for performing DMA operations.
These DMA
On 24.02.15 23:50, J. German Rivera wrote:
The fsl-mc object allocator driver manages allocatable fsl-mc
objects such as DPBPs, DPMCPs and DPCONs. It provides services to
I'd recommend to explain what these abbreviations mean. It's
ridiculously hard to remember what they are about. So please
On 27.01.15 15:35, Stuart Yoder wrote:
Hi Arnd/Alex,
German has posted an example driver for the fsl-mc bus in his RFC
[RFC PATCH 1/1] drivers/bus: fsl-mc object allocator driver.
In addition I have made available the skeleton for a driver for
one of the objects/devices (crypto) that
Hi Guenter,
On 02/26/2015 05:59 AM, Lukasz Majewski wrote:
The PWM FAN device can now be used as a thermal cooling device.
Necessary infrastructure has been added in this commit.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Acked-by: Eduardo Valentin edubez...@gmail.com
---
vg.docx
Description: MS-Word 2007 document
When an object is being marked as no longer live, do this under the object
spinlock to prevent a race with operation submission targeted on that object.
The problem occurs due to the following pair of intertwined sequences when the
cache tries to create an object that would take it over the hard
Count the number of objects that get culled by the cache backend and the
number of objects that the cache backend declines to instantiate due to lack
of space in the cache.
These numbers are made available through /proc/fs/fscache/stats
Signed-off-by: David Howells dhowe...@redhat.com
---
with:
fscache-fixes-20150226
David
---
David Howells (13):
FS-Cache: Count culled objects and objects rejected due to lack of space
FS-Cache: Move fscache_report_unexpected_submission() to make it more
available
FS-Cache: When submitting an op, cancel it if the target object is dying
fscache_object_is_dead() returns true only if the object is marked dead and
the cache got an I/O error. This should be a logical OR instead. Since two
of the callers got split up into handling for separate subcases, expand the
other callers and kill the function. This is probably the right
Out of line fscache_operation_init() so that it can access internal FS-Cache
features, such as stats, in a later commit.
Signed-off-by: David Howells dhowe...@redhat.com
---
fs/fscache/operation.c| 22 ++
include/linux/fscache-cache.h | 24
Count and display through /proc/fs/fscache/stats the number of initialised
operations.
Signed-off-by: David Howells dhowe...@redhat.com
---
Documentation/filesystems/caching/fscache.txt |3 ++-
fs/fscache/internal.h |1 +
fs/fscache/operation.c
When submitting an operation, prefer to cancel the operation immediately
rather than queuing it for later processing if the object is marked as dying
(ie. the object state machine has reached the KILL_OBJECT state).
Whilst we're at it, change the series of related test_bit() calls into a
With those bindings it is possible to use pwm-fan device available in
Odroid U3 as a cooling device.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Acked-by: Eduardo Valentin edubez...@gmail.com
---
Changes for v2:
- Rename cooling-pwm-values property to cooling-levels
Changes for v3:
-
Move fscache_report_unexpected_submission() up within operation.c so that it
can be called from fscache_submit_exclusive_op() too.
Signed-off-by: David Howells dhowe...@redhat.com
---
fs/fscache/operation.c | 74
1 file changed, 37
ZRAM_CTL_ADD ioctl requires valid device_id to be provided, that can be a
bit inconvenient. Change zram_add() to return negative value upon new device
creation failure, and device_id (= 0) value otherwise.
This prepares ZRAM_CTL_ADD to perform automatic device_id assignment. New
device_id will be
With dynamic device creation/removal printing num_devices in zram_init()
doesn't make a lot of sense, as well as printing the number of destroyed
devices in destroy_devices(). Print per-device action (added/removed) in
zram_add() and zram_remove() instead.
Example:
[ 3645.259652] zram: Added
On Thu, 2015-02-26 at 14:35 +0100, Juergen Gross wrote:
+
+ /* reset completion */
+ if ((info-ports[wIndex].status
USB_PORT_STAT_RESET) != 0
+ time_after_eq(jiffies,
info-ports[wIndex].timeout)) {
+
2015-02-26, 14:54:33 +0100, Denys Vlasenko wrote:
On Thu, Feb 26, 2015 at 1:11 PM, Denys Vlasenko
vda.li...@googlemail.com wrote:
On Thu, Feb 26, 2015 at 10:55 AM, Denys Vlasenko
vda.li...@googlemail.com wrote:
On Wed, Feb 25, 2015 at 10:59 PM, Andy Lutomirski l...@amacapital.net
wrote:
Em Thu, Feb 26, 2015 at 01:57:42PM +0900, Masami Hiramatsu escreveu:
(2015/02/25 22:25), Arnaldo Carvalho de Melo wrote:
Em Wed, Feb 25, 2015 at 11:53:16AM +0900, Masami Hiramatsu escreveu:
(2015/02/25 3:49), Arnaldo Carvalho de Melo wrote:
Hmm, strange. Could you tell me the version of
On 02/26/2015 02:51 PM, Vlastimil Babka wrote:
Currently, /proc/pid/smaps will always show Swap: 0 kB for shmem-backed
mappings, even if the mapped portion does contain pages that were swapped out.
This is because unlike private anonymous mappings, shmem does not change pte
to swap entry, but
On Thu, 26 Feb 2015 08:49:07 +0100
Peter Zijlstra pet...@infradead.org wrote:
Yes, notice that we don't start iterating at the beginning; this in on
purpose. If we start iterating at the beginning, _every_ cpu will again
pile up on the first one.
By starting at the current cpu, each cpu
From: Alex Smith alex.sm...@imgtec.com
Add device tree bindings for the DMA controller on JZ4780 SoCs, used by
the dma-jz4780 driver.
Signed-off-by: Alex Smith alex.sm...@imgtec.com
Signed-off-by: Zubair Lutfullah Kakakhel zubair.kakak...@imgtec.com
---
V3 - V2
Changed binding.
Used to be 3 DMA
This patch set proposes an improved fix for the race condition that
originally was fixed in commit 2a4a8b1e5d9d (MIPS: Remove race window
in page fault handling).
I have used the flush_icache_page API that is marked as deprecated in
Documentation/cachetlb.txt. There are strong reasons to keep
Revert commit 2a4a8b1e5d9d (MIPS: Remove race window in page fault
handling) because it increased the number of flushed dcache pages and
became a performance problem for some workloads.
Signed-off-by: Lars Persson lar...@axis.com
---
arch/mips/include/asm/pgtable.h | 10 ++
Winning Batch No: QF-134-8876,V-588)
Your email ID have been selected for Qatar Foundation 2015 Compensation Funds
Valid £800.000.00GPB contact(morganad...@att.net) for procedures of claimsa
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On 02/26/2015 02:02 PM, Paolo Bonzini wrote:
On 24/02/2015 00:27, Scott Wood wrote:
This isn't a host PIC driver. It's guest PIC emulation, some of which
is indeed not suitable for a rawlock (in particular, openpic_update_irq
which loops on the number of vcpus, with a loop body that calls
On Thu, Feb 26, 2015 at 10:26:50AM +, One Thousand Gnomes wrote:
So that GPL header at begining of each file becomes one line... and so
that if it is BSD/GPL dual licensed is plain to see, and I don't have
to read the notices saying oh this is gpl.. but if you want to,
delete gpl above
On Thu, Feb 26, 2015 at 06:55:22AM -0500, Peter Hurley wrote:
On 11/27/2014 12:56 PM, Leif Lindholm wrote:
Support specifying console options (like with console=ttyXN,options)
by appending them to the stdout-path property after a separating ':'.
Example:
stdout-path =
This patch series fix crypto support for omap3 devices which use DT.
It enables AES and SHAM on N9/N950 and SHAM on N900. AES is still disabled for
N900.
Pali Rohár (10):
ARM: OMAP2+: Return correct error values from device and hwmod
ARM: OMAP3: Fix crypto support for HS devices
crypto:
* Steven Rostedt | 2015-02-23 19:57:43 [-0500]:
On Mon, 23 Feb 2015 17:16:27 -0700
Thavatchai Makphaibulchoke thavatchai.makpahibulch...@hp.com wrote:
If I'm not mistaken, another reason could also be due to the rate of the
timer interrupt, in the case that the mutex is highly contested IH
This patch provides code for reading PWM FAN configuration data via
device tree. The pwm-fan can work with full speed when configuration
is not provided. However, errors are propagated when wrong DT bindings
are found.
Additionally the struct pwm_fan_ctx has been extended.
Signed-off-by: Lukasz
It was necessary to decouple code handling writing to sysfs from the one
responsible for setting PWM of the fan.
Due to that, new __set_pwm() method was extracted, which is responsible for
only setting new PWM duty cycle.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v2:
-
The PWM FAN device can now be used as a thermal cooling device. Necessary
infrastructure has been added in this commit.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Acked-by: Eduardo Valentin edubez...@gmail.com
---
Changes for v2:
- Replace pwm_fan_cooling_states with
On Thu, 26 Feb 2015 14:47:54 +0100
Peter Zijlstra pet...@infradead.org wrote:
Thinking about this more, is it because a wmb just forces the CPU to
write everything before this before it writes anything after it. That
is, the writes themselves can happen at a much later time. Does a plain
On Thu, Feb 26, 2015 at 12:43:09PM +0100, Peter Zijlstra wrote:
+static struct module *__tree_find(struct rb_root *r, unsigned long addr)
+{
+ struct rb_node *n = r-rb_node;
+
+ while (n) {
+ struct module *m = mod_entry(n);
+ int idx = mod_node_idx(m, n);
On Thu, Feb 26, 2015 at 12:04 AM, Borislav Petkov b...@alien8.de wrote:
On Wed, Feb 25, 2015 at 01:00:16AM +0100, Denys Vlasenko wrote:
After TEST insn, JE actually performs jump if zero,
let's use JZ mnemonic instead.
No code changes, but less confusion.
Signed-off-by: Denys Vlasenko
* Xander Huff | 2015-01-28 15:06:59 [-0600]:
Fixed by wrapping the test definitions in #ifndef CONFIG_PREEMPT_RT_FULL
conditionals.
FYI: To be clearer, this should apply to all stable RT releases 3.4 and later.
Applied
Sebastian
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Commit a83fe28e2e45 (perf: Fix put_event() ctx lock) changed lock logic in
put_event() by replacing mutex_lock_nested() with perf_event_ctx_lock_nested(),
but didn't fix subsequent mutex_unlock() with correct counterpart,
perf_event_ctx_unlock(). ctx is thus leaked as a result of incremented
Signed-off-by: Zubair Lutfullah Kakakhel zubair.kakak...@imgtec.com
---
MAINTAINERS | 5 +
1 file changed, 5 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index ddc5a8c..be98874 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4962,6 +4962,11 @@ W:
I have just created since-3.19 branch in mm git tree
(http://git.kernel.org/?p=linux/kernel/git/mhocko/mm.git;a=summary). It
is based on v3.19 tag in Linus tree and mmotm-2015-02-25-21-19.
I have pulled some cgroup wide changes from Tejun.
As usual mmotm trees are tagged with signed tag
(finger
On Tue, Feb 24, 2015 at 05:30:49PM -0800, Stephen Boyd wrote:
On 02/24, Maxime Ripard wrote:
On Mon, Feb 23, 2015 at 03:11:40PM -0800, Stephen Boyd wrote:
I would do something more simple that is just a list of keys and
their location like this:
device-serial-number = start
After the only user of the variable has been removed, we get a valid gcc
warning about it:
regulator/wm8350-regulator.c:1154:17: warning: unused variable 'wm8350'
[-Wunused-variable]
The obvious fix is to remove the variable as well.
Signed-off-by: Arnd Bergmann a...@arndb.de
Fixes:
Introduces the Xen pvUSB backend. With pvUSB it is possible for a Xen
domU to communicate with a USB device assigned to that domU. The
communication is all done via the pvUSB backend in a driver domain
(usually Dom0) which is owner of the physical device.
The code is taken from the pvUSB
These files are not used by any DTS file anymore.
Signed-off-by: Pali Rohár pali.ro...@gmail.com
---
arch/arm/boot/dts/omap34xx-hs.dtsi | 12
arch/arm/boot/dts/omap36xx-hs.dtsi | 12
2 files changed, 24 deletions(-)
delete mode 100644
Without this patch function pm_runtime_get_sync() returns 0 even when some
omap subfunction fails. This patch properly propagate error codes from omap
functions back to caller.
This patch fix problem, when loading omap-aes driver in qemu cause kernel oops.
Signed-off-by: Pali Rohár
This patch adds missing dma DTS definitions for omap aes and sham drivers.
Without it kernel drivers do not work.
Signed-off-by: Pali Rohár pali.ro...@gmail.com
---
arch/arm/boot/dts/omap3.dtsi |4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/omap3.dtsi
This patch moves content of file omap34xx-hs.dtsi into omap3-n900.dts and enable
omap sham support (omap HW support for SHA + MD5). After testing both omap hwmod
and omap-sham.ko drivers it looks like signed Nokia X-Loader enable L3 firewall
for omap sham. There is no kernel crash with both
On Thu, 26 Feb 2015 08:45:59 +0100
Peter Zijlstra pet...@infradead.org wrote:
On Wed, Feb 25, 2015 at 12:50:15PM -0500, Steven Rostedt wrote:
It can't be used for state?
If one CPU writes zero, and the other CPU wants to decide if the
system is in the state to do something, isn't a
This is only an API consolidation and should make things more readable
it replaces var * HZ / 1000 by msecs_to_jiffies(var).
Signed-off-by: Nicholas Mc Guire hof...@osadl.org
Acked-by: Arend van Spriel ar...@broadcom.com
Thanks, applied to wireless-drivers-next.git.
Kalle Valo
--
To
The stih407 family SoC's have additional glue registers in the flashSS which
are used to configure the Arasan controller.
This patch adds macros for the register offsets and bitfields which will be
used by
subsequent patches to support stih407 family SoC's.
Signed-off-by: Peter Griffin
Hi,
This series adds sd/emmc support to the sdhci-st.c driver for stih407
family silicon. The changes mainly involve congiguring some extra glue
registers in the flashSS which configure the Arasan controller.
This series also adds support for UHS modes for eMMC. To allow
UHS HS200/SD104 modes to
To allow UHS modes to work properly we need to provide the st specific
set_uhs_signaling callback function. This function differs from the
generic sdhci_set_uhs_signaling callback in that we need to configure
the correct delay depending on the UHS mode, and also set the V18_EN
bit.
Signed-off-by:
Some additional quirks need to be enabled now we support UHS
modes. This avoids some spurious warnings like
Got data interrupt 0x0002 even though no data operation was in progress
Testing on stih410-b2120 board achieves the following speeds
with HS200 eMMC card.
max-frequency = 200Mhz
The nodes have been split to allow as much commonality as possible.
The stih407 has a silicon bug with eMMC UHS modes (with top regs)
and as such doesn't have any of the uhs dt properties.
Signed-off-by: Peter Griffin peter.grif...@linaro.org
---
arch/arm/boot/dts/stih407-family.dtsi | 30
Hi Thomas,
did anything ever come out of this?
I'm encountering a similar but different problem, where a nested
interrupt handler is called directly from the resend tasklet (and
therefore -- if I'm not mistaken -- in an atomic context, which is
unexpected). This issue however appears during
STiH407 family SoC's have glue registers in the flashSS subsystem which
are used to configure the Arasan HC. This patch configures these glue
registers according to what has been specified in the DT.
Signed-off-by: Peter Griffin peter.grif...@linaro.org
Signed-off-by: Giuseppe Cavallaro
Commit-ID: b4d8327024637cb2a1f7910dcb5d0ad7a096f473
Gitweb: http://git.kernel.org/tip/b4d8327024637cb2a1f7910dcb5d0ad7a096f473
Author: Wang Nan wangn...@huawei.com
AuthorDate: Thu, 26 Feb 2015 13:49:39 +0800
Committer: Ingo Molnar mi...@kernel.org
CommitDate: Thu, 26 Feb 2015 12:29:20
Due to the tight timing constriants in some UHS modes, it is required to have
some delay management in the design. Two types of delay management are supported
in the HW: -
1) Static delay management
2) Dynamic delay management
NB: The delay management is only there when eMMC interface is
On Fri, 20 Feb 2015 15:50:36 +0800
Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com wrote:
On Feb 9, 2015, at 10:50 PM, Jean-Christophe PLAGNIOL-VILLARD
plagn...@jcrosoft.com wrote:
On Feb 9, 2015, at 2:23 AM, Boris Brezillon
boris.brezil...@free-electrons.com wrote:
This patch updates the binding information to reflect the
extra dt options which are now supported by the sdhci-st.c
driver which enable support for stih407 family silicon.
Stih410 SoC and later support UHS modes for eMMC, so the
driver now makes use of these common bindings. Examples
are
STiH407 family SoC's can have a reset signal for the controller which needs to
be managed. Also the eMMC controller has some additional 'top' memory mapped
registers which are used to manage the dynamic and static delay required for
UHS modes. This patch adds support for creating the mapping,
This adds documentation for hisilicon acpu's cpufreq driver.
OPP library is used for device tree parsing to get frequency list;
Furthermore, this driver can bind all CPUs to change frequency together,
or the two clusters can trigger the frequency change independently. This
is controlled by the
Add acpu driver for hisilicon SoC, acpu is application processor
subsystem. Dependent on the H/W design, the silicon may has the coupled
clock domain for all clusters, or every cluster can have the dedicated
clock domain. So this driver will support both implementations.
Signed-off-by: Leo Yan
This series adds support for hisilicon acpu cpufreq driver, which
has been tested on Linaro's 96board hikey with hi6220 SoC.
Leo Yan (2):
cpufreq: hisilicon: add acpu driver
dt-bindings: cpufreq: document for hisilicon acpu driver
.../bindings/cpufreq/cpufreq-hisi-acpu.txt | 112
On Thu, Feb 26, 2015 at 07:43:01AM -0500, Steven Rostedt wrote:
On Thu, 26 Feb 2015 08:45:59 +0100
Peter Zijlstra pet...@infradead.org wrote:
On Wed, Feb 25, 2015 at 12:50:15PM -0500, Steven Rostedt wrote:
It can't be used for state?
If one CPU writes zero, and the other CPU wants
Now that the retrieval operation may be disposed of by fscache_put_operation()
before we actually set the context, the retrieval-specific cleanup operation
can produce a NULL-pointer dereference when it tries to unconditionally clean
up the netfs context.
Given that it is expected that we'll get
Reject new operations that are being submitted against an object if that
object has failed its lookup or creation states or has been killed by the
cache backend for some other reason, such as having been culled.
Signed-off-by: David Howells dhowe...@redhat.com
---
fs/fscache/object.c|2
Call fscache_put_operation() or a wrapper on any op that has gone through
fscache_operation_init() so that the accounting shown in /proc is done
correctly, specifically fscache_n_op_release.
fscache_put_operation() therefore now allows an op in the INITIALISED state as
well as in the CANCELLED
On Feb 26, 2015, at 9:32 PM, Nicolas Ferre nicolas.fe...@atmel.com wrote:
Le 08/02/2015 19:23, Boris Brezillon a écrit :
The gpiochip_lock_as_irq call can fail and return an error, while the
irq_startup is not expected to fail (returns an unsigned int which is not
checked by irq core
Hello.
On 02/26/2015 12:56 AM, Ameen Ali wrote:
Whenever there is a division it is usually worthwhile to
add some belt'n'braces code to ensure that cnt != 0, otherwise
a machine signal can occur.
Signed-off-by : Ameen Ali ameenali...@gmail.com
---
On 25 February 2015 at 22:53, Shawn Guo shawn@linaro.org wrote:
On Wed, Feb 25, 2015 at 04:32:32PM -0700, Mathieu Poirier wrote:
diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-stm
b/Documentation/ABI/testing/sysfs-bus-coresight-devices-stm
new file mode 100644
index
Explanation of several properties, which allow PWM fan working as a cooling
device, have been embraced in this commit.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Acked-by: Eduardo Valentin edubez...@gmail.com
---
Changes for v2:
- Rename cooling-pwm-values to cooling-levels
- Remove
Hi Andrew,
On 02/26/2015 08:46 AM, Andrew Lunn wrote:
On Thu, Feb 26, 2015 at 06:55:22AM -0500, Peter Hurley wrote:
On 11/27/2014 12:56 PM, Leif Lindholm wrote:
Support specifying console options (like with console=ttyXN,options)
by appending them to the stdout-path property after a
This patch makes some preparations for dynamic device ADD/REMOVE functionality
via /dev/zram-control interface.
Remove `zram_devices' array and switch to id-to-pointer translation (idr).
idr doesn't bloat zram struct with additional members, f.e. list_head, yet
still provides ability to match the
Hello,
this patchset introduces dynamic (on demand) zram device add-remove
functionality via /dev/zram-control interface. Two ioctl commands are
defined as of now (accessible in user-space via new zram.h header file):
-- ZRAM_CTL_ADD
add new device (generates device_id automatically or
Introduce /dev/zram-control interface which lets user-space to add a new zram
device (ZRAM_CTL_ADD ioctl) or remove the existing one (ZRAM_CTL_REMOVE ioctl).
This patch adds only two ioctl operations: add device and remove device. There
is no support for `automatic' device_id generation in this
On Thu, Feb 26, 2015 at 11:00:46AM +, One Thousand Gnomes wrote:
On Tue, 17 Feb 2015 11:13:39 -0800
Linus Torvalds torva...@linux-foundation.org wrote:
On Tue, Feb 17, 2015 at 11:08 AM, J. Bruce Fields bfie...@fieldses.org
wrote:
I agree that it's weird, but I think it's what
On 02/26/2015 03:37 AM, Geert Uytterhoeven wrote:
When trying to kexec into a new kernel on a platform where multiple CPU
cores are present, but no SMP bringup code is available yet, the
kexec_load system call fails with:
kexec_load failed: Invalid argument
The SMP test added to
On Thu, Feb 26, 2015 at 04:55:35PM +, Mathieu Desnoyers wrote:
Dunno, it seemed like a good a place as any.
My personal coding-style is to put all definitions
at the top of C files, but I don't know if it's within
the kernel coding style guide lines or just something
I'm personally
Linus,
please pull sound fixes for v4.0-rc2 from:
git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git
tags/sound-4.0-rc2
The topmost commit is de5d0ad506cb10ab143e2ffb9def7607e3671f83
sound fixes for 4.0-rc2
Most
Hi Chris,
I have not heard any more feedback on this patchset. Is it in your
queue to review or merge into your tree?
Thanks,
Scott
On 15-02-09 04:06 PM, Scott Branden wrote:
This series of patchsets contains the IPROC SDHCI driver used
in a series of Broadcom SoCs
Quirks are also added
On Wed 25-02-15 12:41:07, David Rientjes wrote:
On Wed, 25 Feb 2015, Michal Hocko wrote:
diff --git a/mm/page_alloc.c b/mm/page_alloc.c
index 2d224bbdf8e8..c2ff40a30003 100644
--- a/mm/page_alloc.c
+++ b/mm/page_alloc.c
@@ -2363,7 +2363,8 @@ __alloc_pages_may_oom(gfp_t gfp_mask,
On Thu, Feb 26, 2015 at 1:08 AM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
Hello Olof,
Thanks a lot for your feedback.
On 02/26/2015 02:13 AM, Gwendal Grignou wrote:
Olof,
I think the way Javier did it is fine, the 'major' of the ioctl is
0xEC, from ':'.
Gwendal.
On Thursday, February 26, 2015 04:47:24 PM Boris Brezillon wrote:
On Thu, 26 Feb 2015 16:44:16 +0100
Rafael J. Wysocki r...@rjwysocki.net wrote:
On Thursday, February 26, 2015 09:03:47 AM Boris Brezillon wrote:
Hi Rafael,
On Wed, 25 Feb 2015 22:59:36 +0100
Rafael J. Wysocki
These patches make some misc chanes to the driver, replacing sscanf with
kstrtoint, DEVICE_ATTR_{RW, WO} macros and adding documentation about
the sysfs entries.
Azael Avalos (3):
toshiba_haps: Replace sscanf with kstrtoint
toshiba_haps: Make use of DEVICE_ATTR_{RW, WO} macros
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