+++ Jessica Yu [05/04/16 15:19 -0400]:
+++ Miroslav Benes [05/04/16 15:07 +0200]:
On Mon, 4 Apr 2016, Josh Poimboeuf wrote:
So I think this doesn't fix the problem. Dynamic relocations are
applied to the "patch module", whereas the above code deals with the
initialization order of the
+++ Jessica Yu [05/04/16 15:19 -0400]:
+++ Miroslav Benes [05/04/16 15:07 +0200]:
On Mon, 4 Apr 2016, Josh Poimboeuf wrote:
So I think this doesn't fix the problem. Dynamic relocations are
applied to the "patch module", whereas the above code deals with the
initialization order of the
On Wed, 2016-04-06 at 21:45:31 +0530, Kedareswara rao Appana wrote:
> This patch renames the vdma-mm2s-channel/vdma-s2mm-channel
> property with dma-mm2s-channel/dma-s2mm-channel to sync with
> the driver.
>
> Signed-off-by: Kedareswara rao Appana
> ---
> Changes for v3:
>
On Wed, 2016-04-06 at 21:45:31 +0530, Kedareswara rao Appana wrote:
> This patch renames the vdma-mm2s-channel/vdma-s2mm-channel
> property with dma-mm2s-channel/dma-s2mm-channel to sync with
> the driver.
>
> Signed-off-by: Kedareswara rao Appana
> ---
> Changes for v3:
> ---> New patch.
>
>
On Wed, Apr 06, 2016 at 07:58:09AM -0600, Toshi Kani wrote:
> When CONFIG_FS_DAX_PMD is set, DAX supports mmap() using PMD page
> size. This feature relies on both mmap virtual address and FS
> block data (i.e. physical address) to be aligned by the PMD page
> size. Users can use mkfs options to
On Wed, Apr 06, 2016 at 07:58:09AM -0600, Toshi Kani wrote:
> When CONFIG_FS_DAX_PMD is set, DAX supports mmap() using PMD page
> size. This feature relies on both mmap virtual address and FS
> block data (i.e. physical address) to be aligned by the PMD page
> size. Users can use mkfs options to
On Fri, 11 Mar 2016 16:38:21 +0100
Sebastian Andrzej Siewior wrote:
Apologize for the delay, I missed it until Rui reminded me.
> Oh boy oh boy. This thing runs at SCHED_FIFO MAX_USER_RT_PRIO/2 and
> stops at mwait_idle_with_hints(). Why bother with /2?
> There are a few
On Fri, 11 Mar 2016 16:38:21 +0100
Sebastian Andrzej Siewior wrote:
Apologize for the delay, I missed it until Rui reminded me.
> Oh boy oh boy. This thing runs at SCHED_FIFO MAX_USER_RT_PRIO/2 and
> stops at mwait_idle_with_hints(). Why bother with /2?
> There are a few things I haven't fully
On Wed, 2016-04-06 at 17:13 +0100, David Howells wrote:
> Mimi Zohar wrote:
>
> > FYI, restrict_link_by_ima_mok() allows keys to be added to the IMA
> > keyring signed by a key on the .ima_mok keyring, but
> > restrict_link_by_builtin_and_secondary_trusted() results in
On Wed, 2016-04-06 at 17:13 +0100, David Howells wrote:
> Mimi Zohar wrote:
>
> > FYI, restrict_link_by_ima_mok() allows keys to be added to the IMA
> > keyring signed by a key on the .ima_mok keyring, but
> > restrict_link_by_builtin_and_secondary_trusted() results in "errno:
> > Required key
With those patches it becomes possible to tell the kernel in which mode
current task is.
I need it for compatibility process C/R:
restorer is native x86_64 process, that maps vmas, restore task parameters,
does clone to add threads and so on. To restore 32-bit application, that
runs on x86_64 (in
This is simple test to determine if arch_prctl(ARCH_SET_COMPAT) is
working by ptracing switched application with PTRACE_GETREGS -
it should return 32-bit registers set.
Cc: Cyrill Gorcunov
Cc: Pavel Emelyanov
Cc: Konstantin Khorenko
With those patches it becomes possible to tell the kernel in which mode
current task is.
I need it for compatibility process C/R:
restorer is native x86_64 process, that maps vmas, restore task parameters,
does clone to add threads and so on. To restore 32-bit application, that
runs on x86_64 (in
This is simple test to determine if arch_prctl(ARCH_SET_COMPAT) is
working by ptracing switched application with PTRACE_GETREGS -
it should return 32-bit registers set.
Cc: Cyrill Gorcunov
Cc: Pavel Emelyanov
Cc: Konstantin Khorenko
CC: Dmitry Safonov <0x7f454...@gmail.com>
Signed-off-by:
Now each process that runs natively on x86_64 may execute 32-bit code
by proper setting it's CS selector: either from LDT or reuse Linux's
USER32_CS. The vice-versa is also valid: running 64-bit code in
compatible task is also possible by choosing USER_CS.
So we may switch between 32 and 64 bit
Now each process that runs natively on x86_64 may execute 32-bit code
by proper setting it's CS selector: either from LDT or reuse Linux's
USER32_CS. The vice-versa is also valid: running 64-bit code in
compatible task is also possible by choosing USER_CS.
So we may switch between 32 and 64 bit
On Wednesday, April 06, 2016 2:41 AM, Ian Abbott wrote:
> On 06/04/16 02:21, Hartley Sweeten wrote:
>> On Tuesday, April 05, 2016 7:23 AM, Sudip Mukherjee wrote:
>>> The variable unipolar was never used.
>>>
>>> Signed-off-by: Sudip Mukherjee
>>> ---
>>>
>>> There
On Wednesday, April 06, 2016 2:41 AM, Ian Abbott wrote:
> On 06/04/16 02:21, Hartley Sweeten wrote:
>> On Tuesday, April 05, 2016 7:23 AM, Sudip Mukherjee wrote:
>>> The variable unipolar was never used.
>>>
>>> Signed-off-by: Sudip Mukherjee
>>> ---
>>>
>>> There may be a chance that reading
On Wed, Apr 06, 2016 at 03:06:19PM +0200, Petr Mladek wrote:
> On Fri 2016-03-25 14:34:52, Josh Poimboeuf wrote:
> > This is a horrible way to detect whether a task has been preempted.
> > Come up with something better: task flag? or is there already an
> > existing mechanism?
>
> What about
On Wed, Apr 06, 2016 at 03:06:19PM +0200, Petr Mladek wrote:
> On Fri 2016-03-25 14:34:52, Josh Poimboeuf wrote:
> > This is a horrible way to detect whether a task has been preempted.
> > Come up with something better: task flag? or is there already an
> > existing mechanism?
>
> What about
On 04/06/2016 07:18 AM, Mark Salter wrote:
> On Wed, 2016-04-06 at 11:52 +0100, Graeme Gregory wrote:
>> On Wed, Apr 06, 2016 at 01:24:12PM +0300, Aleksey Makarov wrote:
>>>
>>>
>>>
>>> On 04/05/2016 07:27 PM, Mark Salter wrote:
Could you CC me on future postings of this series, please?
On 04/06/2016 07:18 AM, Mark Salter wrote:
> On Wed, 2016-04-06 at 11:52 +0100, Graeme Gregory wrote:
>> On Wed, Apr 06, 2016 at 01:24:12PM +0300, Aleksey Makarov wrote:
>>>
>>>
>>>
>>> On 04/05/2016 07:27 PM, Mark Salter wrote:
Could you CC me on future postings of this series, please?
Hi Soren,
> -Original Message-
> From: Sören Brinkmann [mailto:soren.brinkm...@xilinx.com]
> Sent: Wednesday, April 06, 2016 9:50 PM
> To: Appana Durga Kedareswara Rao
> Cc: robh...@kernel.org; pawel.m...@arm.com; mark.rutl...@arm.com;
>
Hi Soren,
> -Original Message-
> From: Sören Brinkmann [mailto:soren.brinkm...@xilinx.com]
> Sent: Wednesday, April 06, 2016 9:50 PM
> To: Appana Durga Kedareswara Rao
> Cc: robh...@kernel.org; pawel.m...@arm.com; mark.rutl...@arm.com;
> ijc+devicet...@hellion.org.uk;
Looking in digsig.c, I see:
#ifdef CONFIG_INTEGRITY_TRUSTED_KEYRING
static bool init_keyring __initdata = true;
#else
static bool init_keyring __initdata;
#endif
Since this doesn't ever appear to be altered, should integrity_init_keyring()
just be made
Looking in digsig.c, I see:
#ifdef CONFIG_INTEGRITY_TRUSTED_KEYRING
static bool init_keyring __initdata = true;
#else
static bool init_keyring __initdata;
#endif
Since this doesn't ever appear to be altered, should integrity_init_keyring()
just be made
On Wed, Apr 06, 2016 at 11:06:20AM -0400, Vivien Didelot wrote:
> Add description for the missing port_vlan_prepare, port_fdb_prepare,
> port_fdb_dump functions in the DSA documentation.
>
> Signed-off-by: Vivien Didelot
Reviewed-by: Andrew Lunn
On Wed, Apr 06, 2016 at 11:06:20AM -0400, Vivien Didelot wrote:
> Add description for the missing port_vlan_prepare, port_fdb_prepare,
> port_fdb_dump functions in the DSA documentation.
>
> Signed-off-by: Vivien Didelot
Reviewed-by: Andrew Lunn
Andrew
On Wed, Apr 06, 2016 at 11:55:02AM -0400, Vivien Didelot wrote:
> Neither the DSA layer nor the bridge code (see br_set_state) really care
> about eventual errors from STP state setters, so make it void.
>
> The DSA layer separates the prepare and commit phases of switchdev in
> two different
On Wed, Apr 06, 2016 at 11:55:02AM -0400, Vivien Didelot wrote:
> Neither the DSA layer nor the bridge code (see br_set_state) really care
> about eventual errors from STP state setters, so make it void.
>
> The DSA layer separates the prepare and commit phases of switchdev in
> two different
This patch updates the device-tree binding doc for
adding support for AXI DMA.
Also this patch differentiates required properties b/w
DMA and VDMA.
Signed-off-by: Kedareswara rao Appana
---
Changes for v3:
---> Removed AXI DMA DT example from the patch as suggested by Rob.
On 4/4/16 7:22 AM, Eli Cohen wrote:
> Hi Doug,
>
> Could you please pull this fix?
>
> https://lkml.org/lkml/2016/3/23/132
I've pulled the fix, once I have the 0day results back, I'll submit the
pull request.
--
Doug Ledford
GPG Key ID: 0E572FDD
signature.asc
On 4/4/16 7:22 AM, Eli Cohen wrote:
> Hi Doug,
>
> Could you please pull this fix?
>
> https://lkml.org/lkml/2016/3/23/132
I've pulled the fix, once I have the 0day results back, I'll submit the
pull request.
--
Doug Ledford
GPG Key ID: 0E572FDD
signature.asc
Description: OpenPGP
This patch updates the device-tree binding doc for
adding support for AXI DMA.
Also this patch differentiates required properties b/w
DMA and VDMA.
Signed-off-by: Kedareswara rao Appana
---
Changes for v3:
---> Removed AXI DMA DT example from the patch as suggested by Rob.
---> Differentiated
This patch adds support for the AXI Central Direct Memory Access
(AXI CDMA) core to the existing vdma driver, AXI CDMA is a
soft Xilinx IP core that provides high-bandwidth
Direct Memory Access(DMA) between a memory-mapped
source address and a memory-mapped destination address.
Signed-off-by:
This patch updates the device-tree binding doc for
adding support for AXI CDMA.
Signed-off-by: Kedareswara rao Appana
---
Changes for v3:
---> Removed CDMA DT example from the patch as suggested by the Rob.
Changes for v2:
---> Modified commit message as suggested by Vinod.
This patch series does some enhancments to the VDMA driver
which includes
--> Adding support for AXI DMA IP.
--> Adding support for AXI CDMA IP.
Kedareswara rao Appana (5):
Documentation: DT: vdma: Rename vdma-chan prefix to dma-chan
Documentation: DT: vdma: update binding doc for AXI DMA
This patch adds support for the AXI Direct Memory Access (AXI DMA)
core in the existing vdma driver, AXI DMA Core is a
soft Xilinx IP core that provides high-bandwidth
direct memory access between memory and AXI4-Stream
type target peripherals.
Signed-off-by: Kedareswara rao Appana
This patch adds support for the AXI Central Direct Memory Access
(AXI CDMA) core to the existing vdma driver, AXI CDMA is a
soft Xilinx IP core that provides high-bandwidth
Direct Memory Access(DMA) between a memory-mapped
source address and a memory-mapped destination address.
Signed-off-by:
This patch updates the device-tree binding doc for
adding support for AXI CDMA.
Signed-off-by: Kedareswara rao Appana
---
Changes for v3:
---> Removed CDMA DT example from the patch as suggested by the Rob.
Changes for v2:
---> Modified commit message as suggested by Vinod.
---> Moved the patch
This patch series does some enhancments to the VDMA driver
which includes
--> Adding support for AXI DMA IP.
--> Adding support for AXI CDMA IP.
Kedareswara rao Appana (5):
Documentation: DT: vdma: Rename vdma-chan prefix to dma-chan
Documentation: DT: vdma: update binding doc for AXI DMA
This patch adds support for the AXI Direct Memory Access (AXI DMA)
core in the existing vdma driver, AXI DMA Core is a
soft Xilinx IP core that provides high-bandwidth
direct memory access between memory and AXI4-Stream
type target peripherals.
Signed-off-by: Kedareswara rao Appana
---
Changes
This patch renames the vdma-mm2s-channel/vdma-s2mm-channel
property with dma-mm2s-channel/dma-s2mm-channel to sync with
the driver.
Signed-off-by: Kedareswara rao Appana
---
Changes for v3:
---> New patch.
Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt | 8
This patch renames the vdma-mm2s-channel/vdma-s2mm-channel
property with dma-mm2s-channel/dma-s2mm-channel to sync with
the driver.
Signed-off-by: Kedareswara rao Appana
---
Changes for v3:
---> New patch.
Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt | 8
1 file
On Wed, Apr 06, 2016 at 11:07:45AM +0100, Sudip Mukherjee wrote:
> On the unlikely event of a bad name, d_hash_and_lookup() can return the
> error value in ERR_PTR(). And we were only checking the return value of
> d_hash_and_lookup() to be NULL. In case it is not NULL and has some
> error then
On Wed, Apr 06, 2016 at 11:07:45AM +0100, Sudip Mukherjee wrote:
> On the unlikely event of a bad name, d_hash_and_lookup() can return the
> error value in ERR_PTR(). And we were only checking the return value of
> d_hash_and_lookup() to be NULL. In case it is not NULL and has some
> error then
On 6 April 2016 at 12:12, Rob Herring wrote:
> On Mon, Apr 4, 2016 at 3:22 PM, Ezequiel Garcia
> wrote:
>> It's desirable to specify which LEDs are to be blinked on a kernel
>> panic. Therefore, introduce a devicetree boolean property to mark
>>
On 6 April 2016 at 12:12, Rob Herring wrote:
> On Mon, Apr 4, 2016 at 3:22 PM, Ezequiel Garcia
> wrote:
>> It's desirable to specify which LEDs are to be blinked on a kernel
>> panic. Therefore, introduce a devicetree boolean property to mark
>> which LEDs should be treated this way.
>>
>>
Mimi Zohar wrote:
> FYI, restrict_link_by_ima_mok() allows keys to be added to the IMA
> keyring signed by a key on the .ima_mok keyring, but
> restrict_link_by_builtin_and_secondary_trusted() results in "errno:
> Required key not available (126)".
Is that fixed by
Mimi Zohar wrote:
> FYI, restrict_link_by_ima_mok() allows keys to be added to the IMA
> keyring signed by a key on the .ima_mok keyring, but
> restrict_link_by_builtin_and_secondary_trusted() results in "errno:
> Required key not available (126)".
Is that fixed by fixing
Mimi Zohar wrote:
> > + return restrict_link_by_signature(builtin_trusted_keys, type, payload);
>
> Shouldn't thi be secondary_trusted_keys?
Yeah. Good catch, thanks!
David
Mimi Zohar wrote:
> > + return restrict_link_by_signature(builtin_trusted_keys, type, payload);
>
> Shouldn't thi be secondary_trusted_keys?
Yeah. Good catch, thanks!
David
On Wed, Apr 6, 2016 at 4:56 PM, Bastien Philbert
wrote:
> This remove the unnessary BUG_ON if the allocation with
> alloc_extent_state_atomic fails due to this function
> failure not being unrecoverable. Instead we now change
> this BUG_ON into a new error path that
On Wed, Apr 6, 2016 at 4:56 PM, Bastien Philbert
wrote:
> This remove the unnessary BUG_ON if the allocation with
> alloc_extent_state_atomic fails due to this function
> failure not being unrecoverable. Instead we now change
> this BUG_ON into a new error path that jumps to the goto
> label, out
On Wed, Apr 06, 2016 at 03:33:05PM +0530, Laxman Dewangan wrote:
> Sometimes, thermal sensors like NCT thermistors are connected to
> the ADC channel. The temperature is read by reading the voltage
> across the sensor resistance via ADC and referring the lookup
> table for ADC value to
On Wed, Apr 06, 2016 at 03:33:05PM +0530, Laxman Dewangan wrote:
> Sometimes, thermal sensors like NCT thermistors are connected to
> the ADC channel. The temperature is read by reading the voltage
> across the sensor resistance via ADC and referring the lookup
> table for ADC value to
This remove the unnessary BUG_ON if the allocation with
alloc_extent_state_atomic fails due to this function
failure not being unrecoverable. Instead we now change
this BUG_ON into a new error path that jumps to the goto
label, out from freeing previously allocated resources
before returning the
This remove the unnessary BUG_ON if the allocation with
alloc_extent_state_atomic fails due to this function
failure not being unrecoverable. Instead we now change
this BUG_ON into a new error path that jumps to the goto
label, out from freeing previously allocated resources
before returning the
Hello, Peter.
Sorry about the delay.
On Mon, Mar 14, 2016 at 12:30:13PM +0100, Peter Zijlstra wrote:
> On Fri, Mar 11, 2016 at 10:41:18AM -0500, Tejun Heo wrote:
> > * A rgroup is a cgroup which is invisible on and transparent to the
> > system-level cgroupfs interface.
> >
> > * A rgroup can
From: "Du, Changbin"
For DWC3 USB controller, the Global Debug Queue/FIFO Space Available
Register(GDBGFIFOSPACE) can be used to dump FIFO/Queue available space.
This can be used to check some special issues, like whether data is
successfully copied from memory to fifo
Hello, Peter.
Sorry about the delay.
On Mon, Mar 14, 2016 at 12:30:13PM +0100, Peter Zijlstra wrote:
> On Fri, Mar 11, 2016 at 10:41:18AM -0500, Tejun Heo wrote:
> > * A rgroup is a cgroup which is invisible on and transparent to the
> > system-level cgroupfs interface.
> >
> > * A rgroup can
From: "Du, Changbin"
For DWC3 USB controller, the Global Debug Queue/FIFO Space Available
Register(GDBGFIFOSPACE) can be used to dump FIFO/Queue available space.
This can be used to check some special issues, like whether data is
successfully copied from memory to fifo when a trb is blocked.
The switchdev design implies that a software error should not happen in
the commit phase since it must have been previously reported in the
prepare phase. If an hardware error occurs during the commit phase,
there is nothing switchdev can do about it.
The DSA layer separates port_vlan_prepare and
The switchdev design implies that a software error should not happen in
the commit phase since it must have been previously reported in the
prepare phase. If an hardware error occurs during the commit phase,
there is nothing switchdev can do about it.
The DSA layer separates port_vlan_prepare and
On Oct 27, 2015 4:56 PM, "Paul Turner" wrote:
>
> This is an update to the previously posted series at:
> https://lkml.org/lkml/2015/6/24/665
>
> Dave Watson has posted a similar follow-up which allows additional critical
> regions to be registered as well as single-step
On Oct 27, 2015 4:56 PM, "Paul Turner" wrote:
>
> This is an update to the previously posted series at:
> https://lkml.org/lkml/2015/6/24/665
>
> Dave Watson has posted a similar follow-up which allows additional critical
> regions to be registered as well as single-step support at:
>
Neither the DSA layer nor the bridge code (see br_set_state) really care
about eventual errors from STP state setters, so make it void.
The DSA layer separates the prepare and commit phases of switchdev in
two different functions. Logical errors must not happen in commit
routines, so make them
From: "Du, Changbin"
The first patch removed unnecessary checking for debugfs api call;
The second patch fix a memory leak issue;
The third patch add one new entry to debufs.
Du, Changbin (3):
usb: dwc3: make dwc3_debugfs_init return value be void
usb: dwc3: free
Neither the DSA layer nor the bridge code (see br_set_state) really care
about eventual errors from STP state setters, so make it void.
The DSA layer separates the prepare and commit phases of switchdev in
two different functions. Logical errors must not happen in commit
routines, so make them
From: "Du, Changbin"
The first patch removed unnecessary checking for debugfs api call;
The second patch fix a memory leak issue;
The third patch add one new entry to debufs.
Du, Changbin (3):
usb: dwc3: make dwc3_debugfs_init return value be void
usb: dwc3: free dwc->regset on
The DSA layer doesn't care about the return code of the port_stp_update
routine, so make it void in the layer and the DSA drivers.
Replace the useless dsa_slave_stp_update function with a
dsa_slave_stp_state function used to reply to the switchdev
SWITCHDEV_ATTR_ID_PORT_STP_STATE attribute.
In
The switchdev design implies that a software error should not happen in
the commit phase since it must have been previously reported in the
prepare phase. If an hardware error occurs during the commit phase,
there is nothing switchdev can do about it.
The DSA layer separates port_fdb_prepare and
The DSA layer doesn't care about the return code of the port_stp_update
routine, so make it void in the layer and the DSA drivers.
Replace the useless dsa_slave_stp_update function with a
dsa_slave_stp_state function used to reply to the switchdev
SWITCHDEV_ATTR_ID_PORT_STP_STATE attribute.
In
The switchdev design implies that a software error should not happen in
the commit phase since it must have been previously reported in the
prepare phase. If an hardware error occurs during the commit phase,
there is nothing switchdev can do about it.
The DSA layer separates port_fdb_prepare and
From: "Du, Changbin"
Signed-off-by: Du, Changbin
---
drivers/usb/dwc3/debugfs.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/usb/dwc3/debugfs.c b/drivers/usb/dwc3/debugfs.c
index 071b286..2d4f397 100644
---
From: "Du, Changbin"
Signed-off-by: Du, Changbin
---
drivers/usb/dwc3/debugfs.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/usb/dwc3/debugfs.c b/drivers/usb/dwc3/debugfs.c
index 071b286..2d4f397 100644
--- a/drivers/usb/dwc3/debugfs.c
+++ b/drivers/usb/dwc3/debugfs.c
@@
From: "Du, Changbin"
Debugfs init failure is not so important. We can continue our job on
this failure. Also no need to check debugfs_create_file call results.
Signed-off-by: Du, Changbin
---
drivers/usb/dwc3/core.c| 10 +-
From: "Du, Changbin"
Debugfs init failure is not so important. We can continue our job on
this failure. Also no need to check debugfs_create_file call results.
Signed-off-by: Du, Changbin
---
drivers/usb/dwc3/core.c| 10 +-
drivers/usb/dwc3/debug.h | 6 +++---
On 06/04/16 16:12, Tyler Baicar wrote:
A RAS (Reliability, Availability, Serviceability) controller
may be a separate processor running in parallel with OS
execution, and may generate error records for consumption by
the OS. If the RAS controller produces multiple error records,
then they may be
On 06/04/16 16:12, Tyler Baicar wrote:
A RAS (Reliability, Availability, Serviceability) controller
may be a separate processor running in parallel with OS
execution, and may generate error records for consumption by
the OS. If the RAS controller produces multiple error records,
then they may be
On 2106.03.06 08:13 Joe Perches wrote:
> On Wed, 2016-04-06 at 07:51 -0700, Doug Smythies wrote:
>> On 2016.04.05 02:44 Srinivas Pandruvada wrote:
>>> On Tue, 2016-04-05 at 13:28 -0700, Joe Perches wrote:
> The more common kernel mechanism to prefix messages
> is using a pr_fmt define like:
>
>
On 2106.03.06 08:13 Joe Perches wrote:
> On Wed, 2016-04-06 at 07:51 -0700, Doug Smythies wrote:
>> On 2016.04.05 02:44 Srinivas Pandruvada wrote:
>>> On Tue, 2016-04-05 at 13:28 -0700, Joe Perches wrote:
> The more common kernel mechanism to prefix messages
> is using a pr_fmt define like:
>
>
On Wed, Apr 06, 2016 at 10:44:56AM +0530, Kedareswara rao Appana wrote:
> This patch renames the xilinx_vdma_ prefix to xilinx_dma
> for the API's and masks that will be shared b/w three DMA
> IP cores.
Applied, thanks
--
~Vinod
On Wed, Apr 06, 2016 at 10:44:56AM +0530, Kedareswara rao Appana wrote:
> This patch renames the xilinx_vdma_ prefix to xilinx_dma
> for the API's and masks that will be shared b/w three DMA
> IP cores.
Applied, thanks
--
~Vinod
On Wed, Apr 06, 2016 at 10:44:55AM +0530, Kedareswara rao Appana wrote:
> This patch fixes the below checkpatch.pl warnings.
Applied, thanks
--
~Vinod
On 25/03/16 21:35, Stephen Boyd wrote:
The msm_find_best_baud() function is written with the assumption
that the port->uartclk rate is fixed to a particular rate at boot
time, but now this driver changes that clk rate at runtime when
the baud is changed.
The way the hardware works is that an
On Wed, Apr 06, 2016 at 10:44:55AM +0530, Kedareswara rao Appana wrote:
> This patch fixes the below checkpatch.pl warnings.
Applied, thanks
--
~Vinod
On 25/03/16 21:35, Stephen Boyd wrote:
The msm_find_best_baud() function is written with the assumption
that the port->uartclk rate is fixed to a particular rate at boot
time, but now this driver changes that clk rate at runtime when
the baud is changed.
The way the hardware works is that an
On Wed, Apr 06, 2016 at 10:38:08AM +0530, Kedareswara rao Appana wrote:
> This VDMA is a soft ip, which can be programmed to support
> 32 bit addressing or greater than 32 bit addressing.
>
> When the VDMA ip is configured for 32 bit address space
> the buffer address is specified by a single
On Wed, Apr 06, 2016 at 10:38:08AM +0530, Kedareswara rao Appana wrote:
> This VDMA is a soft ip, which can be programmed to support
> 32 bit addressing or greater than 32 bit addressing.
>
> When the VDMA ip is configured for 32 bit address space
> the buffer address is specified by a single
Hi Vinod,
> -Original Message-
> From: Vinod Koul [mailto:vinod.k...@intel.com]
> Sent: Wednesday, April 06, 2016 9:05 PM
> To: Appana Durga Kedareswara Rao
> Cc: robh...@kernel.org; pawel.m...@arm.com; mark.rutl...@arm.com;
> ijc+devicet...@hellion.org.uk;
Hi Vinod,
> -Original Message-
> From: Vinod Koul [mailto:vinod.k...@intel.com]
> Sent: Wednesday, April 06, 2016 9:05 PM
> To: Appana Durga Kedareswara Rao
> Cc: robh...@kernel.org; pawel.m...@arm.com; mark.rutl...@arm.com;
> ijc+devicet...@hellion.org.uk; ga...@codeaurora.org; Michal
On 06/04/16 16:12, Tyler Baicar wrote:
> Add a handler for instruction aborts at the current EL
> (ESR_ELx_EC_IABT_CUR) so they are no longer handled in el1_inv.
> This allows firmware first handling for possible SEA
> (Synchronous External Abort) caused instruction abort at
> current EL.
>
>
On 06/04/16 16:12, Tyler Baicar wrote:
> Add a handler for instruction aborts at the current EL
> (ESR_ELx_EC_IABT_CUR) so they are no longer handled in el1_inv.
> This allows firmware first handling for possible SEA
> (Synchronous External Abort) caused instruction abort at
> current EL.
>
>
This patch allows sata_dwc_460ex to work with non-ncq, dma i/o.
Previously, the driver dumped the following warning:
[ cut here ]
WARNING: at c01f3d50 [verbose debug info unavailable]
CPU: 0 PID: 315 Comm: kworker/u2:2 Not tainted 4.4.6 #18
Workqueue: events_unbound
This patch allows sata_dwc_460ex to work with non-ncq, dma i/o.
Previously, the driver dumped the following warning:
[ cut here ]
WARNING: at c01f3d50 [verbose debug info unavailable]
CPU: 0 PID: 315 Comm: kworker/u2:2 Not tainted 4.4.6 #18
Workqueue: events_unbound
On Wed, Apr 06, 2016 at 10:44:57AM +0530, Kedareswara rao Appana wrote:
> This patch updates the device-tree binding doc for
> adding support for AXI DMA.
>
> Signed-off-by: Kedareswara rao Appana
> ---
> Changes for v2:
> ---> Modified commit message as suggested by Vinod.
>
On Wed, Apr 06, 2016 at 10:44:57AM +0530, Kedareswara rao Appana wrote:
> This patch updates the device-tree binding doc for
> adding support for AXI DMA.
>
> Signed-off-by: Kedareswara rao Appana
> ---
> Changes for v2:
> ---> Modified commit message as suggested by Vinod.
> ---> Moved the
On Wed 06-04-16 17:12:43, Frank Mehnert wrote:
> Hi Michal,
>
> On Wednesday 06 April 2016 17:02:06 Michal Hocko wrote:
> > [CCing linux-mm mailing list]
> >
> > On Wed 06-04-16 13:28:37, Frank Mehnert wrote:
> > > Hi,
> > >
> > > Linux 4.5 introduced additional checks to ensure that compound
On Wed 06-04-16 17:12:43, Frank Mehnert wrote:
> Hi Michal,
>
> On Wednesday 06 April 2016 17:02:06 Michal Hocko wrote:
> > [CCing linux-mm mailing list]
> >
> > On Wed 06-04-16 13:28:37, Frank Mehnert wrote:
> > > Hi,
> > >
> > > Linux 4.5 introduced additional checks to ensure that compound
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